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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (C) 2006-2007 PA Semi, Inc
0004  *
0005  * Driver for the PA Semi PWRficient onchip 1G/10G Ethernet MACs
0006  */
0007 
0008 #include <linux/module.h>
0009 #include <linux/pci.h>
0010 #include <linux/slab.h>
0011 #include <linux/interrupt.h>
0012 #include <linux/dmaengine.h>
0013 #include <linux/delay.h>
0014 #include <linux/netdevice.h>
0015 #include <linux/of_mdio.h>
0016 #include <linux/etherdevice.h>
0017 #include <asm/dma-mapping.h>
0018 #include <linux/in.h>
0019 #include <linux/skbuff.h>
0020 
0021 #include <linux/ip.h>
0022 #include <net/checksum.h>
0023 #include <linux/prefetch.h>
0024 
0025 #include <asm/irq.h>
0026 #include <asm/firmware.h>
0027 #include <asm/pasemi_dma.h>
0028 
0029 #include "pasemi_mac.h"
0030 
0031 /* We have our own align, since ppc64 in general has it at 0 because
0032  * of design flaws in some of the server bridge chips. However, for
0033  * PWRficient doing the unaligned copies is more expensive than doing
0034  * unaligned DMA, so make sure the data is aligned instead.
0035  */
0036 #define LOCAL_SKB_ALIGN 2
0037 
0038 /* TODO list
0039  *
0040  * - Multicast support
0041  * - Large MTU support
0042  * - Multiqueue RX/TX
0043  */
0044 
0045 #define PE_MIN_MTU  (ETH_ZLEN + ETH_HLEN)
0046 #define PE_MAX_MTU  9000
0047 #define PE_DEF_MTU  ETH_DATA_LEN
0048 
0049 #define DEFAULT_MSG_ENABLE    \
0050     (NETIF_MSG_DRV      | \
0051      NETIF_MSG_PROBE    | \
0052      NETIF_MSG_LINK     | \
0053      NETIF_MSG_TIMER    | \
0054      NETIF_MSG_IFDOWN   | \
0055      NETIF_MSG_IFUP     | \
0056      NETIF_MSG_RX_ERR   | \
0057      NETIF_MSG_TX_ERR)
0058 
0059 MODULE_LICENSE("GPL");
0060 MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>");
0061 MODULE_DESCRIPTION("PA Semi PWRficient Ethernet driver");
0062 
0063 static int debug = -1;  /* -1 == use DEFAULT_MSG_ENABLE as value */
0064 module_param(debug, int, 0);
0065 MODULE_PARM_DESC(debug, "PA Semi MAC bitmapped debugging message enable value");
0066 
0067 extern const struct ethtool_ops pasemi_mac_ethtool_ops;
0068 
0069 static int translation_enabled(void)
0070 {
0071 #if defined(CONFIG_PPC_PASEMI_IOMMU_DMA_FORCE)
0072     return 1;
0073 #else
0074     return firmware_has_feature(FW_FEATURE_LPAR);
0075 #endif
0076 }
0077 
0078 static void write_iob_reg(unsigned int reg, unsigned int val)
0079 {
0080     pasemi_write_iob_reg(reg, val);
0081 }
0082 
0083 static unsigned int read_mac_reg(const struct pasemi_mac *mac, unsigned int reg)
0084 {
0085     return pasemi_read_mac_reg(mac->dma_if, reg);
0086 }
0087 
0088 static void write_mac_reg(const struct pasemi_mac *mac, unsigned int reg,
0089               unsigned int val)
0090 {
0091     pasemi_write_mac_reg(mac->dma_if, reg, val);
0092 }
0093 
0094 static unsigned int read_dma_reg(unsigned int reg)
0095 {
0096     return pasemi_read_dma_reg(reg);
0097 }
0098 
0099 static void write_dma_reg(unsigned int reg, unsigned int val)
0100 {
0101     pasemi_write_dma_reg(reg, val);
0102 }
0103 
0104 static struct pasemi_mac_rxring *rx_ring(const struct pasemi_mac *mac)
0105 {
0106     return mac->rx;
0107 }
0108 
0109 static struct pasemi_mac_txring *tx_ring(const struct pasemi_mac *mac)
0110 {
0111     return mac->tx;
0112 }
0113 
0114 static inline void prefetch_skb(const struct sk_buff *skb)
0115 {
0116     const void *d = skb;
0117 
0118     prefetch(d);
0119     prefetch(d+64);
0120     prefetch(d+128);
0121     prefetch(d+192);
0122 }
0123 
0124 static int mac_to_intf(struct pasemi_mac *mac)
0125 {
0126     struct pci_dev *pdev = mac->pdev;
0127     u32 tmp;
0128     int nintf, off, i, j;
0129     int devfn = pdev->devfn;
0130 
0131     tmp = read_dma_reg(PAS_DMA_CAP_IFI);
0132     nintf = (tmp & PAS_DMA_CAP_IFI_NIN_M) >> PAS_DMA_CAP_IFI_NIN_S;
0133     off = (tmp & PAS_DMA_CAP_IFI_IOFF_M) >> PAS_DMA_CAP_IFI_IOFF_S;
0134 
0135     /* IOFF contains the offset to the registers containing the
0136      * DMA interface-to-MAC-pci-id mappings, and NIN contains number
0137      * of total interfaces. Each register contains 4 devfns.
0138      * Just do a linear search until we find the devfn of the MAC
0139      * we're trying to look up.
0140      */
0141 
0142     for (i = 0; i < (nintf+3)/4; i++) {
0143         tmp = read_dma_reg(off+4*i);
0144         for (j = 0; j < 4; j++) {
0145             if (((tmp >> (8*j)) & 0xff) == devfn)
0146                 return i*4 + j;
0147         }
0148     }
0149     return -1;
0150 }
0151 
0152 static void pasemi_mac_intf_disable(struct pasemi_mac *mac)
0153 {
0154     unsigned int flags;
0155 
0156     flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
0157     flags &= ~PAS_MAC_CFG_PCFG_PE;
0158     write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
0159 }
0160 
0161 static void pasemi_mac_intf_enable(struct pasemi_mac *mac)
0162 {
0163     unsigned int flags;
0164 
0165     flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
0166     flags |= PAS_MAC_CFG_PCFG_PE;
0167     write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
0168 }
0169 
0170 static int pasemi_get_mac_addr(struct pasemi_mac *mac)
0171 {
0172     struct pci_dev *pdev = mac->pdev;
0173     struct device_node *dn = pci_device_to_OF_node(pdev);
0174     int len;
0175     const u8 *maddr;
0176     u8 addr[ETH_ALEN];
0177 
0178     if (!dn) {
0179         dev_dbg(&pdev->dev,
0180               "No device node for mac, not configuring\n");
0181         return -ENOENT;
0182     }
0183 
0184     maddr = of_get_property(dn, "local-mac-address", &len);
0185 
0186     if (maddr && len == ETH_ALEN) {
0187         memcpy(mac->mac_addr, maddr, ETH_ALEN);
0188         return 0;
0189     }
0190 
0191     /* Some old versions of firmware mistakenly uses mac-address
0192      * (and as a string) instead of a byte array in local-mac-address.
0193      */
0194 
0195     if (maddr == NULL)
0196         maddr = of_get_property(dn, "mac-address", NULL);
0197 
0198     if (maddr == NULL) {
0199         dev_warn(&pdev->dev,
0200              "no mac address in device tree, not configuring\n");
0201         return -ENOENT;
0202     }
0203 
0204     if (!mac_pton(maddr, addr)) {
0205         dev_warn(&pdev->dev,
0206              "can't parse mac address, not configuring\n");
0207         return -EINVAL;
0208     }
0209 
0210     memcpy(mac->mac_addr, addr, ETH_ALEN);
0211 
0212     return 0;
0213 }
0214 
0215 static int pasemi_mac_set_mac_addr(struct net_device *dev, void *p)
0216 {
0217     struct pasemi_mac *mac = netdev_priv(dev);
0218     struct sockaddr *addr = p;
0219     unsigned int adr0, adr1;
0220 
0221     if (!is_valid_ether_addr(addr->sa_data))
0222         return -EADDRNOTAVAIL;
0223 
0224     eth_hw_addr_set(dev, addr->sa_data);
0225 
0226     adr0 = dev->dev_addr[2] << 24 |
0227            dev->dev_addr[3] << 16 |
0228            dev->dev_addr[4] << 8 |
0229            dev->dev_addr[5];
0230     adr1 = read_mac_reg(mac, PAS_MAC_CFG_ADR1);
0231     adr1 &= ~0xffff;
0232     adr1 |= dev->dev_addr[0] << 8 | dev->dev_addr[1];
0233 
0234     pasemi_mac_intf_disable(mac);
0235     write_mac_reg(mac, PAS_MAC_CFG_ADR0, adr0);
0236     write_mac_reg(mac, PAS_MAC_CFG_ADR1, adr1);
0237     pasemi_mac_intf_enable(mac);
0238 
0239     return 0;
0240 }
0241 
0242 static int pasemi_mac_unmap_tx_skb(struct pasemi_mac *mac,
0243                     const int nfrags,
0244                     struct sk_buff *skb,
0245                     const dma_addr_t *dmas)
0246 {
0247     int f;
0248     struct pci_dev *pdev = mac->dma_pdev;
0249 
0250     dma_unmap_single(&pdev->dev, dmas[0], skb_headlen(skb), DMA_TO_DEVICE);
0251 
0252     for (f = 0; f < nfrags; f++) {
0253         const skb_frag_t *frag = &skb_shinfo(skb)->frags[f];
0254 
0255         dma_unmap_page(&pdev->dev, dmas[f + 1], skb_frag_size(frag),
0256                    DMA_TO_DEVICE);
0257     }
0258     dev_kfree_skb_irq(skb);
0259 
0260     /* Freed descriptor slot + main SKB ptr + nfrags additional ptrs,
0261      * aligned up to a power of 2
0262      */
0263     return (nfrags + 3) & ~1;
0264 }
0265 
0266 static struct pasemi_mac_csring *pasemi_mac_setup_csring(struct pasemi_mac *mac)
0267 {
0268     struct pasemi_mac_csring *ring;
0269     u32 val;
0270     unsigned int cfg;
0271     int chno;
0272 
0273     ring = pasemi_dma_alloc_chan(TXCHAN, sizeof(struct pasemi_mac_csring),
0274                        offsetof(struct pasemi_mac_csring, chan));
0275 
0276     if (!ring) {
0277         dev_err(&mac->pdev->dev, "Can't allocate checksum channel\n");
0278         goto out_chan;
0279     }
0280 
0281     chno = ring->chan.chno;
0282 
0283     ring->size = CS_RING_SIZE;
0284     ring->next_to_fill = 0;
0285 
0286     /* Allocate descriptors */
0287     if (pasemi_dma_alloc_ring(&ring->chan, CS_RING_SIZE))
0288         goto out_ring_desc;
0289 
0290     write_dma_reg(PAS_DMA_TXCHAN_BASEL(chno),
0291               PAS_DMA_TXCHAN_BASEL_BRBL(ring->chan.ring_dma));
0292     val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->chan.ring_dma >> 32);
0293     val |= PAS_DMA_TXCHAN_BASEU_SIZ(CS_RING_SIZE >> 3);
0294 
0295     write_dma_reg(PAS_DMA_TXCHAN_BASEU(chno), val);
0296 
0297     ring->events[0] = pasemi_dma_alloc_flag();
0298     ring->events[1] = pasemi_dma_alloc_flag();
0299     if (ring->events[0] < 0 || ring->events[1] < 0)
0300         goto out_flags;
0301 
0302     pasemi_dma_clear_flag(ring->events[0]);
0303     pasemi_dma_clear_flag(ring->events[1]);
0304 
0305     ring->fun = pasemi_dma_alloc_fun();
0306     if (ring->fun < 0)
0307         goto out_fun;
0308 
0309     cfg = PAS_DMA_TXCHAN_CFG_TY_FUNC | PAS_DMA_TXCHAN_CFG_UP |
0310           PAS_DMA_TXCHAN_CFG_TATTR(ring->fun) |
0311           PAS_DMA_TXCHAN_CFG_LPSQ | PAS_DMA_TXCHAN_CFG_LPDQ;
0312 
0313     if (translation_enabled())
0314         cfg |= PAS_DMA_TXCHAN_CFG_TRD | PAS_DMA_TXCHAN_CFG_TRR;
0315 
0316     write_dma_reg(PAS_DMA_TXCHAN_CFG(chno), cfg);
0317 
0318     /* enable channel */
0319     pasemi_dma_start_chan(&ring->chan, PAS_DMA_TXCHAN_TCMDSTA_SZ |
0320                        PAS_DMA_TXCHAN_TCMDSTA_DB |
0321                        PAS_DMA_TXCHAN_TCMDSTA_DE |
0322                        PAS_DMA_TXCHAN_TCMDSTA_DA);
0323 
0324     return ring;
0325 
0326 out_fun:
0327 out_flags:
0328     if (ring->events[0] >= 0)
0329         pasemi_dma_free_flag(ring->events[0]);
0330     if (ring->events[1] >= 0)
0331         pasemi_dma_free_flag(ring->events[1]);
0332     pasemi_dma_free_ring(&ring->chan);
0333 out_ring_desc:
0334     pasemi_dma_free_chan(&ring->chan);
0335 out_chan:
0336 
0337     return NULL;
0338 }
0339 
0340 static void pasemi_mac_setup_csrings(struct pasemi_mac *mac)
0341 {
0342     int i;
0343     mac->cs[0] = pasemi_mac_setup_csring(mac);
0344     if (mac->type == MAC_TYPE_XAUI)
0345         mac->cs[1] = pasemi_mac_setup_csring(mac);
0346     else
0347         mac->cs[1] = 0;
0348 
0349     for (i = 0; i < MAX_CS; i++)
0350         if (mac->cs[i])
0351             mac->num_cs++;
0352 }
0353 
0354 static void pasemi_mac_free_csring(struct pasemi_mac_csring *csring)
0355 {
0356     pasemi_dma_stop_chan(&csring->chan);
0357     pasemi_dma_free_flag(csring->events[0]);
0358     pasemi_dma_free_flag(csring->events[1]);
0359     pasemi_dma_free_ring(&csring->chan);
0360     pasemi_dma_free_chan(&csring->chan);
0361     pasemi_dma_free_fun(csring->fun);
0362 }
0363 
0364 static int pasemi_mac_setup_rx_resources(const struct net_device *dev)
0365 {
0366     struct pasemi_mac_rxring *ring;
0367     struct pasemi_mac *mac = netdev_priv(dev);
0368     int chno;
0369     unsigned int cfg;
0370 
0371     ring = pasemi_dma_alloc_chan(RXCHAN, sizeof(struct pasemi_mac_rxring),
0372                      offsetof(struct pasemi_mac_rxring, chan));
0373 
0374     if (!ring) {
0375         dev_err(&mac->pdev->dev, "Can't allocate RX channel\n");
0376         goto out_chan;
0377     }
0378     chno = ring->chan.chno;
0379 
0380     spin_lock_init(&ring->lock);
0381 
0382     ring->size = RX_RING_SIZE;
0383     ring->ring_info = kcalloc(RX_RING_SIZE,
0384                   sizeof(struct pasemi_mac_buffer),
0385                   GFP_KERNEL);
0386 
0387     if (!ring->ring_info)
0388         goto out_ring_info;
0389 
0390     /* Allocate descriptors */
0391     if (pasemi_dma_alloc_ring(&ring->chan, RX_RING_SIZE))
0392         goto out_ring_desc;
0393 
0394     ring->buffers = dma_alloc_coherent(&mac->dma_pdev->dev,
0395                        RX_RING_SIZE * sizeof(u64),
0396                        &ring->buf_dma, GFP_KERNEL);
0397     if (!ring->buffers)
0398         goto out_ring_desc;
0399 
0400     write_dma_reg(PAS_DMA_RXCHAN_BASEL(chno),
0401               PAS_DMA_RXCHAN_BASEL_BRBL(ring->chan.ring_dma));
0402 
0403     write_dma_reg(PAS_DMA_RXCHAN_BASEU(chno),
0404               PAS_DMA_RXCHAN_BASEU_BRBH(ring->chan.ring_dma >> 32) |
0405               PAS_DMA_RXCHAN_BASEU_SIZ(RX_RING_SIZE >> 3));
0406 
0407     cfg = PAS_DMA_RXCHAN_CFG_HBU(2);
0408 
0409     if (translation_enabled())
0410         cfg |= PAS_DMA_RXCHAN_CFG_CTR;
0411 
0412     write_dma_reg(PAS_DMA_RXCHAN_CFG(chno), cfg);
0413 
0414     write_dma_reg(PAS_DMA_RXINT_BASEL(mac->dma_if),
0415               PAS_DMA_RXINT_BASEL_BRBL(ring->buf_dma));
0416 
0417     write_dma_reg(PAS_DMA_RXINT_BASEU(mac->dma_if),
0418               PAS_DMA_RXINT_BASEU_BRBH(ring->buf_dma >> 32) |
0419               PAS_DMA_RXINT_BASEU_SIZ(RX_RING_SIZE >> 3));
0420 
0421     cfg = PAS_DMA_RXINT_CFG_DHL(2) | PAS_DMA_RXINT_CFG_L2 |
0422           PAS_DMA_RXINT_CFG_LW | PAS_DMA_RXINT_CFG_RBP |
0423           PAS_DMA_RXINT_CFG_HEN;
0424 
0425     if (translation_enabled())
0426         cfg |= PAS_DMA_RXINT_CFG_ITRR | PAS_DMA_RXINT_CFG_ITR;
0427 
0428     write_dma_reg(PAS_DMA_RXINT_CFG(mac->dma_if), cfg);
0429 
0430     ring->next_to_fill = 0;
0431     ring->next_to_clean = 0;
0432     ring->mac = mac;
0433     mac->rx = ring;
0434 
0435     return 0;
0436 
0437 out_ring_desc:
0438     kfree(ring->ring_info);
0439 out_ring_info:
0440     pasemi_dma_free_chan(&ring->chan);
0441 out_chan:
0442     return -ENOMEM;
0443 }
0444 
0445 static struct pasemi_mac_txring *
0446 pasemi_mac_setup_tx_resources(const struct net_device *dev)
0447 {
0448     struct pasemi_mac *mac = netdev_priv(dev);
0449     u32 val;
0450     struct pasemi_mac_txring *ring;
0451     unsigned int cfg;
0452     int chno;
0453 
0454     ring = pasemi_dma_alloc_chan(TXCHAN, sizeof(struct pasemi_mac_txring),
0455                      offsetof(struct pasemi_mac_txring, chan));
0456 
0457     if (!ring) {
0458         dev_err(&mac->pdev->dev, "Can't allocate TX channel\n");
0459         goto out_chan;
0460     }
0461 
0462     chno = ring->chan.chno;
0463 
0464     spin_lock_init(&ring->lock);
0465 
0466     ring->size = TX_RING_SIZE;
0467     ring->ring_info = kcalloc(TX_RING_SIZE,
0468                   sizeof(struct pasemi_mac_buffer),
0469                   GFP_KERNEL);
0470     if (!ring->ring_info)
0471         goto out_ring_info;
0472 
0473     /* Allocate descriptors */
0474     if (pasemi_dma_alloc_ring(&ring->chan, TX_RING_SIZE))
0475         goto out_ring_desc;
0476 
0477     write_dma_reg(PAS_DMA_TXCHAN_BASEL(chno),
0478               PAS_DMA_TXCHAN_BASEL_BRBL(ring->chan.ring_dma));
0479     val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->chan.ring_dma >> 32);
0480     val |= PAS_DMA_TXCHAN_BASEU_SIZ(TX_RING_SIZE >> 3);
0481 
0482     write_dma_reg(PAS_DMA_TXCHAN_BASEU(chno), val);
0483 
0484     cfg = PAS_DMA_TXCHAN_CFG_TY_IFACE |
0485           PAS_DMA_TXCHAN_CFG_TATTR(mac->dma_if) |
0486           PAS_DMA_TXCHAN_CFG_UP |
0487           PAS_DMA_TXCHAN_CFG_WT(4);
0488 
0489     if (translation_enabled())
0490         cfg |= PAS_DMA_TXCHAN_CFG_TRD | PAS_DMA_TXCHAN_CFG_TRR;
0491 
0492     write_dma_reg(PAS_DMA_TXCHAN_CFG(chno), cfg);
0493 
0494     ring->next_to_fill = 0;
0495     ring->next_to_clean = 0;
0496     ring->mac = mac;
0497 
0498     return ring;
0499 
0500 out_ring_desc:
0501     kfree(ring->ring_info);
0502 out_ring_info:
0503     pasemi_dma_free_chan(&ring->chan);
0504 out_chan:
0505     return NULL;
0506 }
0507 
0508 static void pasemi_mac_free_tx_resources(struct pasemi_mac *mac)
0509 {
0510     struct pasemi_mac_txring *txring = tx_ring(mac);
0511     unsigned int i, j;
0512     struct pasemi_mac_buffer *info;
0513     dma_addr_t dmas[MAX_SKB_FRAGS+1];
0514     int freed, nfrags;
0515     int start, limit;
0516 
0517     start = txring->next_to_clean;
0518     limit = txring->next_to_fill;
0519 
0520     /* Compensate for when fill has wrapped and clean has not */
0521     if (start > limit)
0522         limit += TX_RING_SIZE;
0523 
0524     for (i = start; i < limit; i += freed) {
0525         info = &txring->ring_info[(i+1) & (TX_RING_SIZE-1)];
0526         if (info->dma && info->skb) {
0527             nfrags = skb_shinfo(info->skb)->nr_frags;
0528             for (j = 0; j <= nfrags; j++)
0529                 dmas[j] = txring->ring_info[(i+1+j) &
0530                         (TX_RING_SIZE-1)].dma;
0531             freed = pasemi_mac_unmap_tx_skb(mac, nfrags,
0532                             info->skb, dmas);
0533         } else {
0534             freed = 2;
0535         }
0536     }
0537 
0538     kfree(txring->ring_info);
0539     pasemi_dma_free_chan(&txring->chan);
0540 
0541 }
0542 
0543 static void pasemi_mac_free_rx_buffers(struct pasemi_mac *mac)
0544 {
0545     struct pasemi_mac_rxring *rx = rx_ring(mac);
0546     unsigned int i;
0547     struct pasemi_mac_buffer *info;
0548 
0549     for (i = 0; i < RX_RING_SIZE; i++) {
0550         info = &RX_DESC_INFO(rx, i);
0551         if (info->skb && info->dma) {
0552             dma_unmap_single(&mac->dma_pdev->dev, info->dma,
0553                      info->skb->len, DMA_FROM_DEVICE);
0554             dev_kfree_skb_any(info->skb);
0555         }
0556         info->dma = 0;
0557         info->skb = NULL;
0558     }
0559 
0560     for (i = 0; i < RX_RING_SIZE; i++)
0561         RX_BUFF(rx, i) = 0;
0562 }
0563 
0564 static void pasemi_mac_free_rx_resources(struct pasemi_mac *mac)
0565 {
0566     pasemi_mac_free_rx_buffers(mac);
0567 
0568     dma_free_coherent(&mac->dma_pdev->dev, RX_RING_SIZE * sizeof(u64),
0569               rx_ring(mac)->buffers, rx_ring(mac)->buf_dma);
0570 
0571     kfree(rx_ring(mac)->ring_info);
0572     pasemi_dma_free_chan(&rx_ring(mac)->chan);
0573     mac->rx = NULL;
0574 }
0575 
0576 static void pasemi_mac_replenish_rx_ring(struct net_device *dev,
0577                      const int limit)
0578 {
0579     const struct pasemi_mac *mac = netdev_priv(dev);
0580     struct pasemi_mac_rxring *rx = rx_ring(mac);
0581     int fill, count;
0582 
0583     if (limit <= 0)
0584         return;
0585 
0586     fill = rx_ring(mac)->next_to_fill;
0587     for (count = 0; count < limit; count++) {
0588         struct pasemi_mac_buffer *info = &RX_DESC_INFO(rx, fill);
0589         u64 *buff = &RX_BUFF(rx, fill);
0590         struct sk_buff *skb;
0591         dma_addr_t dma;
0592 
0593         /* Entry in use? */
0594         WARN_ON(*buff);
0595 
0596         skb = netdev_alloc_skb(dev, mac->bufsz);
0597         skb_reserve(skb, LOCAL_SKB_ALIGN);
0598 
0599         if (unlikely(!skb))
0600             break;
0601 
0602         dma = dma_map_single(&mac->dma_pdev->dev, skb->data,
0603                      mac->bufsz - LOCAL_SKB_ALIGN,
0604                      DMA_FROM_DEVICE);
0605 
0606         if (dma_mapping_error(&mac->dma_pdev->dev, dma)) {
0607             dev_kfree_skb_irq(info->skb);
0608             break;
0609         }
0610 
0611         info->skb = skb;
0612         info->dma = dma;
0613         *buff = XCT_RXB_LEN(mac->bufsz) | XCT_RXB_ADDR(dma);
0614         fill++;
0615     }
0616 
0617     wmb();
0618 
0619     write_dma_reg(PAS_DMA_RXINT_INCR(mac->dma_if), count);
0620 
0621     rx_ring(mac)->next_to_fill = (rx_ring(mac)->next_to_fill + count) &
0622                 (RX_RING_SIZE - 1);
0623 }
0624 
0625 static void pasemi_mac_restart_rx_intr(const struct pasemi_mac *mac)
0626 {
0627     struct pasemi_mac_rxring *rx = rx_ring(mac);
0628     unsigned int reg, pcnt;
0629     /* Re-enable packet count interrupts: finally
0630      * ack the packet count interrupt we got in rx_intr.
0631      */
0632 
0633     pcnt = *rx->chan.status & PAS_STATUS_PCNT_M;
0634 
0635     reg = PAS_IOB_DMA_RXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_RXCH_RESET_PINTC;
0636 
0637     if (*rx->chan.status & PAS_STATUS_TIMER)
0638         reg |= PAS_IOB_DMA_RXCH_RESET_TINTC;
0639 
0640     write_iob_reg(PAS_IOB_DMA_RXCH_RESET(mac->rx->chan.chno), reg);
0641 }
0642 
0643 static void pasemi_mac_restart_tx_intr(const struct pasemi_mac *mac)
0644 {
0645     unsigned int reg, pcnt;
0646 
0647     /* Re-enable packet count interrupts */
0648     pcnt = *tx_ring(mac)->chan.status & PAS_STATUS_PCNT_M;
0649 
0650     reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
0651 
0652     write_iob_reg(PAS_IOB_DMA_TXCH_RESET(tx_ring(mac)->chan.chno), reg);
0653 }
0654 
0655 
0656 static inline void pasemi_mac_rx_error(const struct pasemi_mac *mac,
0657                        const u64 macrx)
0658 {
0659     unsigned int rcmdsta, ccmdsta;
0660     struct pasemi_dmachan *chan = &rx_ring(mac)->chan;
0661 
0662     if (!netif_msg_rx_err(mac))
0663         return;
0664 
0665     rcmdsta = read_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
0666     ccmdsta = read_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(chan->chno));
0667 
0668     printk(KERN_ERR "pasemi_mac: rx error. macrx %016llx, rx status %llx\n",
0669         macrx, *chan->status);
0670 
0671     printk(KERN_ERR "pasemi_mac: rcmdsta %08x ccmdsta %08x\n",
0672         rcmdsta, ccmdsta);
0673 }
0674 
0675 static inline void pasemi_mac_tx_error(const struct pasemi_mac *mac,
0676                        const u64 mactx)
0677 {
0678     unsigned int cmdsta;
0679     struct pasemi_dmachan *chan = &tx_ring(mac)->chan;
0680 
0681     if (!netif_msg_tx_err(mac))
0682         return;
0683 
0684     cmdsta = read_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(chan->chno));
0685 
0686     printk(KERN_ERR "pasemi_mac: tx error. mactx 0x%016llx, "\
0687         "tx status 0x%016llx\n", mactx, *chan->status);
0688 
0689     printk(KERN_ERR "pasemi_mac: tcmdsta 0x%08x\n", cmdsta);
0690 }
0691 
0692 static int pasemi_mac_clean_rx(struct pasemi_mac_rxring *rx,
0693                    const int limit)
0694 {
0695     const struct pasemi_dmachan *chan = &rx->chan;
0696     struct pasemi_mac *mac = rx->mac;
0697     struct pci_dev *pdev = mac->dma_pdev;
0698     unsigned int n;
0699     int count, buf_index, tot_bytes, packets;
0700     struct pasemi_mac_buffer *info;
0701     struct sk_buff *skb;
0702     unsigned int len;
0703     u64 macrx, eval;
0704     dma_addr_t dma;
0705 
0706     tot_bytes = 0;
0707     packets = 0;
0708 
0709     spin_lock(&rx->lock);
0710 
0711     n = rx->next_to_clean;
0712 
0713     prefetch(&RX_DESC(rx, n));
0714 
0715     for (count = 0; count < limit; count++) {
0716         macrx = RX_DESC(rx, n);
0717         prefetch(&RX_DESC(rx, n+4));
0718 
0719         if ((macrx & XCT_MACRX_E) ||
0720             (*chan->status & PAS_STATUS_ERROR))
0721             pasemi_mac_rx_error(mac, macrx);
0722 
0723         if (!(macrx & XCT_MACRX_O))
0724             break;
0725 
0726         info = NULL;
0727 
0728         BUG_ON(!(macrx & XCT_MACRX_RR_8BRES));
0729 
0730         eval = (RX_DESC(rx, n+1) & XCT_RXRES_8B_EVAL_M) >>
0731             XCT_RXRES_8B_EVAL_S;
0732         buf_index = eval-1;
0733 
0734         dma = (RX_DESC(rx, n+2) & XCT_PTR_ADDR_M);
0735         info = &RX_DESC_INFO(rx, buf_index);
0736 
0737         skb = info->skb;
0738 
0739         prefetch_skb(skb);
0740 
0741         len = (macrx & XCT_MACRX_LLEN_M) >> XCT_MACRX_LLEN_S;
0742 
0743         dma_unmap_single(&pdev->dev, dma,
0744                  mac->bufsz - LOCAL_SKB_ALIGN,
0745                  DMA_FROM_DEVICE);
0746 
0747         if (macrx & XCT_MACRX_CRC) {
0748             /* CRC error flagged */
0749             mac->netdev->stats.rx_errors++;
0750             mac->netdev->stats.rx_crc_errors++;
0751             /* No need to free skb, it'll be reused */
0752             goto next;
0753         }
0754 
0755         info->skb = NULL;
0756         info->dma = 0;
0757 
0758         if (likely((macrx & XCT_MACRX_HTY_M) == XCT_MACRX_HTY_IPV4_OK)) {
0759             skb->ip_summed = CHECKSUM_UNNECESSARY;
0760             skb->csum = (macrx & XCT_MACRX_CSUM_M) >>
0761                        XCT_MACRX_CSUM_S;
0762         } else {
0763             skb_checksum_none_assert(skb);
0764         }
0765 
0766         packets++;
0767         tot_bytes += len;
0768 
0769         /* Don't include CRC */
0770         skb_put(skb, len-4);
0771 
0772         skb->protocol = eth_type_trans(skb, mac->netdev);
0773         napi_gro_receive(&mac->napi, skb);
0774 
0775 next:
0776         RX_DESC(rx, n) = 0;
0777         RX_DESC(rx, n+1) = 0;
0778 
0779         /* Need to zero it out since hardware doesn't, since the
0780          * replenish loop uses it to tell when it's done.
0781          */
0782         RX_BUFF(rx, buf_index) = 0;
0783 
0784         n += 4;
0785     }
0786 
0787     if (n > RX_RING_SIZE) {
0788         /* Errata 5971 workaround: L2 target of headers */
0789         write_iob_reg(PAS_IOB_COM_PKTHDRCNT, 0);
0790         n &= (RX_RING_SIZE-1);
0791     }
0792 
0793     rx_ring(mac)->next_to_clean = n;
0794 
0795     /* Increase is in number of 16-byte entries, and since each descriptor
0796      * with an 8BRES takes up 3x8 bytes (padded to 4x8), increase with
0797      * count*2.
0798      */
0799     write_dma_reg(PAS_DMA_RXCHAN_INCR(mac->rx->chan.chno), count << 1);
0800 
0801     pasemi_mac_replenish_rx_ring(mac->netdev, count);
0802 
0803     mac->netdev->stats.rx_bytes += tot_bytes;
0804     mac->netdev->stats.rx_packets += packets;
0805 
0806     spin_unlock(&rx_ring(mac)->lock);
0807 
0808     return count;
0809 }
0810 
0811 /* Can't make this too large or we blow the kernel stack limits */
0812 #define TX_CLEAN_BATCHSIZE (128/MAX_SKB_FRAGS)
0813 
0814 static int pasemi_mac_clean_tx(struct pasemi_mac_txring *txring)
0815 {
0816     struct pasemi_dmachan *chan = &txring->chan;
0817     struct pasemi_mac *mac = txring->mac;
0818     int i, j;
0819     unsigned int start, descr_count, buf_count, batch_limit;
0820     unsigned int ring_limit;
0821     unsigned int total_count;
0822     unsigned long flags;
0823     struct sk_buff *skbs[TX_CLEAN_BATCHSIZE];
0824     dma_addr_t dmas[TX_CLEAN_BATCHSIZE][MAX_SKB_FRAGS+1];
0825     int nf[TX_CLEAN_BATCHSIZE];
0826     int nr_frags;
0827 
0828     total_count = 0;
0829     batch_limit = TX_CLEAN_BATCHSIZE;
0830 restart:
0831     spin_lock_irqsave(&txring->lock, flags);
0832 
0833     start = txring->next_to_clean;
0834     ring_limit = txring->next_to_fill;
0835 
0836     prefetch(&TX_DESC_INFO(txring, start+1).skb);
0837 
0838     /* Compensate for when fill has wrapped but clean has not */
0839     if (start > ring_limit)
0840         ring_limit += TX_RING_SIZE;
0841 
0842     buf_count = 0;
0843     descr_count = 0;
0844 
0845     for (i = start;
0846          descr_count < batch_limit && i < ring_limit;
0847          i += buf_count) {
0848         u64 mactx = TX_DESC(txring, i);
0849         struct sk_buff *skb;
0850 
0851         if ((mactx  & XCT_MACTX_E) ||
0852             (*chan->status & PAS_STATUS_ERROR))
0853             pasemi_mac_tx_error(mac, mactx);
0854 
0855         /* Skip over control descriptors */
0856         if (!(mactx & XCT_MACTX_LLEN_M)) {
0857             TX_DESC(txring, i) = 0;
0858             TX_DESC(txring, i+1) = 0;
0859             buf_count = 2;
0860             continue;
0861         }
0862 
0863         skb = TX_DESC_INFO(txring, i+1).skb;
0864         nr_frags = TX_DESC_INFO(txring, i).dma;
0865 
0866         if (unlikely(mactx & XCT_MACTX_O))
0867             /* Not yet transmitted */
0868             break;
0869 
0870         buf_count = 2 + nr_frags;
0871         /* Since we always fill with an even number of entries, make
0872          * sure we skip any unused one at the end as well.
0873          */
0874         if (buf_count & 1)
0875             buf_count++;
0876 
0877         for (j = 0; j <= nr_frags; j++)
0878             dmas[descr_count][j] = TX_DESC_INFO(txring, i+1+j).dma;
0879 
0880         skbs[descr_count] = skb;
0881         nf[descr_count] = nr_frags;
0882 
0883         TX_DESC(txring, i) = 0;
0884         TX_DESC(txring, i+1) = 0;
0885 
0886         descr_count++;
0887     }
0888     txring->next_to_clean = i & (TX_RING_SIZE-1);
0889 
0890     spin_unlock_irqrestore(&txring->lock, flags);
0891     netif_wake_queue(mac->netdev);
0892 
0893     for (i = 0; i < descr_count; i++)
0894         pasemi_mac_unmap_tx_skb(mac, nf[i], skbs[i], dmas[i]);
0895 
0896     total_count += descr_count;
0897 
0898     /* If the batch was full, try to clean more */
0899     if (descr_count == batch_limit)
0900         goto restart;
0901 
0902     return total_count;
0903 }
0904 
0905 
0906 static irqreturn_t pasemi_mac_rx_intr(int irq, void *data)
0907 {
0908     const struct pasemi_mac_rxring *rxring = data;
0909     struct pasemi_mac *mac = rxring->mac;
0910     const struct pasemi_dmachan *chan = &rxring->chan;
0911     unsigned int reg;
0912 
0913     if (!(*chan->status & PAS_STATUS_CAUSE_M))
0914         return IRQ_NONE;
0915 
0916     /* Don't reset packet count so it won't fire again but clear
0917      * all others.
0918      */
0919 
0920     reg = 0;
0921     if (*chan->status & PAS_STATUS_SOFT)
0922         reg |= PAS_IOB_DMA_RXCH_RESET_SINTC;
0923     if (*chan->status & PAS_STATUS_ERROR)
0924         reg |= PAS_IOB_DMA_RXCH_RESET_DINTC;
0925 
0926     napi_schedule(&mac->napi);
0927 
0928     write_iob_reg(PAS_IOB_DMA_RXCH_RESET(chan->chno), reg);
0929 
0930     return IRQ_HANDLED;
0931 }
0932 
0933 #define TX_CLEAN_INTERVAL HZ
0934 
0935 static void pasemi_mac_tx_timer(struct timer_list *t)
0936 {
0937     struct pasemi_mac_txring *txring = from_timer(txring, t, clean_timer);
0938     struct pasemi_mac *mac = txring->mac;
0939 
0940     pasemi_mac_clean_tx(txring);
0941 
0942     mod_timer(&txring->clean_timer, jiffies + TX_CLEAN_INTERVAL);
0943 
0944     pasemi_mac_restart_tx_intr(mac);
0945 }
0946 
0947 static irqreturn_t pasemi_mac_tx_intr(int irq, void *data)
0948 {
0949     struct pasemi_mac_txring *txring = data;
0950     const struct pasemi_dmachan *chan = &txring->chan;
0951     struct pasemi_mac *mac = txring->mac;
0952     unsigned int reg;
0953 
0954     if (!(*chan->status & PAS_STATUS_CAUSE_M))
0955         return IRQ_NONE;
0956 
0957     reg = 0;
0958 
0959     if (*chan->status & PAS_STATUS_SOFT)
0960         reg |= PAS_IOB_DMA_TXCH_RESET_SINTC;
0961     if (*chan->status & PAS_STATUS_ERROR)
0962         reg |= PAS_IOB_DMA_TXCH_RESET_DINTC;
0963 
0964     mod_timer(&txring->clean_timer, jiffies + (TX_CLEAN_INTERVAL)*2);
0965 
0966     napi_schedule(&mac->napi);
0967 
0968     if (reg)
0969         write_iob_reg(PAS_IOB_DMA_TXCH_RESET(chan->chno), reg);
0970 
0971     return IRQ_HANDLED;
0972 }
0973 
0974 static void pasemi_adjust_link(struct net_device *dev)
0975 {
0976     struct pasemi_mac *mac = netdev_priv(dev);
0977     int msg;
0978     unsigned int flags;
0979     unsigned int new_flags;
0980 
0981     if (!dev->phydev->link) {
0982         /* If no link, MAC speed settings don't matter. Just report
0983          * link down and return.
0984          */
0985         if (mac->link && netif_msg_link(mac))
0986             printk(KERN_INFO "%s: Link is down.\n", dev->name);
0987 
0988         netif_carrier_off(dev);
0989         pasemi_mac_intf_disable(mac);
0990         mac->link = 0;
0991 
0992         return;
0993     } else {
0994         pasemi_mac_intf_enable(mac);
0995         netif_carrier_on(dev);
0996     }
0997 
0998     flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
0999     new_flags = flags & ~(PAS_MAC_CFG_PCFG_HD | PAS_MAC_CFG_PCFG_SPD_M |
1000                   PAS_MAC_CFG_PCFG_TSR_M);
1001 
1002     if (!dev->phydev->duplex)
1003         new_flags |= PAS_MAC_CFG_PCFG_HD;
1004 
1005     switch (dev->phydev->speed) {
1006     case 1000:
1007         new_flags |= PAS_MAC_CFG_PCFG_SPD_1G |
1008                  PAS_MAC_CFG_PCFG_TSR_1G;
1009         break;
1010     case 100:
1011         new_flags |= PAS_MAC_CFG_PCFG_SPD_100M |
1012                  PAS_MAC_CFG_PCFG_TSR_100M;
1013         break;
1014     case 10:
1015         new_flags |= PAS_MAC_CFG_PCFG_SPD_10M |
1016                  PAS_MAC_CFG_PCFG_TSR_10M;
1017         break;
1018     default:
1019         printk("Unsupported speed %d\n", dev->phydev->speed);
1020     }
1021 
1022     /* Print on link or speed/duplex change */
1023     msg = mac->link != dev->phydev->link || flags != new_flags;
1024 
1025     mac->duplex = dev->phydev->duplex;
1026     mac->speed = dev->phydev->speed;
1027     mac->link = dev->phydev->link;
1028 
1029     if (new_flags != flags)
1030         write_mac_reg(mac, PAS_MAC_CFG_PCFG, new_flags);
1031 
1032     if (msg && netif_msg_link(mac))
1033         printk(KERN_INFO "%s: Link is up at %d Mbps, %s duplex.\n",
1034                dev->name, mac->speed, mac->duplex ? "full" : "half");
1035 }
1036 
1037 static int pasemi_mac_phy_init(struct net_device *dev)
1038 {
1039     struct pasemi_mac *mac = netdev_priv(dev);
1040     struct device_node *dn, *phy_dn;
1041     struct phy_device *phydev;
1042 
1043     dn = pci_device_to_OF_node(mac->pdev);
1044     phy_dn = of_parse_phandle(dn, "phy-handle", 0);
1045 
1046     mac->link = 0;
1047     mac->speed = 0;
1048     mac->duplex = -1;
1049 
1050     phydev = of_phy_connect(dev, phy_dn, &pasemi_adjust_link, 0,
1051                 PHY_INTERFACE_MODE_SGMII);
1052 
1053     of_node_put(phy_dn);
1054     if (!phydev) {
1055         printk(KERN_ERR "%s: Could not attach to phy\n", dev->name);
1056         return -ENODEV;
1057     }
1058 
1059     return 0;
1060 }
1061 
1062 
1063 static int pasemi_mac_open(struct net_device *dev)
1064 {
1065     struct pasemi_mac *mac = netdev_priv(dev);
1066     unsigned int flags;
1067     int i, ret;
1068 
1069     flags = PAS_MAC_CFG_TXP_FCE | PAS_MAC_CFG_TXP_FPC(3) |
1070         PAS_MAC_CFG_TXP_SL(3) | PAS_MAC_CFG_TXP_COB(0xf) |
1071         PAS_MAC_CFG_TXP_TIFT(8) | PAS_MAC_CFG_TXP_TIFG(12);
1072 
1073     write_mac_reg(mac, PAS_MAC_CFG_TXP, flags);
1074 
1075     ret = pasemi_mac_setup_rx_resources(dev);
1076     if (ret)
1077         goto out_rx_resources;
1078 
1079     mac->tx = pasemi_mac_setup_tx_resources(dev);
1080 
1081     if (!mac->tx) {
1082         ret = -ENOMEM;
1083         goto out_tx_ring;
1084     }
1085 
1086     /* We might already have allocated rings in case mtu was changed
1087      * before interface was brought up.
1088      */
1089     if (dev->mtu > 1500 && !mac->num_cs) {
1090         pasemi_mac_setup_csrings(mac);
1091         if (!mac->num_cs) {
1092             ret = -ENOMEM;
1093             goto out_tx_ring;
1094         }
1095     }
1096 
1097     /* Zero out rmon counters */
1098     for (i = 0; i < 32; i++)
1099         write_mac_reg(mac, PAS_MAC_RMON(i), 0);
1100 
1101     /* 0x3ff with 33MHz clock is about 31us */
1102     write_iob_reg(PAS_IOB_DMA_COM_TIMEOUTCFG,
1103               PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0x3ff));
1104 
1105     write_iob_reg(PAS_IOB_DMA_RXCH_CFG(mac->rx->chan.chno),
1106               PAS_IOB_DMA_RXCH_CFG_CNTTH(256));
1107 
1108     write_iob_reg(PAS_IOB_DMA_TXCH_CFG(mac->tx->chan.chno),
1109               PAS_IOB_DMA_TXCH_CFG_CNTTH(32));
1110 
1111     write_mac_reg(mac, PAS_MAC_IPC_CHNL,
1112               PAS_MAC_IPC_CHNL_DCHNO(mac->rx->chan.chno) |
1113               PAS_MAC_IPC_CHNL_BCH(mac->rx->chan.chno));
1114 
1115     /* enable rx if */
1116     write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
1117               PAS_DMA_RXINT_RCMDSTA_EN |
1118               PAS_DMA_RXINT_RCMDSTA_DROPS_M |
1119               PAS_DMA_RXINT_RCMDSTA_BP |
1120               PAS_DMA_RXINT_RCMDSTA_OO |
1121               PAS_DMA_RXINT_RCMDSTA_BT);
1122 
1123     /* enable rx channel */
1124     pasemi_dma_start_chan(&rx_ring(mac)->chan, PAS_DMA_RXCHAN_CCMDSTA_DU |
1125                            PAS_DMA_RXCHAN_CCMDSTA_OD |
1126                            PAS_DMA_RXCHAN_CCMDSTA_FD |
1127                            PAS_DMA_RXCHAN_CCMDSTA_DT);
1128 
1129     /* enable tx channel */
1130     pasemi_dma_start_chan(&tx_ring(mac)->chan, PAS_DMA_TXCHAN_TCMDSTA_SZ |
1131                            PAS_DMA_TXCHAN_TCMDSTA_DB |
1132                            PAS_DMA_TXCHAN_TCMDSTA_DE |
1133                            PAS_DMA_TXCHAN_TCMDSTA_DA);
1134 
1135     pasemi_mac_replenish_rx_ring(dev, RX_RING_SIZE);
1136 
1137     write_dma_reg(PAS_DMA_RXCHAN_INCR(rx_ring(mac)->chan.chno),
1138               RX_RING_SIZE>>1);
1139 
1140     /* Clear out any residual packet count state from firmware */
1141     pasemi_mac_restart_rx_intr(mac);
1142     pasemi_mac_restart_tx_intr(mac);
1143 
1144     flags = PAS_MAC_CFG_PCFG_S1 | PAS_MAC_CFG_PCFG_PR | PAS_MAC_CFG_PCFG_CE;
1145 
1146     if (mac->type == MAC_TYPE_GMAC)
1147         flags |= PAS_MAC_CFG_PCFG_TSR_1G | PAS_MAC_CFG_PCFG_SPD_1G;
1148     else
1149         flags |= PAS_MAC_CFG_PCFG_TSR_10G | PAS_MAC_CFG_PCFG_SPD_10G;
1150 
1151     /* Enable interface in MAC */
1152     write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
1153 
1154     ret = pasemi_mac_phy_init(dev);
1155     if (ret) {
1156         /* Since we won't get link notification, just enable RX */
1157         pasemi_mac_intf_enable(mac);
1158         if (mac->type == MAC_TYPE_GMAC) {
1159             /* Warn for missing PHY on SGMII (1Gig) ports */
1160             dev_warn(&mac->pdev->dev,
1161                  "PHY init failed: %d.\n", ret);
1162             dev_warn(&mac->pdev->dev,
1163                  "Defaulting to 1Gbit full duplex\n");
1164         }
1165     }
1166 
1167     netif_start_queue(dev);
1168     napi_enable(&mac->napi);
1169 
1170     snprintf(mac->tx_irq_name, sizeof(mac->tx_irq_name), "%s tx",
1171          dev->name);
1172 
1173     ret = request_irq(mac->tx->chan.irq, pasemi_mac_tx_intr, 0,
1174               mac->tx_irq_name, mac->tx);
1175     if (ret) {
1176         dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
1177             mac->tx->chan.irq, ret);
1178         goto out_tx_int;
1179     }
1180 
1181     snprintf(mac->rx_irq_name, sizeof(mac->rx_irq_name), "%s rx",
1182          dev->name);
1183 
1184     ret = request_irq(mac->rx->chan.irq, pasemi_mac_rx_intr, 0,
1185               mac->rx_irq_name, mac->rx);
1186     if (ret) {
1187         dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
1188             mac->rx->chan.irq, ret);
1189         goto out_rx_int;
1190     }
1191 
1192     if (dev->phydev)
1193         phy_start(dev->phydev);
1194 
1195     timer_setup(&mac->tx->clean_timer, pasemi_mac_tx_timer, 0);
1196     mod_timer(&mac->tx->clean_timer, jiffies + HZ);
1197 
1198     return 0;
1199 
1200 out_rx_int:
1201     free_irq(mac->tx->chan.irq, mac->tx);
1202 out_tx_int:
1203     napi_disable(&mac->napi);
1204     netif_stop_queue(dev);
1205 out_tx_ring:
1206     if (mac->tx)
1207         pasemi_mac_free_tx_resources(mac);
1208     pasemi_mac_free_rx_resources(mac);
1209 out_rx_resources:
1210 
1211     return ret;
1212 }
1213 
1214 #define MAX_RETRIES 5000
1215 
1216 static void pasemi_mac_pause_txchan(struct pasemi_mac *mac)
1217 {
1218     unsigned int sta, retries;
1219     int txch = tx_ring(mac)->chan.chno;
1220 
1221     write_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch),
1222               PAS_DMA_TXCHAN_TCMDSTA_ST);
1223 
1224     for (retries = 0; retries < MAX_RETRIES; retries++) {
1225         sta = read_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch));
1226         if (!(sta & PAS_DMA_TXCHAN_TCMDSTA_ACT))
1227             break;
1228         cond_resched();
1229     }
1230 
1231     if (sta & PAS_DMA_TXCHAN_TCMDSTA_ACT)
1232         dev_err(&mac->dma_pdev->dev,
1233             "Failed to stop tx channel, tcmdsta %08x\n", sta);
1234 
1235     write_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch), 0);
1236 }
1237 
1238 static void pasemi_mac_pause_rxchan(struct pasemi_mac *mac)
1239 {
1240     unsigned int sta, retries;
1241     int rxch = rx_ring(mac)->chan.chno;
1242 
1243     write_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch),
1244               PAS_DMA_RXCHAN_CCMDSTA_ST);
1245     for (retries = 0; retries < MAX_RETRIES; retries++) {
1246         sta = read_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch));
1247         if (!(sta & PAS_DMA_RXCHAN_CCMDSTA_ACT))
1248             break;
1249         cond_resched();
1250     }
1251 
1252     if (sta & PAS_DMA_RXCHAN_CCMDSTA_ACT)
1253         dev_err(&mac->dma_pdev->dev,
1254             "Failed to stop rx channel, ccmdsta 08%x\n", sta);
1255     write_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch), 0);
1256 }
1257 
1258 static void pasemi_mac_pause_rxint(struct pasemi_mac *mac)
1259 {
1260     unsigned int sta, retries;
1261 
1262     write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
1263               PAS_DMA_RXINT_RCMDSTA_ST);
1264     for (retries = 0; retries < MAX_RETRIES; retries++) {
1265         sta = read_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
1266         if (!(sta & PAS_DMA_RXINT_RCMDSTA_ACT))
1267             break;
1268         cond_resched();
1269     }
1270 
1271     if (sta & PAS_DMA_RXINT_RCMDSTA_ACT)
1272         dev_err(&mac->dma_pdev->dev,
1273             "Failed to stop rx interface, rcmdsta %08x\n", sta);
1274     write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if), 0);
1275 }
1276 
1277 static int pasemi_mac_close(struct net_device *dev)
1278 {
1279     struct pasemi_mac *mac = netdev_priv(dev);
1280     unsigned int sta;
1281     int rxch, txch, i;
1282 
1283     rxch = rx_ring(mac)->chan.chno;
1284     txch = tx_ring(mac)->chan.chno;
1285 
1286     if (dev->phydev) {
1287         phy_stop(dev->phydev);
1288         phy_disconnect(dev->phydev);
1289     }
1290 
1291     del_timer_sync(&mac->tx->clean_timer);
1292 
1293     netif_stop_queue(dev);
1294     napi_disable(&mac->napi);
1295 
1296     sta = read_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
1297     if (sta & (PAS_DMA_RXINT_RCMDSTA_BP |
1298               PAS_DMA_RXINT_RCMDSTA_OO |
1299               PAS_DMA_RXINT_RCMDSTA_BT))
1300         printk(KERN_DEBUG "pasemi_mac: rcmdsta error: 0x%08x\n", sta);
1301 
1302     sta = read_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch));
1303     if (sta & (PAS_DMA_RXCHAN_CCMDSTA_DU |
1304              PAS_DMA_RXCHAN_CCMDSTA_OD |
1305              PAS_DMA_RXCHAN_CCMDSTA_FD |
1306              PAS_DMA_RXCHAN_CCMDSTA_DT))
1307         printk(KERN_DEBUG "pasemi_mac: ccmdsta error: 0x%08x\n", sta);
1308 
1309     sta = read_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch));
1310     if (sta & (PAS_DMA_TXCHAN_TCMDSTA_SZ | PAS_DMA_TXCHAN_TCMDSTA_DB |
1311               PAS_DMA_TXCHAN_TCMDSTA_DE | PAS_DMA_TXCHAN_TCMDSTA_DA))
1312         printk(KERN_DEBUG "pasemi_mac: tcmdsta error: 0x%08x\n", sta);
1313 
1314     /* Clean out any pending buffers */
1315     pasemi_mac_clean_tx(tx_ring(mac));
1316     pasemi_mac_clean_rx(rx_ring(mac), RX_RING_SIZE);
1317 
1318     pasemi_mac_pause_txchan(mac);
1319     pasemi_mac_pause_rxint(mac);
1320     pasemi_mac_pause_rxchan(mac);
1321     pasemi_mac_intf_disable(mac);
1322 
1323     free_irq(mac->tx->chan.irq, mac->tx);
1324     free_irq(mac->rx->chan.irq, mac->rx);
1325 
1326     for (i = 0; i < mac->num_cs; i++) {
1327         pasemi_mac_free_csring(mac->cs[i]);
1328         mac->cs[i] = NULL;
1329     }
1330 
1331     mac->num_cs = 0;
1332 
1333     /* Free resources */
1334     pasemi_mac_free_rx_resources(mac);
1335     pasemi_mac_free_tx_resources(mac);
1336 
1337     return 0;
1338 }
1339 
1340 static void pasemi_mac_queue_csdesc(const struct sk_buff *skb,
1341                     const dma_addr_t *map,
1342                     const unsigned int *map_size,
1343                     struct pasemi_mac_txring *txring,
1344                     struct pasemi_mac_csring *csring)
1345 {
1346     u64 fund;
1347     dma_addr_t cs_dest;
1348     const int nh_off = skb_network_offset(skb);
1349     const int nh_len = skb_network_header_len(skb);
1350     const int nfrags = skb_shinfo(skb)->nr_frags;
1351     int cs_size, i, fill, hdr, evt;
1352     dma_addr_t csdma;
1353 
1354     fund = XCT_FUN_ST | XCT_FUN_RR_8BRES |
1355            XCT_FUN_O | XCT_FUN_FUN(csring->fun) |
1356            XCT_FUN_CRM_SIG | XCT_FUN_LLEN(skb->len - nh_off) |
1357            XCT_FUN_SHL(nh_len >> 2) | XCT_FUN_SE;
1358 
1359     switch (ip_hdr(skb)->protocol) {
1360     case IPPROTO_TCP:
1361         fund |= XCT_FUN_SIG_TCP4;
1362         /* TCP checksum is 16 bytes into the header */
1363         cs_dest = map[0] + skb_transport_offset(skb) + 16;
1364         break;
1365     case IPPROTO_UDP:
1366         fund |= XCT_FUN_SIG_UDP4;
1367         /* UDP checksum is 6 bytes into the header */
1368         cs_dest = map[0] + skb_transport_offset(skb) + 6;
1369         break;
1370     default:
1371         BUG();
1372     }
1373 
1374     /* Do the checksum offloaded */
1375     fill = csring->next_to_fill;
1376     hdr = fill;
1377 
1378     CS_DESC(csring, fill++) = fund;
1379     /* Room for 8BRES. Checksum result is really 2 bytes into it */
1380     csdma = csring->chan.ring_dma + (fill & (CS_RING_SIZE-1)) * 8 + 2;
1381     CS_DESC(csring, fill++) = 0;
1382 
1383     CS_DESC(csring, fill) = XCT_PTR_LEN(map_size[0]-nh_off) | XCT_PTR_ADDR(map[0]+nh_off);
1384     for (i = 1; i <= nfrags; i++)
1385         CS_DESC(csring, fill+i) = XCT_PTR_LEN(map_size[i]) | XCT_PTR_ADDR(map[i]);
1386 
1387     fill += i;
1388     if (fill & 1)
1389         fill++;
1390 
1391     /* Copy the result into the TCP packet */
1392     CS_DESC(csring, fill++) = XCT_FUN_O | XCT_FUN_FUN(csring->fun) |
1393                   XCT_FUN_LLEN(2) | XCT_FUN_SE;
1394     CS_DESC(csring, fill++) = XCT_PTR_LEN(2) | XCT_PTR_ADDR(cs_dest) | XCT_PTR_T;
1395     CS_DESC(csring, fill++) = XCT_PTR_LEN(2) | XCT_PTR_ADDR(csdma);
1396     fill++;
1397 
1398     evt = !csring->last_event;
1399     csring->last_event = evt;
1400 
1401     /* Event handshaking with MAC TX */
1402     CS_DESC(csring, fill++) = CTRL_CMD_T | CTRL_CMD_META_EVT | CTRL_CMD_O |
1403                   CTRL_CMD_ETYPE_SET | CTRL_CMD_REG(csring->events[evt]);
1404     CS_DESC(csring, fill++) = 0;
1405     CS_DESC(csring, fill++) = CTRL_CMD_T | CTRL_CMD_META_EVT | CTRL_CMD_O |
1406                   CTRL_CMD_ETYPE_WCLR | CTRL_CMD_REG(csring->events[!evt]);
1407     CS_DESC(csring, fill++) = 0;
1408     csring->next_to_fill = fill & (CS_RING_SIZE-1);
1409 
1410     cs_size = fill - hdr;
1411     write_dma_reg(PAS_DMA_TXCHAN_INCR(csring->chan.chno), (cs_size) >> 1);
1412 
1413     /* TX-side event handshaking */
1414     fill = txring->next_to_fill;
1415     TX_DESC(txring, fill++) = CTRL_CMD_T | CTRL_CMD_META_EVT | CTRL_CMD_O |
1416                   CTRL_CMD_ETYPE_WSET | CTRL_CMD_REG(csring->events[evt]);
1417     TX_DESC(txring, fill++) = 0;
1418     TX_DESC(txring, fill++) = CTRL_CMD_T | CTRL_CMD_META_EVT | CTRL_CMD_O |
1419                   CTRL_CMD_ETYPE_CLR | CTRL_CMD_REG(csring->events[!evt]);
1420     TX_DESC(txring, fill++) = 0;
1421     txring->next_to_fill = fill;
1422 
1423     write_dma_reg(PAS_DMA_TXCHAN_INCR(txring->chan.chno), 2);
1424 }
1425 
1426 static int pasemi_mac_start_tx(struct sk_buff *skb, struct net_device *dev)
1427 {
1428     struct pasemi_mac * const mac = netdev_priv(dev);
1429     struct pasemi_mac_txring * const txring = tx_ring(mac);
1430     struct pasemi_mac_csring *csring;
1431     u64 dflags = 0;
1432     u64 mactx;
1433     dma_addr_t map[MAX_SKB_FRAGS+1];
1434     unsigned int map_size[MAX_SKB_FRAGS+1];
1435     unsigned long flags;
1436     int i, nfrags;
1437     int fill;
1438     const int nh_off = skb_network_offset(skb);
1439     const int nh_len = skb_network_header_len(skb);
1440 
1441     prefetch(&txring->ring_info);
1442 
1443     dflags = XCT_MACTX_O | XCT_MACTX_ST | XCT_MACTX_CRC_PAD;
1444 
1445     nfrags = skb_shinfo(skb)->nr_frags;
1446 
1447     map[0] = dma_map_single(&mac->dma_pdev->dev, skb->data,
1448                 skb_headlen(skb), DMA_TO_DEVICE);
1449     map_size[0] = skb_headlen(skb);
1450     if (dma_mapping_error(&mac->dma_pdev->dev, map[0]))
1451         goto out_err_nolock;
1452 
1453     for (i = 0; i < nfrags; i++) {
1454         skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1455 
1456         map[i + 1] = skb_frag_dma_map(&mac->dma_pdev->dev, frag, 0,
1457                           skb_frag_size(frag), DMA_TO_DEVICE);
1458         map_size[i+1] = skb_frag_size(frag);
1459         if (dma_mapping_error(&mac->dma_pdev->dev, map[i + 1])) {
1460             nfrags = i;
1461             goto out_err_nolock;
1462         }
1463     }
1464 
1465     if (skb->ip_summed == CHECKSUM_PARTIAL && skb->len <= 1540) {
1466         switch (ip_hdr(skb)->protocol) {
1467         case IPPROTO_TCP:
1468             dflags |= XCT_MACTX_CSUM_TCP;
1469             dflags |= XCT_MACTX_IPH(nh_len >> 2);
1470             dflags |= XCT_MACTX_IPO(nh_off);
1471             break;
1472         case IPPROTO_UDP:
1473             dflags |= XCT_MACTX_CSUM_UDP;
1474             dflags |= XCT_MACTX_IPH(nh_len >> 2);
1475             dflags |= XCT_MACTX_IPO(nh_off);
1476             break;
1477         default:
1478             WARN_ON(1);
1479         }
1480     }
1481 
1482     mactx = dflags | XCT_MACTX_LLEN(skb->len);
1483 
1484     spin_lock_irqsave(&txring->lock, flags);
1485 
1486     /* Avoid stepping on the same cache line that the DMA controller
1487      * is currently about to send, so leave at least 8 words available.
1488      * Total free space needed is mactx + fragments + 8
1489      */
1490     if (RING_AVAIL(txring) < nfrags + 14) {
1491         /* no room -- stop the queue and wait for tx intr */
1492         netif_stop_queue(dev);
1493         goto out_err;
1494     }
1495 
1496     /* Queue up checksum + event descriptors, if needed */
1497     if (mac->num_cs && skb->ip_summed == CHECKSUM_PARTIAL && skb->len > 1540) {
1498         csring = mac->cs[mac->last_cs];
1499         mac->last_cs = (mac->last_cs + 1) % mac->num_cs;
1500 
1501         pasemi_mac_queue_csdesc(skb, map, map_size, txring, csring);
1502     }
1503 
1504     fill = txring->next_to_fill;
1505     TX_DESC(txring, fill) = mactx;
1506     TX_DESC_INFO(txring, fill).dma = nfrags;
1507     fill++;
1508     TX_DESC_INFO(txring, fill).skb = skb;
1509     for (i = 0; i <= nfrags; i++) {
1510         TX_DESC(txring, fill+i) =
1511             XCT_PTR_LEN(map_size[i]) | XCT_PTR_ADDR(map[i]);
1512         TX_DESC_INFO(txring, fill+i).dma = map[i];
1513     }
1514 
1515     /* We have to add an even number of 8-byte entries to the ring
1516      * even if the last one is unused. That means always an odd number
1517      * of pointers + one mactx descriptor.
1518      */
1519     if (nfrags & 1)
1520         nfrags++;
1521 
1522     txring->next_to_fill = (fill + nfrags + 1) & (TX_RING_SIZE-1);
1523 
1524     dev->stats.tx_packets++;
1525     dev->stats.tx_bytes += skb->len;
1526 
1527     spin_unlock_irqrestore(&txring->lock, flags);
1528 
1529     write_dma_reg(PAS_DMA_TXCHAN_INCR(txring->chan.chno), (nfrags+2) >> 1);
1530 
1531     return NETDEV_TX_OK;
1532 
1533 out_err:
1534     spin_unlock_irqrestore(&txring->lock, flags);
1535 out_err_nolock:
1536     while (nfrags--)
1537         dma_unmap_single(&mac->dma_pdev->dev, map[nfrags],
1538                  map_size[nfrags], DMA_TO_DEVICE);
1539 
1540     return NETDEV_TX_BUSY;
1541 }
1542 
1543 static void pasemi_mac_set_rx_mode(struct net_device *dev)
1544 {
1545     const struct pasemi_mac *mac = netdev_priv(dev);
1546     unsigned int flags;
1547 
1548     flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
1549 
1550     /* Set promiscuous */
1551     if (dev->flags & IFF_PROMISC)
1552         flags |= PAS_MAC_CFG_PCFG_PR;
1553     else
1554         flags &= ~PAS_MAC_CFG_PCFG_PR;
1555 
1556     write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
1557 }
1558 
1559 
1560 static int pasemi_mac_poll(struct napi_struct *napi, int budget)
1561 {
1562     struct pasemi_mac *mac = container_of(napi, struct pasemi_mac, napi);
1563     int pkts;
1564 
1565     pasemi_mac_clean_tx(tx_ring(mac));
1566     pkts = pasemi_mac_clean_rx(rx_ring(mac), budget);
1567     if (pkts < budget) {
1568         /* all done, no more packets present */
1569         napi_complete_done(napi, pkts);
1570 
1571         pasemi_mac_restart_rx_intr(mac);
1572         pasemi_mac_restart_tx_intr(mac);
1573     }
1574     return pkts;
1575 }
1576 
1577 #ifdef CONFIG_NET_POLL_CONTROLLER
1578 /*
1579  * Polling 'interrupt' - used by things like netconsole to send skbs
1580  * without having to re-enable interrupts. It's not called while
1581  * the interrupt routine is executing.
1582  */
1583 static void pasemi_mac_netpoll(struct net_device *dev)
1584 {
1585     const struct pasemi_mac *mac = netdev_priv(dev);
1586 
1587     disable_irq(mac->tx->chan.irq);
1588     pasemi_mac_tx_intr(mac->tx->chan.irq, mac->tx);
1589     enable_irq(mac->tx->chan.irq);
1590 
1591     disable_irq(mac->rx->chan.irq);
1592     pasemi_mac_rx_intr(mac->rx->chan.irq, mac->rx);
1593     enable_irq(mac->rx->chan.irq);
1594 }
1595 #endif
1596 
1597 static int pasemi_mac_change_mtu(struct net_device *dev, int new_mtu)
1598 {
1599     struct pasemi_mac *mac = netdev_priv(dev);
1600     unsigned int reg;
1601     unsigned int rcmdsta = 0;
1602     int running;
1603     int ret = 0;
1604 
1605     running = netif_running(dev);
1606 
1607     if (running) {
1608         /* Need to stop the interface, clean out all already
1609          * received buffers, free all unused buffers on the RX
1610          * interface ring, then finally re-fill the rx ring with
1611          * the new-size buffers and restart.
1612          */
1613 
1614         napi_disable(&mac->napi);
1615         netif_tx_disable(dev);
1616         pasemi_mac_intf_disable(mac);
1617 
1618         rcmdsta = read_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
1619         pasemi_mac_pause_rxint(mac);
1620         pasemi_mac_clean_rx(rx_ring(mac), RX_RING_SIZE);
1621         pasemi_mac_free_rx_buffers(mac);
1622 
1623     }
1624 
1625     /* Setup checksum channels if large MTU and none already allocated */
1626     if (new_mtu > PE_DEF_MTU && !mac->num_cs) {
1627         pasemi_mac_setup_csrings(mac);
1628         if (!mac->num_cs) {
1629             ret = -ENOMEM;
1630             goto out;
1631         }
1632     }
1633 
1634     /* Change maxf, i.e. what size frames are accepted.
1635      * Need room for ethernet header and CRC word
1636      */
1637     reg = read_mac_reg(mac, PAS_MAC_CFG_MACCFG);
1638     reg &= ~PAS_MAC_CFG_MACCFG_MAXF_M;
1639     reg |= PAS_MAC_CFG_MACCFG_MAXF(new_mtu + ETH_HLEN + 4);
1640     write_mac_reg(mac, PAS_MAC_CFG_MACCFG, reg);
1641 
1642     dev->mtu = new_mtu;
1643     /* MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
1644     mac->bufsz = new_mtu + ETH_HLEN + ETH_FCS_LEN + LOCAL_SKB_ALIGN + 128;
1645 
1646 out:
1647     if (running) {
1648         write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
1649                   rcmdsta | PAS_DMA_RXINT_RCMDSTA_EN);
1650 
1651         rx_ring(mac)->next_to_fill = 0;
1652         pasemi_mac_replenish_rx_ring(dev, RX_RING_SIZE-1);
1653 
1654         napi_enable(&mac->napi);
1655         netif_start_queue(dev);
1656         pasemi_mac_intf_enable(mac);
1657     }
1658 
1659     return ret;
1660 }
1661 
1662 static const struct net_device_ops pasemi_netdev_ops = {
1663     .ndo_open       = pasemi_mac_open,
1664     .ndo_stop       = pasemi_mac_close,
1665     .ndo_start_xmit     = pasemi_mac_start_tx,
1666     .ndo_set_rx_mode    = pasemi_mac_set_rx_mode,
1667     .ndo_set_mac_address    = pasemi_mac_set_mac_addr,
1668     .ndo_change_mtu     = pasemi_mac_change_mtu,
1669     .ndo_validate_addr  = eth_validate_addr,
1670 #ifdef CONFIG_NET_POLL_CONTROLLER
1671     .ndo_poll_controller    = pasemi_mac_netpoll,
1672 #endif
1673 };
1674 
1675 static int
1676 pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1677 {
1678     struct net_device *dev;
1679     struct pasemi_mac *mac;
1680     int err, ret;
1681 
1682     err = pci_enable_device(pdev);
1683     if (err)
1684         return err;
1685 
1686     dev = alloc_etherdev(sizeof(struct pasemi_mac));
1687     if (dev == NULL) {
1688         err = -ENOMEM;
1689         goto out_disable_device;
1690     }
1691 
1692     pci_set_drvdata(pdev, dev);
1693     SET_NETDEV_DEV(dev, &pdev->dev);
1694 
1695     mac = netdev_priv(dev);
1696 
1697     mac->pdev = pdev;
1698     mac->netdev = dev;
1699 
1700     netif_napi_add(dev, &mac->napi, pasemi_mac_poll, 64);
1701 
1702     dev->features = NETIF_F_IP_CSUM | NETIF_F_LLTX | NETIF_F_SG |
1703             NETIF_F_HIGHDMA | NETIF_F_GSO;
1704 
1705     mac->dma_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa007, NULL);
1706     if (!mac->dma_pdev) {
1707         dev_err(&mac->pdev->dev, "Can't find DMA Controller\n");
1708         err = -ENODEV;
1709         goto out;
1710     }
1711     dma_set_mask(&mac->dma_pdev->dev, DMA_BIT_MASK(64));
1712 
1713     mac->iob_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL);
1714     if (!mac->iob_pdev) {
1715         dev_err(&mac->pdev->dev, "Can't find I/O Bridge\n");
1716         err = -ENODEV;
1717         goto out;
1718     }
1719 
1720     /* get mac addr from device tree */
1721     if (pasemi_get_mac_addr(mac) || !is_valid_ether_addr(mac->mac_addr)) {
1722         err = -ENODEV;
1723         goto out;
1724     }
1725     eth_hw_addr_set(dev, mac->mac_addr);
1726 
1727     ret = mac_to_intf(mac);
1728     if (ret < 0) {
1729         dev_err(&mac->pdev->dev, "Can't map DMA interface\n");
1730         err = -ENODEV;
1731         goto out;
1732     }
1733     mac->dma_if = ret;
1734 
1735     switch (pdev->device) {
1736     case 0xa005:
1737         mac->type = MAC_TYPE_GMAC;
1738         break;
1739     case 0xa006:
1740         mac->type = MAC_TYPE_XAUI;
1741         break;
1742     default:
1743         err = -ENODEV;
1744         goto out;
1745     }
1746 
1747     dev->netdev_ops = &pasemi_netdev_ops;
1748     dev->mtu = PE_DEF_MTU;
1749 
1750     /* MTU range: 64 - 9000 */
1751     dev->min_mtu = PE_MIN_MTU;
1752     dev->max_mtu = PE_MAX_MTU;
1753 
1754     /* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
1755     mac->bufsz = dev->mtu + ETH_HLEN + ETH_FCS_LEN + LOCAL_SKB_ALIGN + 128;
1756 
1757     dev->ethtool_ops = &pasemi_mac_ethtool_ops;
1758 
1759     if (err)
1760         goto out;
1761 
1762     mac->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
1763 
1764     /* Enable most messages by default */
1765     mac->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1;
1766 
1767     err = register_netdev(dev);
1768 
1769     if (err) {
1770         dev_err(&mac->pdev->dev, "register_netdev failed with error %d\n",
1771             err);
1772         goto out;
1773     } else if (netif_msg_probe(mac)) {
1774         printk(KERN_INFO "%s: PA Semi %s: intf %d, hw addr %pM\n",
1775                dev->name, mac->type == MAC_TYPE_GMAC ? "GMAC" : "XAUI",
1776                mac->dma_if, dev->dev_addr);
1777     }
1778 
1779     return err;
1780 
1781 out:
1782     pci_dev_put(mac->iob_pdev);
1783     pci_dev_put(mac->dma_pdev);
1784 
1785     free_netdev(dev);
1786 out_disable_device:
1787     pci_disable_device(pdev);
1788     return err;
1789 
1790 }
1791 
1792 static void pasemi_mac_remove(struct pci_dev *pdev)
1793 {
1794     struct net_device *netdev = pci_get_drvdata(pdev);
1795     struct pasemi_mac *mac;
1796 
1797     if (!netdev)
1798         return;
1799 
1800     mac = netdev_priv(netdev);
1801 
1802     unregister_netdev(netdev);
1803 
1804     pci_disable_device(pdev);
1805     pci_dev_put(mac->dma_pdev);
1806     pci_dev_put(mac->iob_pdev);
1807 
1808     pasemi_dma_free_chan(&mac->tx->chan);
1809     pasemi_dma_free_chan(&mac->rx->chan);
1810 
1811     free_netdev(netdev);
1812 }
1813 
1814 static const struct pci_device_id pasemi_mac_pci_tbl[] = {
1815     { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa005) },
1816     { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa006) },
1817     { },
1818 };
1819 
1820 MODULE_DEVICE_TABLE(pci, pasemi_mac_pci_tbl);
1821 
1822 static struct pci_driver pasemi_mac_driver = {
1823     .name       = "pasemi_mac",
1824     .id_table   = pasemi_mac_pci_tbl,
1825     .probe      = pasemi_mac_probe,
1826     .remove     = pasemi_mac_remove,
1827 };
1828 
1829 static void __exit pasemi_mac_cleanup_module(void)
1830 {
1831     pci_unregister_driver(&pasemi_mac_driver);
1832 }
1833 
1834 static int pasemi_mac_init_module(void)
1835 {
1836     int err;
1837 
1838     err = pasemi_dma_init();
1839     if (err)
1840         return err;
1841 
1842     return pci_register_driver(&pasemi_mac_driver);
1843 }
1844 
1845 module_init(pasemi_mac_init_module);
1846 module_exit(pasemi_mac_cleanup_module);
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