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0001 /* hamachi.c: A Packet Engines GNIC-II Gigabit Ethernet driver for Linux. */
0002 /*
0003     Written 1998-2000 by Donald Becker.
0004     Updates 2000 by Keith Underwood.
0005 
0006     This software may be used and distributed according to the terms of
0007     the GNU General Public License (GPL), incorporated herein by reference.
0008     Drivers based on or derived from this code fall under the GPL and must
0009     retain the authorship, copyright and license notice.  This file is not
0010     a complete program and may only be used when the entire operating
0011     system is licensed under the GPL.
0012 
0013     The author may be reached as becker@scyld.com, or C/O
0014     Scyld Computing Corporation
0015     410 Severn Ave., Suite 210
0016     Annapolis MD 21403
0017 
0018     This driver is for the Packet Engines GNIC-II PCI Gigabit Ethernet
0019     adapter.
0020 
0021     Support and updates available at
0022     http://www.scyld.com/network/hamachi.html
0023     [link no longer provides useful info -jgarzik]
0024     or
0025     http://www.parl.clemson.edu/~keithu/hamachi.html
0026 
0027 */
0028 
0029 #define DRV_NAME    "hamachi"
0030 #define DRV_VERSION "2.1"
0031 #define DRV_RELDATE "Sept 11, 2006"
0032 
0033 
0034 /* A few user-configurable values. */
0035 
0036 static int debug = 1;       /* 1 normal messages, 0 quiet .. 7 verbose.  */
0037 #define final_version
0038 #define hamachi_debug debug
0039 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
0040 static int max_interrupt_work = 40;
0041 static int mtu;
0042 /* Default values selected by testing on a dual processor PIII-450 */
0043 /* These six interrupt control parameters may be set directly when loading the
0044  * module, or through the rx_params and tx_params variables
0045  */
0046 static int max_rx_latency = 0x11;
0047 static int max_rx_gap = 0x05;
0048 static int min_rx_pkt = 0x18;
0049 static int max_tx_latency = 0x00;
0050 static int max_tx_gap = 0x00;
0051 static int min_tx_pkt = 0x30;
0052 
0053 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
0054    -Setting to > 1518 causes all frames to be copied
0055     -Setting to 0 disables copies
0056 */
0057 static int rx_copybreak;
0058 
0059 /* An override for the hardware detection of bus width.
0060     Set to 1 to force 32 bit PCI bus detection.  Set to 4 to force 64 bit.
0061     Add 2 to disable parity detection.
0062 */
0063 static int force32;
0064 
0065 
0066 /* Used to pass the media type, etc.
0067    These exist for driver interoperability.
0068    No media types are currently defined.
0069         - The lower 4 bits are reserved for the media type.
0070         - The next three bits may be set to one of the following:
0071             0x00000000 : Autodetect PCI bus
0072             0x00000010 : Force 32 bit PCI bus
0073             0x00000020 : Disable parity detection
0074             0x00000040 : Force 64 bit PCI bus
0075             Default is autodetect
0076         - The next bit can be used to force half-duplex.  This is a bad
0077           idea since no known implementations implement half-duplex, and,
0078           in general, half-duplex for gigabit ethernet is a bad idea.
0079             0x00000080 : Force half-duplex
0080             Default is full-duplex.
0081         - In the original driver, the ninth bit could be used to force
0082           full-duplex.  Maintain that for compatibility
0083            0x00000200 : Force full-duplex
0084 */
0085 #define MAX_UNITS 8             /* More are supported, limit only on options */
0086 static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
0087 static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
0088 /* The Hamachi chipset supports 3 parameters each for Rx and Tx
0089  * interruput management.  Parameters will be loaded as specified into
0090  * the TxIntControl and RxIntControl registers.
0091  *
0092  * The registers are arranged as follows:
0093  *     23 - 16   15 -  8   7    -    0
0094  *    _________________________________
0095  *   | min_pkt | max_gap | max_latency |
0096  *    ---------------------------------
0097  *   min_pkt      : The minimum number of packets processed between
0098  *                  interrupts.
0099  *   max_gap      : The maximum inter-packet gap in units of 8.192 us
0100  *   max_latency  : The absolute time between interrupts in units of 8.192 us
0101  *
0102  */
0103 static int rx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
0104 static int tx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
0105 
0106 /* Operational parameters that are set at compile time. */
0107 
0108 /* Keep the ring sizes a power of two for compile efficiency.
0109     The compiler will convert <unsigned>'%'<2^N> into a bit mask.
0110    Making the Tx ring too large decreases the effectiveness of channel
0111    bonding and packet priority.
0112    There are no ill effects from too-large receive rings, except for
0113     excessive memory usage */
0114 /* Empirically it appears that the Tx ring needs to be a little bigger
0115    for these Gbit adapters or you get into an overrun condition really
0116    easily.  Also, things appear to work a bit better in back-to-back
0117    configurations if the Rx ring is 8 times the size of the Tx ring
0118 */
0119 #define TX_RING_SIZE    64
0120 #define RX_RING_SIZE    512
0121 #define TX_TOTAL_SIZE   TX_RING_SIZE*sizeof(struct hamachi_desc)
0122 #define RX_TOTAL_SIZE   RX_RING_SIZE*sizeof(struct hamachi_desc)
0123 
0124 /*
0125  * Enable netdev_ioctl.  Added interrupt coalescing parameter adjustment.
0126  * 2/19/99 Pete Wyckoff <wyckoff@ca.sandia.gov>
0127  */
0128 
0129 /* play with 64-bit addrlen; seems to be a teensy bit slower  --pw */
0130 /* #define ADDRLEN 64 */
0131 
0132 /*
0133  * RX_CHECKSUM turns on card-generated receive checksum generation for
0134  *   TCP and UDP packets.  Otherwise the upper layers do the calculation.
0135  * 3/10/1999 Pete Wyckoff <wyckoff@ca.sandia.gov>
0136  */
0137 #define RX_CHECKSUM
0138 
0139 /* Operational parameters that usually are not changed. */
0140 /* Time in jiffies before concluding the transmitter is hung. */
0141 #define TX_TIMEOUT  (5*HZ)
0142 
0143 #include <linux/capability.h>
0144 #include <linux/module.h>
0145 #include <linux/kernel.h>
0146 #include <linux/string.h>
0147 #include <linux/timer.h>
0148 #include <linux/time.h>
0149 #include <linux/errno.h>
0150 #include <linux/ioport.h>
0151 #include <linux/interrupt.h>
0152 #include <linux/pci.h>
0153 #include <linux/init.h>
0154 #include <linux/ethtool.h>
0155 #include <linux/mii.h>
0156 #include <linux/netdevice.h>
0157 #include <linux/etherdevice.h>
0158 #include <linux/skbuff.h>
0159 #include <linux/ip.h>
0160 #include <linux/delay.h>
0161 #include <linux/bitops.h>
0162 
0163 #include <linux/uaccess.h>
0164 #include <asm/processor.h>  /* Processor type for cache alignment. */
0165 #include <asm/io.h>
0166 #include <asm/unaligned.h>
0167 #include <asm/cache.h>
0168 
0169 static const char version[] =
0170 KERN_INFO DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE "  Written by Donald Becker\n"
0171 "   Some modifications by Eric kasten <kasten@nscl.msu.edu>\n"
0172 "   Further modifications by Keith Underwood <keithu@parl.clemson.edu>\n";
0173 
0174 
0175 /* IP_MF appears to be only defined in <netinet/ip.h>, however,
0176    we need it for hardware checksumming support.  FYI... some of
0177    the definitions in <netinet/ip.h> conflict/duplicate those in
0178    other linux headers causing many compiler warnings.
0179 */
0180 #ifndef IP_MF
0181   #define IP_MF 0x2000   /* IP more frags from <netinet/ip.h> */
0182 #endif
0183 
0184 /* Define IP_OFFSET to be IPOPT_OFFSET */
0185 #ifndef IP_OFFSET
0186   #ifdef IPOPT_OFFSET
0187     #define IP_OFFSET IPOPT_OFFSET
0188   #else
0189     #define IP_OFFSET 2
0190   #endif
0191 #endif
0192 
0193 #define RUN_AT(x) (jiffies + (x))
0194 
0195 #ifndef ADDRLEN
0196 #define ADDRLEN 32
0197 #endif
0198 
0199 /* Condensed bus+endian portability operations. */
0200 #if ADDRLEN == 64
0201 #define cpu_to_leXX(addr)   cpu_to_le64(addr)
0202 #define leXX_to_cpu(addr)   le64_to_cpu(addr)
0203 #else
0204 #define cpu_to_leXX(addr)   cpu_to_le32(addr)
0205 #define leXX_to_cpu(addr)   le32_to_cpu(addr)
0206 #endif
0207 
0208 
0209 /*
0210                 Theory of Operation
0211 
0212 I. Board Compatibility
0213 
0214 This device driver is designed for the Packet Engines "Hamachi"
0215 Gigabit Ethernet chip.  The only PCA currently supported is the GNIC-II 64-bit
0216 66Mhz PCI card.
0217 
0218 II. Board-specific settings
0219 
0220 No jumpers exist on the board.  The chip supports software correction of
0221 various motherboard wiring errors, however this driver does not support
0222 that feature.
0223 
0224 III. Driver operation
0225 
0226 IIIa. Ring buffers
0227 
0228 The Hamachi uses a typical descriptor based bus-master architecture.
0229 The descriptor list is similar to that used by the Digital Tulip.
0230 This driver uses two statically allocated fixed-size descriptor lists
0231 formed into rings by a branch from the final descriptor to the beginning of
0232 the list.  The ring sizes are set at compile time by RX/TX_RING_SIZE.
0233 
0234 This driver uses a zero-copy receive and transmit scheme similar my other
0235 network drivers.
0236 The driver allocates full frame size skbuffs for the Rx ring buffers at
0237 open() time and passes the skb->data field to the Hamachi as receive data
0238 buffers.  When an incoming frame is less than RX_COPYBREAK bytes long,
0239 a fresh skbuff is allocated and the frame is copied to the new skbuff.
0240 When the incoming frame is larger, the skbuff is passed directly up the
0241 protocol stack and replaced by a newly allocated skbuff.
0242 
0243 The RX_COPYBREAK value is chosen to trade-off the memory wasted by
0244 using a full-sized skbuff for small frames vs. the copying costs of larger
0245 frames.  Gigabit cards are typically used on generously configured machines
0246 and the underfilled buffers have negligible impact compared to the benefit of
0247 a single allocation size, so the default value of zero results in never
0248 copying packets.
0249 
0250 IIIb/c. Transmit/Receive Structure
0251 
0252 The Rx and Tx descriptor structure are straight-forward, with no historical
0253 baggage that must be explained.  Unlike the awkward DBDMA structure, there
0254 are no unused fields or option bits that had only one allowable setting.
0255 
0256 Two details should be noted about the descriptors: The chip supports both 32
0257 bit and 64 bit address structures, and the length field is overwritten on
0258 the receive descriptors.  The descriptor length is set in the control word
0259 for each channel. The development driver uses 32 bit addresses only, however
0260 64 bit addresses may be enabled for 64 bit architectures e.g. the Alpha.
0261 
0262 IIId. Synchronization
0263 
0264 This driver is very similar to my other network drivers.
0265 The driver runs as two independent, single-threaded flows of control.  One
0266 is the send-packet routine, which enforces single-threaded use by the
0267 dev->tbusy flag.  The other thread is the interrupt handler, which is single
0268 threaded by the hardware and other software.
0269 
0270 The send packet thread has partial control over the Tx ring and 'dev->tbusy'
0271 flag.  It sets the tbusy flag whenever it's queuing a Tx packet. If the next
0272 queue slot is empty, it clears the tbusy flag when finished otherwise it sets
0273 the 'hmp->tx_full' flag.
0274 
0275 The interrupt handler has exclusive control over the Rx ring and records stats
0276 from the Tx ring.  After reaping the stats, it marks the Tx queue entry as
0277 empty by incrementing the dirty_tx mark. Iff the 'hmp->tx_full' flag is set, it
0278 clears both the tx_full and tbusy flags.
0279 
0280 IV. Notes
0281 
0282 Thanks to Kim Stearns of Packet Engines for providing a pair of GNIC-II boards.
0283 
0284 IVb. References
0285 
0286 Hamachi Engineering Design Specification, 5/15/97
0287 (Note: This version was marked "Confidential".)
0288 
0289 IVc. Errata
0290 
0291 None noted.
0292 
0293 V.  Recent Changes
0294 
0295 01/15/1999 EPK  Enlargement of the TX and RX ring sizes.  This appears
0296     to help avoid some stall conditions -- this needs further research.
0297 
0298 01/15/1999 EPK  Creation of the hamachi_tx function.  This function cleans
0299     the Tx ring and is called from hamachi_start_xmit (this used to be
0300     called from hamachi_interrupt but it tends to delay execution of the
0301     interrupt handler and thus reduce bandwidth by reducing the latency
0302     between hamachi_rx()'s).  Notably, some modification has been made so
0303     that the cleaning loop checks only to make sure that the DescOwn bit
0304     isn't set in the status flag since the card is not required
0305     to set the entire flag to zero after processing.
0306 
0307 01/15/1999 EPK In the hamachi_start_tx function, the Tx ring full flag is
0308     checked before attempting to add a buffer to the ring.  If the ring is full
0309     an attempt is made to free any dirty buffers and thus find space for
0310     the new buffer or the function returns non-zero which should case the
0311     scheduler to reschedule the buffer later.
0312 
0313 01/15/1999 EPK Some adjustments were made to the chip initialization.
0314     End-to-end flow control should now be fully active and the interrupt
0315     algorithm vars have been changed.  These could probably use further tuning.
0316 
0317 01/15/1999 EPK Added the max_{rx,tx}_latency options.  These are used to
0318     set the rx and tx latencies for the Hamachi interrupts. If you're having
0319     problems with network stalls, try setting these to higher values.
0320     Valid values are 0x00 through 0xff.
0321 
0322 01/15/1999 EPK In general, the overall bandwidth has increased and
0323     latencies are better (sometimes by a factor of 2).  Stalls are rare at
0324     this point, however there still appears to be a bug somewhere between the
0325     hardware and driver.  TCP checksum errors under load also appear to be
0326     eliminated at this point.
0327 
0328 01/18/1999 EPK Ensured that the DescEndRing bit was being set on both the
0329     Rx and Tx rings.  This appears to have been affecting whether a particular
0330     peer-to-peer connection would hang under high load.  I believe the Rx
0331     rings was typically getting set correctly, but the Tx ring wasn't getting
0332     the DescEndRing bit set during initialization. ??? Does this mean the
0333     hamachi card is using the DescEndRing in processing even if a particular
0334     slot isn't in use -- hypothetically, the card might be searching the
0335     entire Tx ring for slots with the DescOwn bit set and then processing
0336     them.  If the DescEndRing bit isn't set, then it might just wander off
0337     through memory until it hits a chunk of data with that bit set
0338     and then looping back.
0339 
0340 02/09/1999 EPK Added Michel Mueller's TxDMA Interrupt and Tx-timeout
0341     problem (TxCmd and RxCmd need only to be set when idle or stopped.
0342 
0343 02/09/1999 EPK Added code to check/reset dev->tbusy in hamachi_interrupt.
0344     (Michel Mueller pointed out the ``permanently busy'' potential
0345     problem here).
0346 
0347 02/22/1999 EPK Added Pete Wyckoff's ioctl to control the Tx/Rx latencies.
0348 
0349 02/23/1999 EPK Verified that the interrupt status field bits for Tx were
0350     incorrectly defined and corrected (as per Michel Mueller).
0351 
0352 02/23/1999 EPK Corrected the Tx full check to check that at least 4 slots
0353     were available before resetting the tbusy and tx_full flags
0354     (as per Michel Mueller).
0355 
0356 03/11/1999 EPK Added Pete Wyckoff's hardware checksumming support.
0357 
0358 12/31/1999 KDU Cleaned up assorted things and added Don's code to force
0359 32 bit.
0360 
0361 02/20/2000 KDU Some of the control was just plain odd.  Cleaned up the
0362 hamachi_start_xmit() and hamachi_interrupt() code.  There is still some
0363 re-structuring I would like to do.
0364 
0365 03/01/2000 KDU Experimenting with a WIDE range of interrupt mitigation
0366 parameters on a dual P3-450 setup yielded the new default interrupt
0367 mitigation parameters.  Tx should interrupt VERY infrequently due to
0368 Eric's scheme.  Rx should be more often...
0369 
0370 03/13/2000 KDU Added a patch to make the Rx Checksum code interact
0371 nicely with non-linux machines.
0372 
0373 03/13/2000 KDU Experimented with some of the configuration values:
0374 
0375     -It seems that enabling PCI performance commands for descriptors
0376     (changing RxDMACtrl and TxDMACtrl lower nibble from 5 to D) has minimal
0377     performance impact for any of my tests. (ttcp, netpipe, netperf)  I will
0378     leave them that way until I hear further feedback.
0379 
0380     -Increasing the PCI_LATENCY_TIMER to 130
0381     (2 + (burst size of 128 * (0 wait states + 1))) seems to slightly
0382     degrade performance.  Leaving default at 64 pending further information.
0383 
0384 03/14/2000 KDU Further tuning:
0385 
0386     -adjusted boguscnt in hamachi_rx() to depend on interrupt
0387     mitigation parameters chosen.
0388 
0389     -Selected a set of interrupt parameters based on some extensive testing.
0390     These may change with more testing.
0391 
0392 TO DO:
0393 
0394 -Consider borrowing from the acenic driver code to check PCI_COMMAND for
0395 PCI_COMMAND_INVALIDATE.  Set maximum burst size to cache line size in
0396 that case.
0397 
0398 -fix the reset procedure.  It doesn't quite work.
0399 */
0400 
0401 /* A few values that may be tweaked. */
0402 /* Size of each temporary Rx buffer, calculated as:
0403  * 1518 bytes (ethernet packet) + 2 bytes (to get 8 byte alignment for
0404  * the card) + 8 bytes of status info + 8 bytes for the Rx Checksum
0405  */
0406 #define PKT_BUF_SZ      1536
0407 
0408 /* For now, this is going to be set to the maximum size of an ethernet
0409  * packet.  Eventually, we may want to make it a variable that is
0410  * related to the MTU
0411  */
0412 #define MAX_FRAME_SIZE  1518
0413 
0414 /* The rest of these values should never change. */
0415 
0416 static void hamachi_timer(struct timer_list *t);
0417 
0418 enum capability_flags {CanHaveMII=1, };
0419 static const struct chip_info {
0420     u16 vendor_id, device_id, device_id_mask, pad;
0421     const char *name;
0422     void (*media_timer)(struct timer_list *t);
0423     int flags;
0424 } chip_tbl[] = {
0425     {0x1318, 0x0911, 0xffff, 0, "Hamachi GNIC-II", hamachi_timer, 0},
0426     {0,},
0427 };
0428 
0429 /* Offsets to the Hamachi registers.  Various sizes. */
0430 enum hamachi_offsets {
0431     TxDMACtrl=0x00, TxCmd=0x04, TxStatus=0x06, TxPtr=0x08, TxCurPtr=0x10,
0432     RxDMACtrl=0x20, RxCmd=0x24, RxStatus=0x26, RxPtr=0x28, RxCurPtr=0x30,
0433     PCIClkMeas=0x060, MiscStatus=0x066, ChipRev=0x68, ChipReset=0x06B,
0434     LEDCtrl=0x06C, VirtualJumpers=0x06D, GPIO=0x6E,
0435     TxChecksum=0x074, RxChecksum=0x076,
0436     TxIntrCtrl=0x078, RxIntrCtrl=0x07C,
0437     InterruptEnable=0x080, InterruptClear=0x084, IntrStatus=0x088,
0438     EventStatus=0x08C,
0439     MACCnfg=0x0A0, FrameGap0=0x0A2, FrameGap1=0x0A4,
0440     /* See enum MII_offsets below. */
0441     MACCnfg2=0x0B0, RxDepth=0x0B8, FlowCtrl=0x0BC, MaxFrameSize=0x0CE,
0442     AddrMode=0x0D0, StationAddr=0x0D2,
0443     /* Gigabit AutoNegotiation. */
0444     ANCtrl=0x0E0, ANStatus=0x0E2, ANXchngCtrl=0x0E4, ANAdvertise=0x0E8,
0445     ANLinkPartnerAbility=0x0EA,
0446     EECmdStatus=0x0F0, EEData=0x0F1, EEAddr=0x0F2,
0447     FIFOcfg=0x0F8,
0448 };
0449 
0450 /* Offsets to the MII-mode registers. */
0451 enum MII_offsets {
0452     MII_Cmd=0xA6, MII_Addr=0xA8, MII_Wr_Data=0xAA, MII_Rd_Data=0xAC,
0453     MII_Status=0xAE,
0454 };
0455 
0456 /* Bits in the interrupt status/mask registers. */
0457 enum intr_status_bits {
0458     IntrRxDone=0x01, IntrRxPCIFault=0x02, IntrRxPCIErr=0x04,
0459     IntrTxDone=0x100, IntrTxPCIFault=0x200, IntrTxPCIErr=0x400,
0460     LinkChange=0x10000, NegotiationChange=0x20000, StatsMax=0x40000, };
0461 
0462 /* The Hamachi Rx and Tx buffer descriptors. */
0463 struct hamachi_desc {
0464     __le32 status_n_length;
0465 #if ADDRLEN == 64
0466     u32 pad;
0467     __le64 addr;
0468 #else
0469     __le32 addr;
0470 #endif
0471 };
0472 
0473 /* Bits in hamachi_desc.status_n_length */
0474 enum desc_status_bits {
0475     DescOwn=0x80000000, DescEndPacket=0x40000000, DescEndRing=0x20000000,
0476     DescIntr=0x10000000,
0477 };
0478 
0479 #define PRIV_ALIGN  15              /* Required alignment mask */
0480 #define MII_CNT     4
0481 struct hamachi_private {
0482     /* Descriptor rings first for alignment.  Tx requires a second descriptor
0483        for status. */
0484     struct hamachi_desc *rx_ring;
0485     struct hamachi_desc *tx_ring;
0486     struct sk_buff* rx_skbuff[RX_RING_SIZE];
0487     struct sk_buff* tx_skbuff[TX_RING_SIZE];
0488     dma_addr_t tx_ring_dma;
0489     dma_addr_t rx_ring_dma;
0490     struct timer_list timer;        /* Media selection timer. */
0491     /* Frequently used and paired value: keep adjacent for cache effect. */
0492     spinlock_t lock;
0493     int chip_id;
0494     unsigned int cur_rx, dirty_rx;      /* Producer/consumer ring indices */
0495     unsigned int cur_tx, dirty_tx;
0496     unsigned int rx_buf_sz;         /* Based on MTU+slack. */
0497     unsigned int tx_full:1;         /* The Tx queue is full. */
0498     unsigned int duplex_lock:1;
0499     unsigned int default_port:4;        /* Last dev->if_port value. */
0500     /* MII transceiver section. */
0501     int mii_cnt;                                /* MII device addresses. */
0502     struct mii_if_info mii_if;      /* MII lib hooks/info */
0503     unsigned char phys[MII_CNT];        /* MII device addresses, only first one used. */
0504     u32 rx_int_var, tx_int_var; /* interrupt control variables */
0505     u32 option;                         /* Hold on to a copy of the options */
0506     struct pci_dev *pci_dev;
0507     void __iomem *base;
0508 };
0509 
0510 MODULE_AUTHOR("Donald Becker <becker@scyld.com>, Eric Kasten <kasten@nscl.msu.edu>, Keith Underwood <keithu@parl.clemson.edu>");
0511 MODULE_DESCRIPTION("Packet Engines 'Hamachi' GNIC-II Gigabit Ethernet driver");
0512 MODULE_LICENSE("GPL");
0513 
0514 module_param(max_interrupt_work, int, 0);
0515 module_param(mtu, int, 0);
0516 module_param(debug, int, 0);
0517 module_param(min_rx_pkt, int, 0);
0518 module_param(max_rx_gap, int, 0);
0519 module_param(max_rx_latency, int, 0);
0520 module_param(min_tx_pkt, int, 0);
0521 module_param(max_tx_gap, int, 0);
0522 module_param(max_tx_latency, int, 0);
0523 module_param(rx_copybreak, int, 0);
0524 module_param_array(rx_params, int, NULL, 0);
0525 module_param_array(tx_params, int, NULL, 0);
0526 module_param_array(options, int, NULL, 0);
0527 module_param_array(full_duplex, int, NULL, 0);
0528 module_param(force32, int, 0);
0529 MODULE_PARM_DESC(max_interrupt_work, "GNIC-II maximum events handled per interrupt");
0530 MODULE_PARM_DESC(mtu, "GNIC-II MTU (all boards)");
0531 MODULE_PARM_DESC(debug, "GNIC-II debug level (0-7)");
0532 MODULE_PARM_DESC(min_rx_pkt, "GNIC-II minimum Rx packets processed between interrupts");
0533 MODULE_PARM_DESC(max_rx_gap, "GNIC-II maximum Rx inter-packet gap in 8.192 microsecond units");
0534 MODULE_PARM_DESC(max_rx_latency, "GNIC-II time between Rx interrupts in 8.192 microsecond units");
0535 MODULE_PARM_DESC(min_tx_pkt, "GNIC-II minimum Tx packets processed between interrupts");
0536 MODULE_PARM_DESC(max_tx_gap, "GNIC-II maximum Tx inter-packet gap in 8.192 microsecond units");
0537 MODULE_PARM_DESC(max_tx_latency, "GNIC-II time between Tx interrupts in 8.192 microsecond units");
0538 MODULE_PARM_DESC(rx_copybreak, "GNIC-II copy breakpoint for copy-only-tiny-frames");
0539 MODULE_PARM_DESC(rx_params, "GNIC-II min_rx_pkt+max_rx_gap+max_rx_latency");
0540 MODULE_PARM_DESC(tx_params, "GNIC-II min_tx_pkt+max_tx_gap+max_tx_latency");
0541 MODULE_PARM_DESC(options, "GNIC-II Bits 0-3: media type, bits 4-6: as force32, bit 7: half duplex, bit 9 full duplex");
0542 MODULE_PARM_DESC(full_duplex, "GNIC-II full duplex setting(s) (1)");
0543 MODULE_PARM_DESC(force32, "GNIC-II: Bit 0: 32 bit PCI, bit 1: disable parity, bit 2: 64 bit PCI (all boards)");
0544 
0545 static int read_eeprom(void __iomem *ioaddr, int location);
0546 static int mdio_read(struct net_device *dev, int phy_id, int location);
0547 static void mdio_write(struct net_device *dev, int phy_id, int location, int value);
0548 static int hamachi_open(struct net_device *dev);
0549 static int hamachi_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
0550 static int hamachi_siocdevprivate(struct net_device *dev, struct ifreq *rq,
0551                   void __user *data, int cmd);
0552 static void hamachi_timer(struct timer_list *t);
0553 static void hamachi_tx_timeout(struct net_device *dev, unsigned int txqueue);
0554 static void hamachi_init_ring(struct net_device *dev);
0555 static netdev_tx_t hamachi_start_xmit(struct sk_buff *skb,
0556                       struct net_device *dev);
0557 static irqreturn_t hamachi_interrupt(int irq, void *dev_instance);
0558 static int hamachi_rx(struct net_device *dev);
0559 static inline int hamachi_tx(struct net_device *dev);
0560 static void hamachi_error(struct net_device *dev, int intr_status);
0561 static int hamachi_close(struct net_device *dev);
0562 static struct net_device_stats *hamachi_get_stats(struct net_device *dev);
0563 static void set_rx_mode(struct net_device *dev);
0564 static const struct ethtool_ops ethtool_ops;
0565 static const struct ethtool_ops ethtool_ops_no_mii;
0566 
0567 static const struct net_device_ops hamachi_netdev_ops = {
0568     .ndo_open       = hamachi_open,
0569     .ndo_stop       = hamachi_close,
0570     .ndo_start_xmit     = hamachi_start_xmit,
0571     .ndo_get_stats      = hamachi_get_stats,
0572     .ndo_set_rx_mode    = set_rx_mode,
0573     .ndo_validate_addr  = eth_validate_addr,
0574     .ndo_set_mac_address    = eth_mac_addr,
0575     .ndo_tx_timeout     = hamachi_tx_timeout,
0576     .ndo_eth_ioctl      = hamachi_ioctl,
0577     .ndo_siocdevprivate = hamachi_siocdevprivate,
0578 };
0579 
0580 
0581 static int hamachi_init_one(struct pci_dev *pdev,
0582                 const struct pci_device_id *ent)
0583 {
0584     struct hamachi_private *hmp;
0585     int option, i, rx_int_var, tx_int_var, boguscnt;
0586     int chip_id = ent->driver_data;
0587     int irq;
0588     void __iomem *ioaddr;
0589     unsigned long base;
0590     static int card_idx;
0591     struct net_device *dev;
0592     void *ring_space;
0593     dma_addr_t ring_dma;
0594     int ret = -ENOMEM;
0595     u8 addr[ETH_ALEN];
0596 
0597 /* when built into the kernel, we only print version if device is found */
0598 #ifndef MODULE
0599     static int printed_version;
0600     if (!printed_version++)
0601         printk(version);
0602 #endif
0603 
0604     if (pci_enable_device(pdev)) {
0605         ret = -EIO;
0606         goto err_out;
0607     }
0608 
0609     base = pci_resource_start(pdev, 0);
0610 #ifdef __alpha__                /* Really "64 bit addrs" */
0611     base |= (pci_resource_start(pdev, 1) << 32);
0612 #endif
0613 
0614     pci_set_master(pdev);
0615 
0616     i = pci_request_regions(pdev, DRV_NAME);
0617     if (i)
0618         return i;
0619 
0620     irq = pdev->irq;
0621     ioaddr = ioremap(base, 0x400);
0622     if (!ioaddr)
0623         goto err_out_release;
0624 
0625     dev = alloc_etherdev(sizeof(struct hamachi_private));
0626     if (!dev)
0627         goto err_out_iounmap;
0628 
0629     SET_NETDEV_DEV(dev, &pdev->dev);
0630 
0631     for (i = 0; i < 6; i++)
0632         addr[i] = read_eeprom(ioaddr, 4 + i);
0633     eth_hw_addr_set(dev, addr);
0634 
0635 #if ! defined(final_version)
0636     if (hamachi_debug > 4)
0637         for (i = 0; i < 0x10; i++)
0638             printk("%2.2x%s",
0639                    read_eeprom(ioaddr, i), i % 16 != 15 ? " " : "\n");
0640 #endif
0641 
0642     hmp = netdev_priv(dev);
0643     spin_lock_init(&hmp->lock);
0644 
0645     hmp->mii_if.dev = dev;
0646     hmp->mii_if.mdio_read = mdio_read;
0647     hmp->mii_if.mdio_write = mdio_write;
0648     hmp->mii_if.phy_id_mask = 0x1f;
0649     hmp->mii_if.reg_num_mask = 0x1f;
0650 
0651     ring_space = dma_alloc_coherent(&pdev->dev, TX_TOTAL_SIZE, &ring_dma,
0652                     GFP_KERNEL);
0653     if (!ring_space)
0654         goto err_out_cleardev;
0655     hmp->tx_ring = ring_space;
0656     hmp->tx_ring_dma = ring_dma;
0657 
0658     ring_space = dma_alloc_coherent(&pdev->dev, RX_TOTAL_SIZE, &ring_dma,
0659                     GFP_KERNEL);
0660     if (!ring_space)
0661         goto err_out_unmap_tx;
0662     hmp->rx_ring = ring_space;
0663     hmp->rx_ring_dma = ring_dma;
0664 
0665     /* Check for options being passed in */
0666     option = card_idx < MAX_UNITS ? options[card_idx] : 0;
0667     if (dev->mem_start)
0668         option = dev->mem_start;
0669 
0670     /* If the bus size is misidentified, do the following. */
0671     force32 = force32 ? force32 :
0672         ((option  >= 0) ? ((option & 0x00000070) >> 4) : 0 );
0673     if (force32)
0674         writeb(force32, ioaddr + VirtualJumpers);
0675 
0676     /* Hmmm, do we really need to reset the chip???. */
0677     writeb(0x01, ioaddr + ChipReset);
0678 
0679     /* After a reset, the clock speed measurement of the PCI bus will not
0680      * be valid for a moment.  Wait for a little while until it is.  If
0681      * it takes more than 10ms, forget it.
0682      */
0683     udelay(10);
0684     i = readb(ioaddr + PCIClkMeas);
0685     for (boguscnt = 0; (!(i & 0x080)) && boguscnt < 1000; boguscnt++){
0686         udelay(10);
0687         i = readb(ioaddr + PCIClkMeas);
0688     }
0689 
0690     hmp->base = ioaddr;
0691     pci_set_drvdata(pdev, dev);
0692 
0693     hmp->chip_id = chip_id;
0694     hmp->pci_dev = pdev;
0695 
0696     /* The lower four bits are the media type. */
0697     if (option > 0) {
0698         hmp->option = option;
0699         if (option & 0x200)
0700             hmp->mii_if.full_duplex = 1;
0701         else if (option & 0x080)
0702             hmp->mii_if.full_duplex = 0;
0703         hmp->default_port = option & 15;
0704         if (hmp->default_port)
0705             hmp->mii_if.force_media = 1;
0706     }
0707     if (card_idx < MAX_UNITS  &&  full_duplex[card_idx] > 0)
0708         hmp->mii_if.full_duplex = 1;
0709 
0710     /* lock the duplex mode if someone specified a value */
0711     if (hmp->mii_if.full_duplex || (option & 0x080))
0712         hmp->duplex_lock = 1;
0713 
0714     /* Set interrupt tuning parameters */
0715     max_rx_latency = max_rx_latency & 0x00ff;
0716     max_rx_gap = max_rx_gap & 0x00ff;
0717     min_rx_pkt = min_rx_pkt & 0x00ff;
0718     max_tx_latency = max_tx_latency & 0x00ff;
0719     max_tx_gap = max_tx_gap & 0x00ff;
0720     min_tx_pkt = min_tx_pkt & 0x00ff;
0721 
0722     rx_int_var = card_idx < MAX_UNITS ? rx_params[card_idx] : -1;
0723     tx_int_var = card_idx < MAX_UNITS ? tx_params[card_idx] : -1;
0724     hmp->rx_int_var = rx_int_var >= 0 ? rx_int_var :
0725         (min_rx_pkt << 16 | max_rx_gap << 8 | max_rx_latency);
0726     hmp->tx_int_var = tx_int_var >= 0 ? tx_int_var :
0727         (min_tx_pkt << 16 | max_tx_gap << 8 | max_tx_latency);
0728 
0729 
0730     /* The Hamachi-specific entries in the device structure. */
0731     dev->netdev_ops = &hamachi_netdev_ops;
0732     dev->ethtool_ops = (chip_tbl[hmp->chip_id].flags & CanHaveMII) ?
0733         &ethtool_ops : &ethtool_ops_no_mii;
0734     dev->watchdog_timeo = TX_TIMEOUT;
0735     if (mtu)
0736         dev->mtu = mtu;
0737 
0738     i = register_netdev(dev);
0739     if (i) {
0740         ret = i;
0741         goto err_out_unmap_rx;
0742     }
0743 
0744     printk(KERN_INFO "%s: %s type %x at %p, %pM, IRQ %d.\n",
0745            dev->name, chip_tbl[chip_id].name, readl(ioaddr + ChipRev),
0746            ioaddr, dev->dev_addr, irq);
0747     i = readb(ioaddr + PCIClkMeas);
0748     printk(KERN_INFO "%s:  %d-bit %d Mhz PCI bus (%d), Virtual Jumpers "
0749            "%2.2x, LPA %4.4x.\n",
0750            dev->name, readw(ioaddr + MiscStatus) & 1 ? 64 : 32,
0751            i ? 2000/(i&0x7f) : 0, i&0x7f, (int)readb(ioaddr + VirtualJumpers),
0752            readw(ioaddr + ANLinkPartnerAbility));
0753 
0754     if (chip_tbl[hmp->chip_id].flags & CanHaveMII) {
0755         int phy, phy_idx = 0;
0756         for (phy = 0; phy < 32 && phy_idx < MII_CNT; phy++) {
0757             int mii_status = mdio_read(dev, phy, MII_BMSR);
0758             if (mii_status != 0xffff  &&
0759                 mii_status != 0x0000) {
0760                 hmp->phys[phy_idx++] = phy;
0761                 hmp->mii_if.advertising = mdio_read(dev, phy, MII_ADVERTISE);
0762                 printk(KERN_INFO "%s: MII PHY found at address %d, status "
0763                        "0x%4.4x advertising %4.4x.\n",
0764                        dev->name, phy, mii_status, hmp->mii_if.advertising);
0765             }
0766         }
0767         hmp->mii_cnt = phy_idx;
0768         if (hmp->mii_cnt > 0)
0769             hmp->mii_if.phy_id = hmp->phys[0];
0770         else
0771             memset(&hmp->mii_if, 0, sizeof(hmp->mii_if));
0772     }
0773     /* Configure gigabit autonegotiation. */
0774     writew(0x0400, ioaddr + ANXchngCtrl);   /* Enable legacy links. */
0775     writew(0x08e0, ioaddr + ANAdvertise);   /* Set our advertise word. */
0776     writew(0x1000, ioaddr + ANCtrl);            /* Enable negotiation */
0777 
0778     card_idx++;
0779     return 0;
0780 
0781 err_out_unmap_rx:
0782     dma_free_coherent(&pdev->dev, RX_TOTAL_SIZE, hmp->rx_ring,
0783               hmp->rx_ring_dma);
0784 err_out_unmap_tx:
0785     dma_free_coherent(&pdev->dev, TX_TOTAL_SIZE, hmp->tx_ring,
0786               hmp->tx_ring_dma);
0787 err_out_cleardev:
0788     free_netdev (dev);
0789 err_out_iounmap:
0790     iounmap(ioaddr);
0791 err_out_release:
0792     pci_release_regions(pdev);
0793 err_out:
0794     return ret;
0795 }
0796 
0797 static int read_eeprom(void __iomem *ioaddr, int location)
0798 {
0799     int bogus_cnt = 1000;
0800 
0801     /* We should check busy first - per docs -KDU */
0802     while ((readb(ioaddr + EECmdStatus) & 0x40)  && --bogus_cnt > 0);
0803     writew(location, ioaddr + EEAddr);
0804     writeb(0x02, ioaddr + EECmdStatus);
0805     bogus_cnt = 1000;
0806     while ((readb(ioaddr + EECmdStatus) & 0x40)  && --bogus_cnt > 0);
0807     if (hamachi_debug > 5)
0808         printk("   EEPROM status is %2.2x after %d ticks.\n",
0809                (int)readb(ioaddr + EECmdStatus), 1000- bogus_cnt);
0810     return readb(ioaddr + EEData);
0811 }
0812 
0813 /* MII Managemen Data I/O accesses.
0814    These routines assume the MDIO controller is idle, and do not exit until
0815    the command is finished. */
0816 
0817 static int mdio_read(struct net_device *dev, int phy_id, int location)
0818 {
0819     struct hamachi_private *hmp = netdev_priv(dev);
0820     void __iomem *ioaddr = hmp->base;
0821     int i;
0822 
0823     /* We should check busy first - per docs -KDU */
0824     for (i = 10000; i >= 0; i--)
0825         if ((readw(ioaddr + MII_Status) & 1) == 0)
0826             break;
0827     writew((phy_id<<8) + location, ioaddr + MII_Addr);
0828     writew(0x0001, ioaddr + MII_Cmd);
0829     for (i = 10000; i >= 0; i--)
0830         if ((readw(ioaddr + MII_Status) & 1) == 0)
0831             break;
0832     return readw(ioaddr + MII_Rd_Data);
0833 }
0834 
0835 static void mdio_write(struct net_device *dev, int phy_id, int location, int value)
0836 {
0837     struct hamachi_private *hmp = netdev_priv(dev);
0838     void __iomem *ioaddr = hmp->base;
0839     int i;
0840 
0841     /* We should check busy first - per docs -KDU */
0842     for (i = 10000; i >= 0; i--)
0843         if ((readw(ioaddr + MII_Status) & 1) == 0)
0844             break;
0845     writew((phy_id<<8) + location, ioaddr + MII_Addr);
0846     writew(value, ioaddr + MII_Wr_Data);
0847 
0848     /* Wait for the command to finish. */
0849     for (i = 10000; i >= 0; i--)
0850         if ((readw(ioaddr + MII_Status) & 1) == 0)
0851             break;
0852 }
0853 
0854 
0855 static int hamachi_open(struct net_device *dev)
0856 {
0857     struct hamachi_private *hmp = netdev_priv(dev);
0858     void __iomem *ioaddr = hmp->base;
0859     int i;
0860     u32 rx_int_var, tx_int_var;
0861     u16 fifo_info;
0862 
0863     i = request_irq(hmp->pci_dev->irq, hamachi_interrupt, IRQF_SHARED,
0864             dev->name, dev);
0865     if (i)
0866         return i;
0867 
0868     hamachi_init_ring(dev);
0869 
0870 #if ADDRLEN == 64
0871     /* writellll anyone ? */
0872     writel(hmp->rx_ring_dma, ioaddr + RxPtr);
0873     writel(hmp->rx_ring_dma >> 32, ioaddr + RxPtr + 4);
0874     writel(hmp->tx_ring_dma, ioaddr + TxPtr);
0875     writel(hmp->tx_ring_dma >> 32, ioaddr + TxPtr + 4);
0876 #else
0877     writel(hmp->rx_ring_dma, ioaddr + RxPtr);
0878     writel(hmp->tx_ring_dma, ioaddr + TxPtr);
0879 #endif
0880 
0881     /* TODO:  It would make sense to organize this as words since the card
0882      * documentation does. -KDU
0883      */
0884     for (i = 0; i < 6; i++)
0885         writeb(dev->dev_addr[i], ioaddr + StationAddr + i);
0886 
0887     /* Initialize other registers: with so many this eventually this will
0888        converted to an offset/value list. */
0889 
0890     /* Configure the FIFO */
0891     fifo_info = (readw(ioaddr + GPIO) & 0x00C0) >> 6;
0892     switch (fifo_info){
0893         case 0 :
0894             /* No FIFO */
0895             writew(0x0000, ioaddr + FIFOcfg);
0896             break;
0897         case 1 :
0898             /* Configure the FIFO for 512K external, 16K used for Tx. */
0899             writew(0x0028, ioaddr + FIFOcfg);
0900             break;
0901         case 2 :
0902             /* Configure the FIFO for 1024 external, 32K used for Tx. */
0903             writew(0x004C, ioaddr + FIFOcfg);
0904             break;
0905         case 3 :
0906             /* Configure the FIFO for 2048 external, 32K used for Tx. */
0907             writew(0x006C, ioaddr + FIFOcfg);
0908             break;
0909         default :
0910             printk(KERN_WARNING "%s:  Unsupported external memory config!\n",
0911                 dev->name);
0912             /* Default to no FIFO */
0913             writew(0x0000, ioaddr + FIFOcfg);
0914             break;
0915     }
0916 
0917     if (dev->if_port == 0)
0918         dev->if_port = hmp->default_port;
0919 
0920 
0921     /* Setting the Rx mode will start the Rx process. */
0922     /* If someone didn't choose a duplex, default to full-duplex */
0923     if (hmp->duplex_lock != 1)
0924         hmp->mii_if.full_duplex = 1;
0925 
0926     /* always 1, takes no more time to do it */
0927     writew(0x0001, ioaddr + RxChecksum);
0928     writew(0x0000, ioaddr + TxChecksum);
0929     writew(0x8000, ioaddr + MACCnfg); /* Soft reset the MAC */
0930     writew(0x215F, ioaddr + MACCnfg);
0931     writew(0x000C, ioaddr + FrameGap0);
0932     /* WHAT?!?!?  Why isn't this documented somewhere? -KDU */
0933     writew(0x1018, ioaddr + FrameGap1);
0934     /* Why do we enable receives/transmits here? -KDU */
0935     writew(0x0780, ioaddr + MACCnfg2); /* Upper 16 bits control LEDs. */
0936     /* Enable automatic generation of flow control frames, period 0xffff. */
0937     writel(0x0030FFFF, ioaddr + FlowCtrl);
0938     writew(MAX_FRAME_SIZE, ioaddr + MaxFrameSize);  /* dev->mtu+14 ??? */
0939 
0940     /* Enable legacy links. */
0941     writew(0x0400, ioaddr + ANXchngCtrl);   /* Enable legacy links. */
0942     /* Initial Link LED to blinking red. */
0943     writeb(0x03, ioaddr + LEDCtrl);
0944 
0945     /* Configure interrupt mitigation.  This has a great effect on
0946        performance, so systems tuning should start here!. */
0947 
0948     rx_int_var = hmp->rx_int_var;
0949     tx_int_var = hmp->tx_int_var;
0950 
0951     if (hamachi_debug > 1) {
0952         printk("max_tx_latency: %d, max_tx_gap: %d, min_tx_pkt: %d\n",
0953             tx_int_var & 0x00ff, (tx_int_var & 0x00ff00) >> 8,
0954             (tx_int_var & 0x00ff0000) >> 16);
0955         printk("max_rx_latency: %d, max_rx_gap: %d, min_rx_pkt: %d\n",
0956             rx_int_var & 0x00ff, (rx_int_var & 0x00ff00) >> 8,
0957             (rx_int_var & 0x00ff0000) >> 16);
0958         printk("rx_int_var: %x, tx_int_var: %x\n", rx_int_var, tx_int_var);
0959     }
0960 
0961     writel(tx_int_var, ioaddr + TxIntrCtrl);
0962     writel(rx_int_var, ioaddr + RxIntrCtrl);
0963 
0964     set_rx_mode(dev);
0965 
0966     netif_start_queue(dev);
0967 
0968     /* Enable interrupts by setting the interrupt mask. */
0969     writel(0x80878787, ioaddr + InterruptEnable);
0970     writew(0x0000, ioaddr + EventStatus);   /* Clear non-interrupting events */
0971 
0972     /* Configure and start the DMA channels. */
0973     /* Burst sizes are in the low three bits: size = 4<<(val&7) */
0974 #if ADDRLEN == 64
0975     writew(0x005D, ioaddr + RxDMACtrl);         /* 128 dword bursts */
0976     writew(0x005D, ioaddr + TxDMACtrl);
0977 #else
0978     writew(0x001D, ioaddr + RxDMACtrl);
0979     writew(0x001D, ioaddr + TxDMACtrl);
0980 #endif
0981     writew(0x0001, ioaddr + RxCmd);
0982 
0983     if (hamachi_debug > 2) {
0984         printk(KERN_DEBUG "%s: Done hamachi_open(), status: Rx %x Tx %x.\n",
0985                dev->name, readw(ioaddr + RxStatus), readw(ioaddr + TxStatus));
0986     }
0987     /* Set the timer to check for link beat. */
0988     timer_setup(&hmp->timer, hamachi_timer, 0);
0989     hmp->timer.expires = RUN_AT((24*HZ)/10);            /* 2.4 sec. */
0990     add_timer(&hmp->timer);
0991 
0992     return 0;
0993 }
0994 
0995 static inline int hamachi_tx(struct net_device *dev)
0996 {
0997     struct hamachi_private *hmp = netdev_priv(dev);
0998 
0999     /* Update the dirty pointer until we find an entry that is
1000         still owned by the card */
1001     for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++) {
1002         int entry = hmp->dirty_tx % TX_RING_SIZE;
1003         struct sk_buff *skb;
1004 
1005         if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1006             break;
1007         /* Free the original skb. */
1008         skb = hmp->tx_skbuff[entry];
1009         if (skb) {
1010             dma_unmap_single(&hmp->pci_dev->dev,
1011                      leXX_to_cpu(hmp->tx_ring[entry].addr),
1012                      skb->len, DMA_TO_DEVICE);
1013             dev_kfree_skb(skb);
1014             hmp->tx_skbuff[entry] = NULL;
1015         }
1016         hmp->tx_ring[entry].status_n_length = 0;
1017         if (entry >= TX_RING_SIZE-1)
1018             hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1019                 cpu_to_le32(DescEndRing);
1020         dev->stats.tx_packets++;
1021     }
1022 
1023     return 0;
1024 }
1025 
1026 static void hamachi_timer(struct timer_list *t)
1027 {
1028     struct hamachi_private *hmp = from_timer(hmp, t, timer);
1029     struct net_device *dev = hmp->mii_if.dev;
1030     void __iomem *ioaddr = hmp->base;
1031     int next_tick = 10*HZ;
1032 
1033     if (hamachi_debug > 2) {
1034         printk(KERN_INFO "%s: Hamachi Autonegotiation status %4.4x, LPA "
1035                "%4.4x.\n", dev->name, readw(ioaddr + ANStatus),
1036                readw(ioaddr + ANLinkPartnerAbility));
1037         printk(KERN_INFO "%s: Autonegotiation regs %4.4x %4.4x %4.4x "
1038                "%4.4x %4.4x %4.4x.\n", dev->name,
1039                readw(ioaddr + 0x0e0),
1040                readw(ioaddr + 0x0e2),
1041                readw(ioaddr + 0x0e4),
1042                readw(ioaddr + 0x0e6),
1043                readw(ioaddr + 0x0e8),
1044                readw(ioaddr + 0x0eA));
1045     }
1046     /* We could do something here... nah. */
1047     hmp->timer.expires = RUN_AT(next_tick);
1048     add_timer(&hmp->timer);
1049 }
1050 
1051 static void hamachi_tx_timeout(struct net_device *dev, unsigned int txqueue)
1052 {
1053     int i;
1054     struct hamachi_private *hmp = netdev_priv(dev);
1055     void __iomem *ioaddr = hmp->base;
1056 
1057     printk(KERN_WARNING "%s: Hamachi transmit timed out, status %8.8x,"
1058            " resetting...\n", dev->name, (int)readw(ioaddr + TxStatus));
1059 
1060     {
1061         printk(KERN_DEBUG "  Rx ring %p: ", hmp->rx_ring);
1062         for (i = 0; i < RX_RING_SIZE; i++)
1063             printk(KERN_CONT " %8.8x",
1064                    le32_to_cpu(hmp->rx_ring[i].status_n_length));
1065         printk(KERN_CONT "\n");
1066         printk(KERN_DEBUG"  Tx ring %p: ", hmp->tx_ring);
1067         for (i = 0; i < TX_RING_SIZE; i++)
1068             printk(KERN_CONT " %4.4x",
1069                    le32_to_cpu(hmp->tx_ring[i].status_n_length));
1070         printk(KERN_CONT "\n");
1071     }
1072 
1073     /* Reinit the hardware and make sure the Rx and Tx processes
1074         are up and running.
1075      */
1076     dev->if_port = 0;
1077     /* The right way to do Reset. -KDU
1078      *      -Clear OWN bit in all Rx/Tx descriptors
1079      *      -Wait 50 uS for channels to go idle
1080      *      -Turn off MAC receiver
1081      *      -Issue Reset
1082      */
1083 
1084     for (i = 0; i < RX_RING_SIZE; i++)
1085         hmp->rx_ring[i].status_n_length &= cpu_to_le32(~DescOwn);
1086 
1087     /* Presume that all packets in the Tx queue are gone if we have to
1088      * re-init the hardware.
1089      */
1090     for (i = 0; i < TX_RING_SIZE; i++){
1091         struct sk_buff *skb;
1092 
1093         if (i >= TX_RING_SIZE - 1)
1094             hmp->tx_ring[i].status_n_length =
1095                 cpu_to_le32(DescEndRing) |
1096                 (hmp->tx_ring[i].status_n_length &
1097                  cpu_to_le32(0x0000ffff));
1098         else
1099             hmp->tx_ring[i].status_n_length &= cpu_to_le32(0x0000ffff);
1100         skb = hmp->tx_skbuff[i];
1101         if (skb){
1102             dma_unmap_single(&hmp->pci_dev->dev,
1103                      leXX_to_cpu(hmp->tx_ring[i].addr),
1104                      skb->len, DMA_TO_DEVICE);
1105             dev_kfree_skb(skb);
1106             hmp->tx_skbuff[i] = NULL;
1107         }
1108     }
1109 
1110     udelay(60); /* Sleep 60 us just for safety sake */
1111     writew(0x0002, ioaddr + RxCmd); /* STOP Rx */
1112 
1113     writeb(0x01, ioaddr + ChipReset);  /* Reinit the hardware */
1114 
1115     hmp->tx_full = 0;
1116     hmp->cur_rx = hmp->cur_tx = 0;
1117     hmp->dirty_rx = hmp->dirty_tx = 0;
1118     /* Rx packets are also presumed lost; however, we need to make sure a
1119      * ring of buffers is in tact. -KDU
1120      */
1121     for (i = 0; i < RX_RING_SIZE; i++){
1122         struct sk_buff *skb = hmp->rx_skbuff[i];
1123 
1124         if (skb){
1125             dma_unmap_single(&hmp->pci_dev->dev,
1126                      leXX_to_cpu(hmp->rx_ring[i].addr),
1127                      hmp->rx_buf_sz, DMA_FROM_DEVICE);
1128             dev_kfree_skb(skb);
1129             hmp->rx_skbuff[i] = NULL;
1130         }
1131     }
1132     /* Fill in the Rx buffers.  Handle allocation failure gracefully. */
1133     for (i = 0; i < RX_RING_SIZE; i++) {
1134         struct sk_buff *skb;
1135 
1136         skb = netdev_alloc_skb_ip_align(dev, hmp->rx_buf_sz);
1137         hmp->rx_skbuff[i] = skb;
1138         if (skb == NULL)
1139             break;
1140 
1141         hmp->rx_ring[i].addr = cpu_to_leXX(dma_map_single(&hmp->pci_dev->dev,
1142                                   skb->data,
1143                                   hmp->rx_buf_sz,
1144                                   DMA_FROM_DEVICE));
1145         hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1146             DescEndPacket | DescIntr | (hmp->rx_buf_sz - 2));
1147     }
1148     hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1149     /* Mark the last entry as wrapping the ring. */
1150     hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1151 
1152     /* Trigger an immediate transmit demand. */
1153     netif_trans_update(dev); /* prevent tx timeout */
1154     dev->stats.tx_errors++;
1155 
1156     /* Restart the chip's Tx/Rx processes . */
1157     writew(0x0002, ioaddr + TxCmd); /* STOP Tx */
1158     writew(0x0001, ioaddr + TxCmd); /* START Tx */
1159     writew(0x0001, ioaddr + RxCmd); /* START Rx */
1160 
1161     netif_wake_queue(dev);
1162 }
1163 
1164 
1165 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
1166 static void hamachi_init_ring(struct net_device *dev)
1167 {
1168     struct hamachi_private *hmp = netdev_priv(dev);
1169     int i;
1170 
1171     hmp->tx_full = 0;
1172     hmp->cur_rx = hmp->cur_tx = 0;
1173     hmp->dirty_rx = hmp->dirty_tx = 0;
1174 
1175     /* +26 gets the maximum ethernet encapsulation, +7 & ~7 because the
1176      * card needs room to do 8 byte alignment, +2 so we can reserve
1177      * the first 2 bytes, and +16 gets room for the status word from the
1178      * card.  -KDU
1179      */
1180     hmp->rx_buf_sz = (dev->mtu <= 1492 ? PKT_BUF_SZ :
1181         (((dev->mtu+26+7) & ~7) + 16));
1182 
1183     /* Initialize all Rx descriptors. */
1184     for (i = 0; i < RX_RING_SIZE; i++) {
1185         hmp->rx_ring[i].status_n_length = 0;
1186         hmp->rx_skbuff[i] = NULL;
1187     }
1188     /* Fill in the Rx buffers.  Handle allocation failure gracefully. */
1189     for (i = 0; i < RX_RING_SIZE; i++) {
1190         struct sk_buff *skb = netdev_alloc_skb(dev, hmp->rx_buf_sz + 2);
1191         hmp->rx_skbuff[i] = skb;
1192         if (skb == NULL)
1193             break;
1194         skb_reserve(skb, 2); /* 16 byte align the IP header. */
1195         hmp->rx_ring[i].addr = cpu_to_leXX(dma_map_single(&hmp->pci_dev->dev,
1196                                   skb->data,
1197                                   hmp->rx_buf_sz,
1198                                   DMA_FROM_DEVICE));
1199         /* -2 because it doesn't REALLY have that first 2 bytes -KDU */
1200         hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1201             DescEndPacket | DescIntr | (hmp->rx_buf_sz -2));
1202     }
1203     hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1204     hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1205 
1206     for (i = 0; i < TX_RING_SIZE; i++) {
1207         hmp->tx_skbuff[i] = NULL;
1208         hmp->tx_ring[i].status_n_length = 0;
1209     }
1210     /* Mark the last entry of the ring */
1211     hmp->tx_ring[TX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1212 }
1213 
1214 
1215 static netdev_tx_t hamachi_start_xmit(struct sk_buff *skb,
1216                       struct net_device *dev)
1217 {
1218     struct hamachi_private *hmp = netdev_priv(dev);
1219     unsigned entry;
1220     u16 status;
1221 
1222     /* Ok, now make sure that the queue has space before trying to
1223         add another skbuff.  if we return non-zero the scheduler
1224         should interpret this as a queue full and requeue the buffer
1225         for later.
1226      */
1227     if (hmp->tx_full) {
1228         /* We should NEVER reach this point -KDU */
1229         printk(KERN_WARNING "%s: Hamachi transmit queue full at slot %d.\n",dev->name, hmp->cur_tx);
1230 
1231         /* Wake the potentially-idle transmit channel. */
1232         /* If we don't need to read status, DON'T -KDU */
1233         status=readw(hmp->base + TxStatus);
1234         if( !(status & 0x0001) || (status & 0x0002))
1235             writew(0x0001, hmp->base + TxCmd);
1236         return NETDEV_TX_BUSY;
1237     }
1238 
1239     /* Caution: the write order is important here, set the field
1240        with the "ownership" bits last. */
1241 
1242     /* Calculate the next Tx descriptor entry. */
1243     entry = hmp->cur_tx % TX_RING_SIZE;
1244 
1245     hmp->tx_skbuff[entry] = skb;
1246 
1247     hmp->tx_ring[entry].addr = cpu_to_leXX(dma_map_single(&hmp->pci_dev->dev,
1248                                   skb->data,
1249                                   skb->len,
1250                                   DMA_TO_DEVICE));
1251 
1252     /* Hmmmm, could probably put a DescIntr on these, but the way
1253         the driver is currently coded makes Tx interrupts unnecessary
1254         since the clearing of the Tx ring is handled by the start_xmit
1255         routine.  This organization helps mitigate the interrupts a
1256         bit and probably renders the max_tx_latency param useless.
1257 
1258         Update: Putting a DescIntr bit on all of the descriptors and
1259         mitigating interrupt frequency with the tx_min_pkt parameter. -KDU
1260     */
1261     if (entry >= TX_RING_SIZE-1)         /* Wrap ring */
1262         hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1263             DescEndPacket | DescEndRing | DescIntr | skb->len);
1264     else
1265         hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1266             DescEndPacket | DescIntr | skb->len);
1267     hmp->cur_tx++;
1268 
1269     /* Non-x86 Todo: explicitly flush cache lines here. */
1270 
1271     /* Wake the potentially-idle transmit channel. */
1272     /* If we don't need to read status, DON'T -KDU */
1273     status=readw(hmp->base + TxStatus);
1274     if( !(status & 0x0001) || (status & 0x0002))
1275         writew(0x0001, hmp->base + TxCmd);
1276 
1277     /* Immediately before returning, let's clear as many entries as we can. */
1278     hamachi_tx(dev);
1279 
1280     /* We should kick the bottom half here, since we are not accepting
1281      * interrupts with every packet.  i.e. realize that Gigabit ethernet
1282      * can transmit faster than ordinary machines can load packets;
1283      * hence, any packet that got put off because we were in the transmit
1284      * routine should IMMEDIATELY get a chance to be re-queued. -KDU
1285      */
1286     if ((hmp->cur_tx - hmp->dirty_tx) < (TX_RING_SIZE - 4))
1287         netif_wake_queue(dev);  /* Typical path */
1288     else {
1289         hmp->tx_full = 1;
1290         netif_stop_queue(dev);
1291     }
1292 
1293     if (hamachi_debug > 4) {
1294         printk(KERN_DEBUG "%s: Hamachi transmit frame #%d queued in slot %d.\n",
1295                dev->name, hmp->cur_tx, entry);
1296     }
1297     return NETDEV_TX_OK;
1298 }
1299 
1300 /* The interrupt handler does all of the Rx thread work and cleans up
1301    after the Tx thread. */
1302 static irqreturn_t hamachi_interrupt(int irq, void *dev_instance)
1303 {
1304     struct net_device *dev = dev_instance;
1305     struct hamachi_private *hmp = netdev_priv(dev);
1306     void __iomem *ioaddr = hmp->base;
1307     long boguscnt = max_interrupt_work;
1308     int handled = 0;
1309 
1310 #ifndef final_version           /* Can never occur. */
1311     if (dev == NULL) {
1312         printk (KERN_ERR "hamachi_interrupt(): irq %d for unknown device.\n", irq);
1313         return IRQ_NONE;
1314     }
1315 #endif
1316 
1317     spin_lock(&hmp->lock);
1318 
1319     do {
1320         u32 intr_status = readl(ioaddr + InterruptClear);
1321 
1322         if (hamachi_debug > 4)
1323             printk(KERN_DEBUG "%s: Hamachi interrupt, status %4.4x.\n",
1324                    dev->name, intr_status);
1325 
1326         if (intr_status == 0)
1327             break;
1328 
1329         handled = 1;
1330 
1331         if (intr_status & IntrRxDone)
1332             hamachi_rx(dev);
1333 
1334         if (intr_status & IntrTxDone){
1335             /* This code should RARELY need to execute. After all, this is
1336              * a gigabit link, it should consume packets as fast as we put
1337              * them in AND we clear the Tx ring in hamachi_start_xmit().
1338              */
1339             if (hmp->tx_full){
1340                 for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++){
1341                     int entry = hmp->dirty_tx % TX_RING_SIZE;
1342                     struct sk_buff *skb;
1343 
1344                     if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1345                         break;
1346                     skb = hmp->tx_skbuff[entry];
1347                     /* Free the original skb. */
1348                     if (skb){
1349                         dma_unmap_single(&hmp->pci_dev->dev,
1350                                  leXX_to_cpu(hmp->tx_ring[entry].addr),
1351                                  skb->len,
1352                                  DMA_TO_DEVICE);
1353                         dev_consume_skb_irq(skb);
1354                         hmp->tx_skbuff[entry] = NULL;
1355                     }
1356                     hmp->tx_ring[entry].status_n_length = 0;
1357                     if (entry >= TX_RING_SIZE-1)
1358                         hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1359                             cpu_to_le32(DescEndRing);
1360                     dev->stats.tx_packets++;
1361                 }
1362                 if (hmp->cur_tx - hmp->dirty_tx < TX_RING_SIZE - 4){
1363                     /* The ring is no longer full */
1364                     hmp->tx_full = 0;
1365                     netif_wake_queue(dev);
1366                 }
1367             } else {
1368                 netif_wake_queue(dev);
1369             }
1370         }
1371 
1372 
1373         /* Abnormal error summary/uncommon events handlers. */
1374         if (intr_status &
1375             (IntrTxPCIFault | IntrTxPCIErr | IntrRxPCIFault | IntrRxPCIErr |
1376              LinkChange | NegotiationChange | StatsMax))
1377             hamachi_error(dev, intr_status);
1378 
1379         if (--boguscnt < 0) {
1380             printk(KERN_WARNING "%s: Too much work at interrupt, status=0x%4.4x.\n",
1381                    dev->name, intr_status);
1382             break;
1383         }
1384     } while (1);
1385 
1386     if (hamachi_debug > 3)
1387         printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n",
1388                dev->name, readl(ioaddr + IntrStatus));
1389 
1390 #ifndef final_version
1391     /* Code that should never be run!  Perhaps remove after testing.. */
1392     {
1393         static int stopit = 10;
1394         if (dev->start == 0  &&  --stopit < 0) {
1395             printk(KERN_ERR "%s: Emergency stop, looping startup interrupt.\n",
1396                    dev->name);
1397             free_irq(irq, dev);
1398         }
1399     }
1400 #endif
1401 
1402     spin_unlock(&hmp->lock);
1403     return IRQ_RETVAL(handled);
1404 }
1405 
1406 /* This routine is logically part of the interrupt handler, but separated
1407    for clarity and better register allocation. */
1408 static int hamachi_rx(struct net_device *dev)
1409 {
1410     struct hamachi_private *hmp = netdev_priv(dev);
1411     int entry = hmp->cur_rx % RX_RING_SIZE;
1412     int boguscnt = (hmp->dirty_rx + RX_RING_SIZE) - hmp->cur_rx;
1413 
1414     if (hamachi_debug > 4) {
1415         printk(KERN_DEBUG " In hamachi_rx(), entry %d status %4.4x.\n",
1416                entry, hmp->rx_ring[entry].status_n_length);
1417     }
1418 
1419     /* If EOP is set on the next entry, it's a new packet. Send it up. */
1420     while (1) {
1421         struct hamachi_desc *desc = &(hmp->rx_ring[entry]);
1422         u32 desc_status = le32_to_cpu(desc->status_n_length);
1423         u16 data_size = desc_status;    /* Implicit truncate */
1424         u8 *buf_addr;
1425         s32 frame_status;
1426 
1427         if (desc_status & DescOwn)
1428             break;
1429         dma_sync_single_for_cpu(&hmp->pci_dev->dev,
1430                     leXX_to_cpu(desc->addr),
1431                     hmp->rx_buf_sz, DMA_FROM_DEVICE);
1432         buf_addr = (u8 *) hmp->rx_skbuff[entry]->data;
1433         frame_status = get_unaligned_le32(&(buf_addr[data_size - 12]));
1434         if (hamachi_debug > 4)
1435             printk(KERN_DEBUG "  hamachi_rx() status was %8.8x.\n",
1436                 frame_status);
1437         if (--boguscnt < 0)
1438             break;
1439         if ( ! (desc_status & DescEndPacket)) {
1440             printk(KERN_WARNING "%s: Oversized Ethernet frame spanned "
1441                    "multiple buffers, entry %#x length %d status %4.4x!\n",
1442                    dev->name, hmp->cur_rx, data_size, desc_status);
1443             printk(KERN_WARNING "%s: Oversized Ethernet frame %p vs %p.\n",
1444                    dev->name, desc, &hmp->rx_ring[hmp->cur_rx % RX_RING_SIZE]);
1445             printk(KERN_WARNING "%s: Oversized Ethernet frame -- next status %x/%x last status %x.\n",
1446                    dev->name,
1447                    le32_to_cpu(hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length) & 0xffff0000,
1448                    le32_to_cpu(hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length) & 0x0000ffff,
1449                    le32_to_cpu(hmp->rx_ring[(hmp->cur_rx-1) % RX_RING_SIZE].status_n_length));
1450             dev->stats.rx_length_errors++;
1451         } /* else  Omit for prototype errata??? */
1452         if (frame_status & 0x00380000) {
1453             /* There was an error. */
1454             if (hamachi_debug > 2)
1455                 printk(KERN_DEBUG "  hamachi_rx() Rx error was %8.8x.\n",
1456                        frame_status);
1457             dev->stats.rx_errors++;
1458             if (frame_status & 0x00600000)
1459                 dev->stats.rx_length_errors++;
1460             if (frame_status & 0x00080000)
1461                 dev->stats.rx_frame_errors++;
1462             if (frame_status & 0x00100000)
1463                 dev->stats.rx_crc_errors++;
1464             if (frame_status < 0)
1465                 dev->stats.rx_dropped++;
1466         } else {
1467             struct sk_buff *skb;
1468             /* Omit CRC */
1469             u16 pkt_len = (frame_status & 0x07ff) - 4;
1470 #ifdef RX_CHECKSUM
1471             u32 pfck = *(u32 *) &buf_addr[data_size - 8];
1472 #endif
1473 
1474 
1475 #ifndef final_version
1476             if (hamachi_debug > 4)
1477                 printk(KERN_DEBUG "  hamachi_rx() normal Rx pkt length %d"
1478                        " of %d, bogus_cnt %d.\n",
1479                        pkt_len, data_size, boguscnt);
1480             if (hamachi_debug > 5)
1481                 printk(KERN_DEBUG"%s:  rx status %8.8x %8.8x %8.8x %8.8x %8.8x.\n",
1482                        dev->name,
1483                        *(s32*)&(buf_addr[data_size - 20]),
1484                        *(s32*)&(buf_addr[data_size - 16]),
1485                        *(s32*)&(buf_addr[data_size - 12]),
1486                        *(s32*)&(buf_addr[data_size - 8]),
1487                        *(s32*)&(buf_addr[data_size - 4]));
1488 #endif
1489             /* Check if the packet is long enough to accept without copying
1490                to a minimally-sized skbuff. */
1491             if (pkt_len < rx_copybreak &&
1492                 (skb = netdev_alloc_skb(dev, pkt_len + 2)) != NULL) {
1493 #ifdef RX_CHECKSUM
1494                 printk(KERN_ERR "%s: rx_copybreak non-zero "
1495                   "not good with RX_CHECKSUM\n", dev->name);
1496 #endif
1497                 skb_reserve(skb, 2);    /* 16 byte align the IP header */
1498                 dma_sync_single_for_cpu(&hmp->pci_dev->dev,
1499                             leXX_to_cpu(hmp->rx_ring[entry].addr),
1500                             hmp->rx_buf_sz,
1501                             DMA_FROM_DEVICE);
1502                 /* Call copy + cksum if available. */
1503 #if 1 || USE_IP_COPYSUM
1504                 skb_copy_to_linear_data(skb,
1505                     hmp->rx_skbuff[entry]->data, pkt_len);
1506                 skb_put(skb, pkt_len);
1507 #else
1508                 skb_put_data(skb, hmp->rx_ring_dma
1509                          + entry*sizeof(*desc), pkt_len);
1510 #endif
1511                 dma_sync_single_for_device(&hmp->pci_dev->dev,
1512                                leXX_to_cpu(hmp->rx_ring[entry].addr),
1513                                hmp->rx_buf_sz,
1514                                DMA_FROM_DEVICE);
1515             } else {
1516                 dma_unmap_single(&hmp->pci_dev->dev,
1517                          leXX_to_cpu(hmp->rx_ring[entry].addr),
1518                          hmp->rx_buf_sz,
1519                          DMA_FROM_DEVICE);
1520                 skb_put(skb = hmp->rx_skbuff[entry], pkt_len);
1521                 hmp->rx_skbuff[entry] = NULL;
1522             }
1523             skb->protocol = eth_type_trans(skb, dev);
1524 
1525 
1526 #ifdef RX_CHECKSUM
1527             /* TCP or UDP on ipv4, DIX encoding */
1528             if (pfck>>24 == 0x91 || pfck>>24 == 0x51) {
1529                 struct iphdr *ih = (struct iphdr *) skb->data;
1530                 /* Check that IP packet is at least 46 bytes, otherwise,
1531                  * there may be pad bytes included in the hardware checksum.
1532                  * This wouldn't happen if everyone padded with 0.
1533                  */
1534                 if (ntohs(ih->tot_len) >= 46){
1535                     /* don't worry about frags */
1536                     if (!(ih->frag_off & cpu_to_be16(IP_MF|IP_OFFSET))) {
1537                         u32 inv = *(u32 *) &buf_addr[data_size - 16];
1538                         u32 *p = (u32 *) &buf_addr[data_size - 20];
1539                         register u32 crc, p_r, p_r1;
1540 
1541                         if (inv & 4) {
1542                             inv &= ~4;
1543                             --p;
1544                         }
1545                         p_r = *p;
1546                         p_r1 = *(p-1);
1547                         switch (inv) {
1548                             case 0:
1549                                 crc = (p_r & 0xffff) + (p_r >> 16);
1550                                 break;
1551                             case 1:
1552                                 crc = (p_r >> 16) + (p_r & 0xffff)
1553                                     + (p_r1 >> 16 & 0xff00);
1554                                 break;
1555                             case 2:
1556                                 crc = p_r + (p_r1 >> 16);
1557                                 break;
1558                             case 3:
1559                                 crc = p_r + (p_r1 & 0xff00) + (p_r1 >> 16);
1560                                 break;
1561                             default:    /*NOTREACHED*/ crc = 0;
1562                         }
1563                         if (crc & 0xffff0000) {
1564                             crc &= 0xffff;
1565                             ++crc;
1566                         }
1567                         /* tcp/udp will add in pseudo */
1568                         skb->csum = ntohs(pfck & 0xffff);
1569                         if (skb->csum > crc)
1570                             skb->csum -= crc;
1571                         else
1572                             skb->csum += (~crc & 0xffff);
1573                         /*
1574                         * could do the pseudo myself and return
1575                         * CHECKSUM_UNNECESSARY
1576                         */
1577                         skb->ip_summed = CHECKSUM_COMPLETE;
1578                     }
1579                 }
1580             }
1581 #endif  /* RX_CHECKSUM */
1582 
1583             netif_rx(skb);
1584             dev->stats.rx_packets++;
1585         }
1586         entry = (++hmp->cur_rx) % RX_RING_SIZE;
1587     }
1588 
1589     /* Refill the Rx ring buffers. */
1590     for (; hmp->cur_rx - hmp->dirty_rx > 0; hmp->dirty_rx++) {
1591         struct hamachi_desc *desc;
1592 
1593         entry = hmp->dirty_rx % RX_RING_SIZE;
1594         desc = &(hmp->rx_ring[entry]);
1595         if (hmp->rx_skbuff[entry] == NULL) {
1596             struct sk_buff *skb = netdev_alloc_skb(dev, hmp->rx_buf_sz + 2);
1597 
1598             hmp->rx_skbuff[entry] = skb;
1599             if (skb == NULL)
1600                 break;      /* Better luck next round. */
1601             skb_reserve(skb, 2);    /* Align IP on 16 byte boundaries */
1602             desc->addr = cpu_to_leXX(dma_map_single(&hmp->pci_dev->dev,
1603                                 skb->data,
1604                                 hmp->rx_buf_sz,
1605                                 DMA_FROM_DEVICE));
1606         }
1607         desc->status_n_length = cpu_to_le32(hmp->rx_buf_sz);
1608         if (entry >= RX_RING_SIZE-1)
1609             desc->status_n_length |= cpu_to_le32(DescOwn |
1610                 DescEndPacket | DescEndRing | DescIntr);
1611         else
1612             desc->status_n_length |= cpu_to_le32(DescOwn |
1613                 DescEndPacket | DescIntr);
1614     }
1615 
1616     /* Restart Rx engine if stopped. */
1617     /* If we don't need to check status, don't. -KDU */
1618     if (readw(hmp->base + RxStatus) & 0x0002)
1619         writew(0x0001, hmp->base + RxCmd);
1620 
1621     return 0;
1622 }
1623 
1624 /* This is more properly named "uncommon interrupt events", as it covers more
1625    than just errors. */
1626 static void hamachi_error(struct net_device *dev, int intr_status)
1627 {
1628     struct hamachi_private *hmp = netdev_priv(dev);
1629     void __iomem *ioaddr = hmp->base;
1630 
1631     if (intr_status & (LinkChange|NegotiationChange)) {
1632         if (hamachi_debug > 1)
1633             printk(KERN_INFO "%s: Link changed: AutoNegotiation Ctrl"
1634                    " %4.4x, Status %4.4x %4.4x Intr status %4.4x.\n",
1635                    dev->name, readw(ioaddr + 0x0E0), readw(ioaddr + 0x0E2),
1636                    readw(ioaddr + ANLinkPartnerAbility),
1637                    readl(ioaddr + IntrStatus));
1638         if (readw(ioaddr + ANStatus) & 0x20)
1639             writeb(0x01, ioaddr + LEDCtrl);
1640         else
1641             writeb(0x03, ioaddr + LEDCtrl);
1642     }
1643     if (intr_status & StatsMax) {
1644         hamachi_get_stats(dev);
1645         /* Read the overflow bits to clear. */
1646         readl(ioaddr + 0x370);
1647         readl(ioaddr + 0x3F0);
1648     }
1649     if ((intr_status & ~(LinkChange|StatsMax|NegotiationChange|IntrRxDone|IntrTxDone)) &&
1650         hamachi_debug)
1651         printk(KERN_ERR "%s: Something Wicked happened! %4.4x.\n",
1652                dev->name, intr_status);
1653     /* Hmmmmm, it's not clear how to recover from PCI faults. */
1654     if (intr_status & (IntrTxPCIErr | IntrTxPCIFault))
1655         dev->stats.tx_fifo_errors++;
1656     if (intr_status & (IntrRxPCIErr | IntrRxPCIFault))
1657         dev->stats.rx_fifo_errors++;
1658 }
1659 
1660 static int hamachi_close(struct net_device *dev)
1661 {
1662     struct hamachi_private *hmp = netdev_priv(dev);
1663     void __iomem *ioaddr = hmp->base;
1664     struct sk_buff *skb;
1665     int i;
1666 
1667     netif_stop_queue(dev);
1668 
1669     if (hamachi_debug > 1) {
1670         printk(KERN_DEBUG "%s: Shutting down ethercard, status was Tx %4.4x Rx %4.4x Int %2.2x.\n",
1671                dev->name, readw(ioaddr + TxStatus),
1672                readw(ioaddr + RxStatus), readl(ioaddr + IntrStatus));
1673         printk(KERN_DEBUG "%s: Queue pointers were Tx %d / %d,  Rx %d / %d.\n",
1674                dev->name, hmp->cur_tx, hmp->dirty_tx, hmp->cur_rx, hmp->dirty_rx);
1675     }
1676 
1677     /* Disable interrupts by clearing the interrupt mask. */
1678     writel(0x0000, ioaddr + InterruptEnable);
1679 
1680     /* Stop the chip's Tx and Rx processes. */
1681     writel(2, ioaddr + RxCmd);
1682     writew(2, ioaddr + TxCmd);
1683 
1684 #ifdef __i386__
1685     if (hamachi_debug > 2) {
1686         printk(KERN_DEBUG "  Tx ring at %8.8x:\n",
1687                (int)hmp->tx_ring_dma);
1688         for (i = 0; i < TX_RING_SIZE; i++)
1689             printk(KERN_DEBUG " %c #%d desc. %8.8x %8.8x.\n",
1690                    readl(ioaddr + TxCurPtr) == (long)&hmp->tx_ring[i] ? '>' : ' ',
1691                    i, hmp->tx_ring[i].status_n_length, hmp->tx_ring[i].addr);
1692         printk(KERN_DEBUG "  Rx ring %8.8x:\n",
1693                (int)hmp->rx_ring_dma);
1694         for (i = 0; i < RX_RING_SIZE; i++) {
1695             printk(KERN_DEBUG " %c #%d desc. %4.4x %8.8x\n",
1696                    readl(ioaddr + RxCurPtr) == (long)&hmp->rx_ring[i] ? '>' : ' ',
1697                    i, hmp->rx_ring[i].status_n_length, hmp->rx_ring[i].addr);
1698             if (hamachi_debug > 6) {
1699                 if (*(u8*)hmp->rx_skbuff[i]->data != 0x69) {
1700                     u16 *addr = (u16 *)
1701                         hmp->rx_skbuff[i]->data;
1702                     int j;
1703                     printk(KERN_DEBUG "Addr: ");
1704                     for (j = 0; j < 0x50; j++)
1705                         printk(" %4.4x", addr[j]);
1706                     printk("\n");
1707                 }
1708             }
1709         }
1710     }
1711 #endif /* __i386__ debugging only */
1712 
1713     free_irq(hmp->pci_dev->irq, dev);
1714 
1715     del_timer_sync(&hmp->timer);
1716 
1717     /* Free all the skbuffs in the Rx queue. */
1718     for (i = 0; i < RX_RING_SIZE; i++) {
1719         skb = hmp->rx_skbuff[i];
1720         hmp->rx_ring[i].status_n_length = 0;
1721         if (skb) {
1722             dma_unmap_single(&hmp->pci_dev->dev,
1723                      leXX_to_cpu(hmp->rx_ring[i].addr),
1724                      hmp->rx_buf_sz, DMA_FROM_DEVICE);
1725             dev_kfree_skb(skb);
1726             hmp->rx_skbuff[i] = NULL;
1727         }
1728         hmp->rx_ring[i].addr = cpu_to_leXX(0xBADF00D0); /* An invalid address. */
1729     }
1730     for (i = 0; i < TX_RING_SIZE; i++) {
1731         skb = hmp->tx_skbuff[i];
1732         if (skb) {
1733             dma_unmap_single(&hmp->pci_dev->dev,
1734                      leXX_to_cpu(hmp->tx_ring[i].addr),
1735                      skb->len, DMA_TO_DEVICE);
1736             dev_kfree_skb(skb);
1737             hmp->tx_skbuff[i] = NULL;
1738         }
1739     }
1740 
1741     writeb(0x00, ioaddr + LEDCtrl);
1742 
1743     return 0;
1744 }
1745 
1746 static struct net_device_stats *hamachi_get_stats(struct net_device *dev)
1747 {
1748     struct hamachi_private *hmp = netdev_priv(dev);
1749     void __iomem *ioaddr = hmp->base;
1750 
1751     /* We should lock this segment of code for SMP eventually, although
1752        the vulnerability window is very small and statistics are
1753        non-critical. */
1754         /* Ok, what goes here?  This appears to be stuck at 21 packets
1755            according to ifconfig.  It does get incremented in hamachi_tx(),
1756            so I think I'll comment it out here and see if better things
1757            happen.
1758         */
1759     /* dev->stats.tx_packets    = readl(ioaddr + 0x000); */
1760 
1761     /* Total Uni+Brd+Multi */
1762     dev->stats.rx_bytes = readl(ioaddr + 0x330);
1763     /* Total Uni+Brd+Multi */
1764     dev->stats.tx_bytes = readl(ioaddr + 0x3B0);
1765     /* Multicast Rx */
1766     dev->stats.multicast = readl(ioaddr + 0x320);
1767 
1768     /* Over+Undersized */
1769     dev->stats.rx_length_errors = readl(ioaddr + 0x368);
1770     /* Jabber */
1771     dev->stats.rx_over_errors = readl(ioaddr + 0x35C);
1772     /* Jabber */
1773     dev->stats.rx_crc_errors = readl(ioaddr + 0x360);
1774     /* Symbol Errs */
1775     dev->stats.rx_frame_errors = readl(ioaddr + 0x364);
1776     /* Dropped */
1777     dev->stats.rx_missed_errors = readl(ioaddr + 0x36C);
1778 
1779     return &dev->stats;
1780 }
1781 
1782 static void set_rx_mode(struct net_device *dev)
1783 {
1784     struct hamachi_private *hmp = netdev_priv(dev);
1785     void __iomem *ioaddr = hmp->base;
1786 
1787     if (dev->flags & IFF_PROMISC) {         /* Set promiscuous. */
1788         writew(0x000F, ioaddr + AddrMode);
1789     } else if ((netdev_mc_count(dev) > 63) || (dev->flags & IFF_ALLMULTI)) {
1790         /* Too many to match, or accept all multicasts. */
1791         writew(0x000B, ioaddr + AddrMode);
1792     } else if (!netdev_mc_empty(dev)) { /* Must use the CAM filter. */
1793         struct netdev_hw_addr *ha;
1794         int i = 0;
1795 
1796         netdev_for_each_mc_addr(ha, dev) {
1797             writel(*(u32 *)(ha->addr), ioaddr + 0x100 + i*8);
1798             writel(0x20000 | (*(u16 *)&ha->addr[4]),
1799                    ioaddr + 0x104 + i*8);
1800             i++;
1801         }
1802         /* Clear remaining entries. */
1803         for (; i < 64; i++)
1804             writel(0, ioaddr + 0x104 + i*8);
1805         writew(0x0003, ioaddr + AddrMode);
1806     } else {                    /* Normal, unicast/broadcast-only mode. */
1807         writew(0x0001, ioaddr + AddrMode);
1808     }
1809 }
1810 
1811 static int check_if_running(struct net_device *dev)
1812 {
1813     if (!netif_running(dev))
1814         return -EINVAL;
1815     return 0;
1816 }
1817 
1818 static void hamachi_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1819 {
1820     struct hamachi_private *np = netdev_priv(dev);
1821 
1822     strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
1823     strlcpy(info->version, DRV_VERSION, sizeof(info->version));
1824     strlcpy(info->bus_info, pci_name(np->pci_dev), sizeof(info->bus_info));
1825 }
1826 
1827 static int hamachi_get_link_ksettings(struct net_device *dev,
1828                       struct ethtool_link_ksettings *cmd)
1829 {
1830     struct hamachi_private *np = netdev_priv(dev);
1831     spin_lock_irq(&np->lock);
1832     mii_ethtool_get_link_ksettings(&np->mii_if, cmd);
1833     spin_unlock_irq(&np->lock);
1834     return 0;
1835 }
1836 
1837 static int hamachi_set_link_ksettings(struct net_device *dev,
1838                       const struct ethtool_link_ksettings *cmd)
1839 {
1840     struct hamachi_private *np = netdev_priv(dev);
1841     int res;
1842     spin_lock_irq(&np->lock);
1843     res = mii_ethtool_set_link_ksettings(&np->mii_if, cmd);
1844     spin_unlock_irq(&np->lock);
1845     return res;
1846 }
1847 
1848 static int hamachi_nway_reset(struct net_device *dev)
1849 {
1850     struct hamachi_private *np = netdev_priv(dev);
1851     return mii_nway_restart(&np->mii_if);
1852 }
1853 
1854 static u32 hamachi_get_link(struct net_device *dev)
1855 {
1856     struct hamachi_private *np = netdev_priv(dev);
1857     return mii_link_ok(&np->mii_if);
1858 }
1859 
1860 static const struct ethtool_ops ethtool_ops = {
1861     .begin = check_if_running,
1862     .get_drvinfo = hamachi_get_drvinfo,
1863     .nway_reset = hamachi_nway_reset,
1864     .get_link = hamachi_get_link,
1865     .get_link_ksettings = hamachi_get_link_ksettings,
1866     .set_link_ksettings = hamachi_set_link_ksettings,
1867 };
1868 
1869 static const struct ethtool_ops ethtool_ops_no_mii = {
1870     .begin = check_if_running,
1871     .get_drvinfo = hamachi_get_drvinfo,
1872 };
1873 
1874 /* private ioctl: set rx,tx intr params */
1875 static int hamachi_siocdevprivate(struct net_device *dev, struct ifreq *rq,
1876                   void __user *data, int cmd)
1877 {
1878     struct hamachi_private *np = netdev_priv(dev);
1879     u32 *d = (u32 *)&rq->ifr_ifru;
1880 
1881     if (!netif_running(dev))
1882         return -EINVAL;
1883 
1884     if (cmd != SIOCDEVPRIVATE + 3)
1885         return -EOPNOTSUPP;
1886 
1887     /* Should add this check here or an ordinary user can do nasty
1888      * things. -KDU
1889      *
1890      * TODO: Shut down the Rx and Tx engines while doing this.
1891      */
1892     if (!capable(CAP_NET_ADMIN))
1893         return -EPERM;
1894     writel(d[0], np->base + TxIntrCtrl);
1895     writel(d[1], np->base + RxIntrCtrl);
1896     printk(KERN_NOTICE "%s: tx %08x, rx %08x intr\n", dev->name,
1897            (u32)readl(np->base + TxIntrCtrl),
1898            (u32)readl(np->base + RxIntrCtrl));
1899 
1900     return 0;
1901 }
1902 
1903 static int hamachi_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1904 {
1905     struct hamachi_private *np = netdev_priv(dev);
1906     struct mii_ioctl_data *data = if_mii(rq);
1907     int rc;
1908 
1909     if (!netif_running(dev))
1910         return -EINVAL;
1911 
1912     spin_lock_irq(&np->lock);
1913     rc = generic_mii_ioctl(&np->mii_if, data, cmd, NULL);
1914     spin_unlock_irq(&np->lock);
1915 
1916     return rc;
1917 }
1918 
1919 
1920 static void hamachi_remove_one(struct pci_dev *pdev)
1921 {
1922     struct net_device *dev = pci_get_drvdata(pdev);
1923 
1924     if (dev) {
1925         struct hamachi_private *hmp = netdev_priv(dev);
1926 
1927         dma_free_coherent(&pdev->dev, RX_TOTAL_SIZE, hmp->rx_ring,
1928                   hmp->rx_ring_dma);
1929         dma_free_coherent(&pdev->dev, TX_TOTAL_SIZE, hmp->tx_ring,
1930                   hmp->tx_ring_dma);
1931         unregister_netdev(dev);
1932         iounmap(hmp->base);
1933         free_netdev(dev);
1934         pci_release_regions(pdev);
1935     }
1936 }
1937 
1938 static const struct pci_device_id hamachi_pci_tbl[] = {
1939     { 0x1318, 0x0911, PCI_ANY_ID, PCI_ANY_ID, },
1940     { 0, }
1941 };
1942 MODULE_DEVICE_TABLE(pci, hamachi_pci_tbl);
1943 
1944 static struct pci_driver hamachi_driver = {
1945     .name       = DRV_NAME,
1946     .id_table   = hamachi_pci_tbl,
1947     .probe      = hamachi_init_one,
1948     .remove     = hamachi_remove_one,
1949 };
1950 
1951 static int __init hamachi_init (void)
1952 {
1953 /* when a module, this is printed whether or not devices are found in probe */
1954 #ifdef MODULE
1955     printk(version);
1956 #endif
1957     return pci_register_driver(&hamachi_driver);
1958 }
1959 
1960 static void __exit hamachi_exit (void)
1961 {
1962     pci_unregister_driver(&hamachi_driver);
1963 }
1964 
1965 
1966 module_init(hamachi_init);
1967 module_exit(hamachi_exit);