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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Header file for sonic.c
0004  *
0005  * (C) Waldorf Electronics, Germany
0006  * Written by Andreas Busse
0007  *
0008  * NOTE: most of the structure definitions here are endian dependent.
0009  * If you want to use this driver on big endian machines, the data
0010  * and pad structure members must be exchanged. Also, the structures
0011  * need to be changed accordingly to the bus size.
0012  *
0013  * 981229 MSch: did just that for the 68k Mac port (32 bit, big endian)
0014  *
0015  * 990611 David Huggins-Daines <dhd@debian.org>: This machine abstraction
0016  * does not cope with 16-bit bus sizes very well.  Therefore I have
0017  * rewritten it with ugly macros and evil inlines.
0018  *
0019  * 050625 Finn Thain: introduced more 32-bit cards and dhd's support
0020  *        for 16-bit cards (from the mac68k project).
0021  */
0022 
0023 #ifndef SONIC_H
0024 #define SONIC_H
0025 
0026 
0027 /*
0028  * SONIC register offsets
0029  */
0030 
0031 #define SONIC_CMD              0x00
0032 #define SONIC_DCR              0x01
0033 #define SONIC_RCR              0x02
0034 #define SONIC_TCR              0x03
0035 #define SONIC_IMR              0x04
0036 #define SONIC_ISR              0x05
0037 
0038 #define SONIC_UTDA             0x06
0039 #define SONIC_CTDA             0x07
0040 
0041 #define SONIC_URDA             0x0d
0042 #define SONIC_CRDA             0x0e
0043 #define SONIC_EOBC             0x13
0044 #define SONIC_URRA             0x14
0045 #define SONIC_RSA              0x15
0046 #define SONIC_REA              0x16
0047 #define SONIC_RRP              0x17
0048 #define SONIC_RWP              0x18
0049 #define SONIC_RSC              0x2b
0050 
0051 #define SONIC_CEP              0x21
0052 #define SONIC_CAP2             0x22
0053 #define SONIC_CAP1             0x23
0054 #define SONIC_CAP0             0x24
0055 #define SONIC_CE               0x25
0056 #define SONIC_CDP              0x26
0057 #define SONIC_CDC              0x27
0058 
0059 #define SONIC_WT0              0x29
0060 #define SONIC_WT1              0x2a
0061 
0062 #define SONIC_SR               0x28
0063 
0064 
0065 /* test-only registers */
0066 
0067 #define SONIC_TPS       0x08
0068 #define SONIC_TFC       0x09
0069 #define SONIC_TSA0      0x0a
0070 #define SONIC_TSA1      0x0b
0071 #define SONIC_TFS       0x0c
0072 
0073 #define SONIC_CRBA0     0x0f
0074 #define SONIC_CRBA1     0x10
0075 #define SONIC_RBWC0     0x11
0076 #define SONIC_RBWC1     0x12
0077 #define SONIC_TTDA      0x20
0078 #define SONIC_MDT       0x2f
0079 
0080 #define SONIC_TRBA0     0x19
0081 #define SONIC_TRBA1     0x1a
0082 #define SONIC_TBWC0     0x1b
0083 #define SONIC_TBWC1     0x1c
0084 #define SONIC_LLFA      0x1f
0085 
0086 #define SONIC_ADDR0     0x1d
0087 #define SONIC_ADDR1     0x1e
0088 
0089 /*
0090  * Error counters
0091  */
0092 
0093 #define SONIC_CRCT              0x2c
0094 #define SONIC_FAET              0x2d
0095 #define SONIC_MPT               0x2e
0096 
0097 #define SONIC_DCR2              0x3f
0098 
0099 /*
0100  * SONIC command bits
0101  */
0102 
0103 #define SONIC_CR_LCAM           0x0200
0104 #define SONIC_CR_RRRA           0x0100
0105 #define SONIC_CR_RST            0x0080
0106 #define SONIC_CR_ST             0x0020
0107 #define SONIC_CR_STP            0x0010
0108 #define SONIC_CR_RXEN           0x0008
0109 #define SONIC_CR_RXDIS          0x0004
0110 #define SONIC_CR_TXP            0x0002
0111 #define SONIC_CR_HTX            0x0001
0112 
0113 #define SONIC_CR_ALL (SONIC_CR_LCAM | SONIC_CR_RRRA | \
0114               SONIC_CR_RXEN | SONIC_CR_TXP)
0115 
0116 /*
0117  * SONIC data configuration bits
0118  */
0119 
0120 #define SONIC_DCR_EXBUS         0x8000
0121 #define SONIC_DCR_LBR           0x2000
0122 #define SONIC_DCR_PO1           0x1000
0123 #define SONIC_DCR_PO0           0x0800
0124 #define SONIC_DCR_SBUS          0x0400
0125 #define SONIC_DCR_USR1          0x0200
0126 #define SONIC_DCR_USR0          0x0100
0127 #define SONIC_DCR_WC1           0x0080
0128 #define SONIC_DCR_WC0           0x0040
0129 #define SONIC_DCR_DW            0x0020
0130 #define SONIC_DCR_BMS           0x0010
0131 #define SONIC_DCR_RFT1          0x0008
0132 #define SONIC_DCR_RFT0          0x0004
0133 #define SONIC_DCR_TFT1          0x0002
0134 #define SONIC_DCR_TFT0          0x0001
0135 
0136 /*
0137  * Constants for the SONIC receive control register.
0138  */
0139 
0140 #define SONIC_RCR_ERR           0x8000
0141 #define SONIC_RCR_RNT           0x4000
0142 #define SONIC_RCR_BRD           0x2000
0143 #define SONIC_RCR_PRO           0x1000
0144 #define SONIC_RCR_AMC           0x0800
0145 #define SONIC_RCR_LB1           0x0400
0146 #define SONIC_RCR_LB0           0x0200
0147 
0148 #define SONIC_RCR_MC            0x0100
0149 #define SONIC_RCR_BC            0x0080
0150 #define SONIC_RCR_LPKT          0x0040
0151 #define SONIC_RCR_CRS           0x0020
0152 #define SONIC_RCR_COL           0x0010
0153 #define SONIC_RCR_CRCR          0x0008
0154 #define SONIC_RCR_FAER          0x0004
0155 #define SONIC_RCR_LBK           0x0002
0156 #define SONIC_RCR_PRX           0x0001
0157 
0158 #define SONIC_RCR_LB_OFF        0
0159 #define SONIC_RCR_LB_MAC        SONIC_RCR_LB0
0160 #define SONIC_RCR_LB_ENDEC      SONIC_RCR_LB1
0161 #define SONIC_RCR_LB_TRANS      (SONIC_RCR_LB0 | SONIC_RCR_LB1)
0162 
0163 /* default RCR setup */
0164 
0165 #define SONIC_RCR_DEFAULT       (SONIC_RCR_BRD)
0166 
0167 
0168 /*
0169  * SONIC Transmit Control register bits
0170  */
0171 
0172 #define SONIC_TCR_PINTR         0x8000
0173 #define SONIC_TCR_POWC          0x4000
0174 #define SONIC_TCR_CRCI          0x2000
0175 #define SONIC_TCR_EXDIS         0x1000
0176 #define SONIC_TCR_EXD           0x0400
0177 #define SONIC_TCR_DEF           0x0200
0178 #define SONIC_TCR_NCRS          0x0100
0179 #define SONIC_TCR_CRLS          0x0080
0180 #define SONIC_TCR_EXC           0x0040
0181 #define SONIC_TCR_OWC           0x0020
0182 #define SONIC_TCR_PMB           0x0008
0183 #define SONIC_TCR_FU            0x0004
0184 #define SONIC_TCR_BCM           0x0002
0185 #define SONIC_TCR_PTX           0x0001
0186 
0187 #define SONIC_TCR_DEFAULT       0x0000
0188 
0189 /*
0190  * Constants for the SONIC_INTERRUPT_MASK and
0191  * SONIC_INTERRUPT_STATUS registers.
0192  */
0193 
0194 #define SONIC_INT_BR        0x4000
0195 #define SONIC_INT_HBL       0x2000
0196 #define SONIC_INT_LCD       0x1000
0197 #define SONIC_INT_PINT      0x0800
0198 #define SONIC_INT_PKTRX     0x0400
0199 #define SONIC_INT_TXDN      0x0200
0200 #define SONIC_INT_TXER      0x0100
0201 #define SONIC_INT_TC        0x0080
0202 #define SONIC_INT_RDE       0x0040
0203 #define SONIC_INT_RBE       0x0020
0204 #define SONIC_INT_RBAE      0x0010
0205 #define SONIC_INT_CRC       0x0008
0206 #define SONIC_INT_FAE       0x0004
0207 #define SONIC_INT_MP        0x0002
0208 #define SONIC_INT_RFO       0x0001
0209 
0210 
0211 /*
0212  * The interrupts we allow.
0213  */
0214 
0215 #define SONIC_IMR_DEFAULT     ( SONIC_INT_BR | \
0216                                 SONIC_INT_LCD | \
0217                                 SONIC_INT_RFO | \
0218                                 SONIC_INT_PKTRX | \
0219                                 SONIC_INT_TXDN | \
0220                                 SONIC_INT_TXER | \
0221                                 SONIC_INT_RDE | \
0222                                 SONIC_INT_RBAE | \
0223                                 SONIC_INT_CRC | \
0224                                 SONIC_INT_FAE | \
0225                                 SONIC_INT_MP)
0226 
0227 
0228 #define SONIC_EOL       0x0001
0229 #define CAM_DESCRIPTORS 16
0230 
0231 /* Offsets in the various DMA buffers accessed by the SONIC */
0232 
0233 #define SONIC_BITMODE16 0
0234 #define SONIC_BITMODE32 1
0235 #define SONIC_BUS_SCALE(bitmode) ((bitmode) ? 4 : 2)
0236 /* Note!  These are all measured in bus-size units, so use SONIC_BUS_SCALE */
0237 #define SIZEOF_SONIC_RR 4
0238 #define SONIC_RR_BUFADR_L  0
0239 #define SONIC_RR_BUFADR_H  1
0240 #define SONIC_RR_BUFSIZE_L 2
0241 #define SONIC_RR_BUFSIZE_H 3
0242 
0243 #define SIZEOF_SONIC_RD 7
0244 #define SONIC_RD_STATUS   0
0245 #define SONIC_RD_PKTLEN   1
0246 #define SONIC_RD_PKTPTR_L 2
0247 #define SONIC_RD_PKTPTR_H 3
0248 #define SONIC_RD_SEQNO    4
0249 #define SONIC_RD_LINK     5
0250 #define SONIC_RD_IN_USE   6
0251 
0252 #define SIZEOF_SONIC_TD 8
0253 #define SONIC_TD_STATUS       0
0254 #define SONIC_TD_CONFIG       1
0255 #define SONIC_TD_PKTSIZE      2
0256 #define SONIC_TD_FRAG_COUNT   3
0257 #define SONIC_TD_FRAG_PTR_L   4
0258 #define SONIC_TD_FRAG_PTR_H   5
0259 #define SONIC_TD_FRAG_SIZE    6
0260 #define SONIC_TD_LINK         7
0261 
0262 #define SIZEOF_SONIC_CD 4
0263 #define SONIC_CD_ENTRY_POINTER 0
0264 #define SONIC_CD_CAP0          1
0265 #define SONIC_CD_CAP1          2
0266 #define SONIC_CD_CAP2          3
0267 
0268 #define SIZEOF_SONIC_CDA ((CAM_DESCRIPTORS * SIZEOF_SONIC_CD) + 1)
0269 #define SONIC_CDA_CAM_ENABLE   (CAM_DESCRIPTORS * SIZEOF_SONIC_CD)
0270 
0271 /*
0272  * Some tunables for the buffer areas. Power of 2 is required
0273  * the current driver uses one receive buffer for each descriptor.
0274  *
0275  * MSch: use more buffer space for the slow m68k Macs!
0276  */
0277 #define SONIC_NUM_RRS   16            /* number of receive resources */
0278 #define SONIC_NUM_RDS   SONIC_NUM_RRS /* number of receive descriptors */
0279 #define SONIC_NUM_TDS   16            /* number of transmit descriptors */
0280 
0281 #define SONIC_RRS_MASK  (SONIC_NUM_RRS - 1)
0282 #define SONIC_RDS_MASK  (SONIC_NUM_RDS - 1)
0283 #define SONIC_TDS_MASK  (SONIC_NUM_TDS - 1)
0284 
0285 #define SONIC_RBSIZE    1520          /* size of one resource buffer */
0286 
0287 /* Again, measured in bus size units! */
0288 #define SIZEOF_SONIC_DESC (SIZEOF_SONIC_CDA \
0289     + (SIZEOF_SONIC_TD * SONIC_NUM_TDS) \
0290     + (SIZEOF_SONIC_RD * SONIC_NUM_RDS) \
0291     + (SIZEOF_SONIC_RR * SONIC_NUM_RRS))
0292 
0293 /* Information that need to be kept for each board. */
0294 struct sonic_local {
0295     /* Bus size.  0 == 16 bits, 1 == 32 bits. */
0296     int dma_bitmode;
0297     /* Register offset within the longword (independent of endianness,
0298        and varies from one type of Macintosh SONIC to another
0299        (Aarrgh)) */
0300     int reg_offset;
0301     void *descriptors;
0302     /* Crud.  These areas have to be within the same 64K.  Therefore
0303        we allocate a desriptors page, and point these to places within it. */
0304     void *cda;  /* CAM descriptor area */
0305     void *tda;  /* Transmit descriptor area */
0306     void *rra;  /* Receive resource area */
0307     void *rda;  /* Receive descriptor area */
0308     struct sk_buff* volatile rx_skb[SONIC_NUM_RRS]; /* packets to be received */
0309     struct sk_buff* volatile tx_skb[SONIC_NUM_TDS]; /* packets to be transmitted */
0310     unsigned int tx_len[SONIC_NUM_TDS]; /* lengths of tx DMA mappings */
0311     /* Logical DMA addresses on MIPS, bus addresses on m68k
0312      * (so "laddr" is a bit misleading) */
0313     dma_addr_t descriptors_laddr;
0314     u32 cda_laddr;              /* logical DMA address of CDA */
0315     u32 tda_laddr;              /* logical DMA address of TDA */
0316     u32 rra_laddr;              /* logical DMA address of RRA */
0317     u32 rda_laddr;              /* logical DMA address of RDA */
0318     dma_addr_t rx_laddr[SONIC_NUM_RRS]; /* logical DMA addresses of rx skbuffs */
0319     dma_addr_t tx_laddr[SONIC_NUM_TDS]; /* logical DMA addresses of tx skbuffs */
0320     unsigned int cur_rx;
0321     unsigned int cur_tx;           /* first unacked transmit packet */
0322     unsigned int eol_rx;
0323     unsigned int eol_tx;           /* last unacked transmit packet */
0324     int msg_enable;
0325     struct device *device;         /* generic device */
0326     struct net_device_stats stats;
0327     spinlock_t lock;
0328 };
0329 
0330 #define TX_TIMEOUT (3 * HZ)
0331 
0332 /* Index to functions, as function prototypes. */
0333 
0334 static int sonic_open(struct net_device *dev);
0335 static int sonic_send_packet(struct sk_buff *skb, struct net_device *dev);
0336 static irqreturn_t sonic_interrupt(int irq, void *dev_id);
0337 static void sonic_rx(struct net_device *dev);
0338 static int sonic_close(struct net_device *dev);
0339 static struct net_device_stats *sonic_get_stats(struct net_device *dev);
0340 static void sonic_multicast_list(struct net_device *dev);
0341 static int sonic_init(struct net_device *dev, bool may_sleep);
0342 static void sonic_tx_timeout(struct net_device *dev, unsigned int txqueue);
0343 static void sonic_msg_init(struct net_device *dev);
0344 static int sonic_alloc_descriptors(struct net_device *dev);
0345 
0346 /* Internal inlines for reading/writing DMA buffers.  Note that bus
0347    size and endianness matter here, whereas they don't for registers,
0348    as far as we can tell. */
0349 /* OpenBSD calls this "SWO".  I'd like to think that sonic_buf_put()
0350    is a much better name. */
0351 static inline void sonic_buf_put(u16 *base, int bitmode,
0352                  int offset, __u16 val)
0353 {
0354     if (bitmode)
0355 #ifdef __BIG_ENDIAN
0356         __raw_writew(val, base + (offset * 2) + 1);
0357 #else
0358         __raw_writew(val, base + (offset * 2) + 0);
0359 #endif
0360     else
0361         __raw_writew(val, base + (offset * 1) + 0);
0362 }
0363 
0364 static inline __u16 sonic_buf_get(u16 *base, int bitmode,
0365                   int offset)
0366 {
0367     if (bitmode)
0368 #ifdef __BIG_ENDIAN
0369         return __raw_readw(base + (offset * 2) + 1);
0370 #else
0371         return __raw_readw(base + (offset * 2) + 0);
0372 #endif
0373     else
0374         return __raw_readw(base + (offset * 1) + 0);
0375 }
0376 
0377 /* Inlines that you should actually use for reading/writing DMA buffers */
0378 static inline void sonic_cda_put(struct net_device* dev, int entry,
0379                  int offset, __u16 val)
0380 {
0381     struct sonic_local *lp = netdev_priv(dev);
0382     sonic_buf_put(lp->cda, lp->dma_bitmode,
0383               (entry * SIZEOF_SONIC_CD) + offset, val);
0384 }
0385 
0386 static inline __u16 sonic_cda_get(struct net_device* dev, int entry,
0387                   int offset)
0388 {
0389     struct sonic_local *lp = netdev_priv(dev);
0390     return sonic_buf_get(lp->cda, lp->dma_bitmode,
0391                  (entry * SIZEOF_SONIC_CD) + offset);
0392 }
0393 
0394 static inline void sonic_set_cam_enable(struct net_device* dev, __u16 val)
0395 {
0396     struct sonic_local *lp = netdev_priv(dev);
0397     sonic_buf_put(lp->cda, lp->dma_bitmode, SONIC_CDA_CAM_ENABLE, val);
0398 }
0399 
0400 static inline __u16 sonic_get_cam_enable(struct net_device* dev)
0401 {
0402     struct sonic_local *lp = netdev_priv(dev);
0403     return sonic_buf_get(lp->cda, lp->dma_bitmode, SONIC_CDA_CAM_ENABLE);
0404 }
0405 
0406 static inline void sonic_tda_put(struct net_device* dev, int entry,
0407                  int offset, __u16 val)
0408 {
0409     struct sonic_local *lp = netdev_priv(dev);
0410     sonic_buf_put(lp->tda, lp->dma_bitmode,
0411               (entry * SIZEOF_SONIC_TD) + offset, val);
0412 }
0413 
0414 static inline __u16 sonic_tda_get(struct net_device* dev, int entry,
0415                   int offset)
0416 {
0417     struct sonic_local *lp = netdev_priv(dev);
0418     return sonic_buf_get(lp->tda, lp->dma_bitmode,
0419                  (entry * SIZEOF_SONIC_TD) + offset);
0420 }
0421 
0422 static inline void sonic_rda_put(struct net_device* dev, int entry,
0423                  int offset, __u16 val)
0424 {
0425     struct sonic_local *lp = netdev_priv(dev);
0426     sonic_buf_put(lp->rda, lp->dma_bitmode,
0427               (entry * SIZEOF_SONIC_RD) + offset, val);
0428 }
0429 
0430 static inline __u16 sonic_rda_get(struct net_device* dev, int entry,
0431                   int offset)
0432 {
0433     struct sonic_local *lp = netdev_priv(dev);
0434     return sonic_buf_get(lp->rda, lp->dma_bitmode,
0435                  (entry * SIZEOF_SONIC_RD) + offset);
0436 }
0437 
0438 static inline void sonic_rra_put(struct net_device* dev, int entry,
0439                  int offset, __u16 val)
0440 {
0441     struct sonic_local *lp = netdev_priv(dev);
0442     sonic_buf_put(lp->rra, lp->dma_bitmode,
0443               (entry * SIZEOF_SONIC_RR) + offset, val);
0444 }
0445 
0446 static inline __u16 sonic_rra_get(struct net_device* dev, int entry,
0447                   int offset)
0448 {
0449     struct sonic_local *lp = netdev_priv(dev);
0450     return sonic_buf_get(lp->rra, lp->dma_bitmode,
0451                  (entry * SIZEOF_SONIC_RR) + offset);
0452 }
0453 
0454 static inline u16 sonic_rr_addr(struct net_device *dev, int entry)
0455 {
0456     struct sonic_local *lp = netdev_priv(dev);
0457 
0458     return lp->rra_laddr +
0459            entry * SIZEOF_SONIC_RR * SONIC_BUS_SCALE(lp->dma_bitmode);
0460 }
0461 
0462 static inline u16 sonic_rr_entry(struct net_device *dev, u16 addr)
0463 {
0464     struct sonic_local *lp = netdev_priv(dev);
0465 
0466     return (addr - (u16)lp->rra_laddr) / (SIZEOF_SONIC_RR *
0467                           SONIC_BUS_SCALE(lp->dma_bitmode));
0468 }
0469 
0470 static const char version[] =
0471     "sonic.c:v0.92 20.9.98 tsbogend@alpha.franken.de\n";
0472 
0473 #endif /* SONIC_H */
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