0001
0002 #ifndef __MYRI10GE_MCP_GEN_HEADER_H__
0003 #define __MYRI10GE_MCP_GEN_HEADER_H__
0004
0005
0006 #define MCP_HEADER_PTR_OFFSET 0x3c
0007
0008 #define MCP_TYPE_MX 0x4d582020
0009 #define MCP_TYPE_PCIE 0x70636965
0010 #define MCP_TYPE_ETH 0x45544820
0011 #define MCP_TYPE_MCP0 0x4d435030
0012 #define MCP_TYPE_DFLT 0x20202020
0013 #define MCP_TYPE_ETHZ 0x4554485a
0014
0015 struct mcp_gen_header {
0016
0017 unsigned header_length;
0018 __be32 mcp_type;
0019 char version[128];
0020 unsigned mcp_private;
0021
0022
0023 unsigned sram_size;
0024 unsigned string_specs;
0025 unsigned string_specs_len;
0026
0027
0028
0029
0030
0031
0032
0033
0034
0035
0036
0037 unsigned char mcp_index;
0038 unsigned char disable_rabbit;
0039 unsigned char unaligned_tlp;
0040 unsigned char pcie_link_algo;
0041 unsigned counters_addr;
0042 unsigned copy_block_info;
0043 unsigned short handoff_id_major;
0044 unsigned short handoff_id_caps;
0045 unsigned msix_table_addr;
0046 unsigned bss_addr;
0047 unsigned features;
0048 unsigned ee_hdr_addr;
0049 unsigned led_pattern;
0050 unsigned led_pattern_dflt;
0051
0052 };
0053
0054 struct zmcp_info {
0055 unsigned info_len;
0056 unsigned zmcp_addr;
0057 unsigned zmcp_len;
0058 unsigned mcp_edata;
0059 };
0060
0061 #endif