core/sf/cmd.c

0001 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
0002 /* Copyright (c) 2020 Mellanox Technologies Ltd */
0003
0004 #include <linux/mlx5/driver.h>
0005 #include "priv.h"
0006
0007 int mlx5_cmd_alloc_sf(struct mlx5_core_dev *dev, u16 function_id)
0008 {
0009     u32 out[MLX5_ST_SZ_DW(alloc_sf_out)] = {};
0010     u32 in[MLX5_ST_SZ_DW(alloc_sf_in)] = {};
0011
0012     MLX5_SET(alloc_sf_in, in, opcode, MLX5_CMD_OP_ALLOC_SF);
0013     MLX5_SET(alloc_sf_in, in, function_id, function_id);
0014
0015     return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
0016 }
0017
0018 int mlx5_cmd_dealloc_sf(struct mlx5_core_dev *dev, u16 function_id)
0019 {
0020     u32 out[MLX5_ST_SZ_DW(dealloc_sf_out)] = {};
0021     u32 in[MLX5_ST_SZ_DW(dealloc_sf_in)] = {};
0022
0023     MLX5_SET(dealloc_sf_in, in, opcode, MLX5_CMD_OP_DEALLOC_SF);
0024     MLX5_SET(dealloc_sf_in, in, function_id, function_id);
0025
0026     return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
0027 }
0028
0029 int mlx5_cmd_sf_enable_hca(struct mlx5_core_dev *dev, u16 func_id)
0030 {
0031     u32 out[MLX5_ST_SZ_DW(enable_hca_out)] = {};
0032     u32 in[MLX5_ST_SZ_DW(enable_hca_in)] = {};
0033
0034     MLX5_SET(enable_hca_in, in, opcode, MLX5_CMD_OP_ENABLE_HCA);
0035     MLX5_SET(enable_hca_in, in, function_id, func_id);
0036     MLX5_SET(enable_hca_in, in, embedded_cpu_function, 0);
0037     return mlx5_cmd_exec(dev, &in, sizeof(in), &out, sizeof(out));
0038 }
0039
0040 int mlx5_cmd_sf_disable_hca(struct mlx5_core_dev *dev, u16 func_id)
0041 {
0042     u32 out[MLX5_ST_SZ_DW(disable_hca_out)] = {};
0043     u32 in[MLX5_ST_SZ_DW(disable_hca_in)] = {};
0044
0045     MLX5_SET(disable_hca_in, in, opcode, MLX5_CMD_OP_DISABLE_HCA);
0046     MLX5_SET(disable_hca_in, in, function_id, func_id);
0047     MLX5_SET(enable_hca_in, in, embedded_cpu_function, 0);
0048     return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
0049 }