core/lib/tout.h

0001 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
0002 /* Copyright (c) 2021, NVIDIA CORPORATION & AFFILIATES. All rights reserved. */
0003
0004 #ifndef MLX5_TIMEOUTS_H
0005 #define MLX5_TIMEOUTS_H
0006
0007 enum mlx5_timeouts_types {
0008     /* pre init timeouts (not read from FW) */
0009     MLX5_TO_FW_PRE_INIT_TIMEOUT_MS,
0010     MLX5_TO_FW_PRE_INIT_ON_RECOVERY_TIMEOUT_MS,
0011     MLX5_TO_FW_PRE_INIT_WARN_MESSAGE_INTERVAL_MS,
0012     MLX5_TO_FW_PRE_INIT_WAIT_MS,
0013
0014     /* init segment timeouts */
0015     MLX5_TO_FW_INIT_MS,
0016     MLX5_TO_CMD_MS,
0017
0018     /* DTOR timeouts */
0019     MLX5_TO_PCI_TOGGLE_MS,
0020     MLX5_TO_HEALTH_POLL_INTERVAL_MS,
0021     MLX5_TO_FULL_CRDUMP_MS,
0022     MLX5_TO_FW_RESET_MS,
0023     MLX5_TO_FLUSH_ON_ERROR_MS,
0024     MLX5_TO_PCI_SYNC_UPDATE_MS,
0025     MLX5_TO_TEARDOWN_MS,
0026     MLX5_TO_FSM_REACTIVATE_MS,
0027     MLX5_TO_RECLAIM_PAGES_MS,
0028     MLX5_TO_RECLAIM_VFS_PAGES_MS,
0029
0030     MAX_TIMEOUT_TYPES
0031 };
0032
0033 struct mlx5_core_dev;
0034 int mlx5_tout_init(struct mlx5_core_dev *dev);
0035 void mlx5_tout_cleanup(struct mlx5_core_dev *dev);
0036 void mlx5_tout_query_iseg(struct mlx5_core_dev *dev);
0037 int mlx5_tout_query_dtor(struct mlx5_core_dev *dev);
0038 u64 _mlx5_tout_ms(struct mlx5_core_dev *dev, enum mlx5_timeouts_types type);
0039
0040 #define mlx5_tout_ms(dev, type) _mlx5_tout_ms(dev, MLX5_TO_##type##_MS)
0041
0042 # endif /* MLX5_TIMEOUTS_H */