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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /* Marvell RVU Admin Function driver
0003  *
0004  * Copyright (C) 2022 Marvell.
0005  *
0006  */
0007 
0008 #ifndef __RVU_NPC_HASH_H
0009 #define __RVU_NPC_HASH_H
0010 
0011 #define RVU_NPC_HASH_SECRET_KEY0 0xa9d5af4c9fbc76b1
0012 #define RVU_NPC_HASH_SECRET_KEY1 0xa9d5af4c9fbc87b4
0013 #define RVU_NPC_HASH_SECRET_KEY2 0x5954c9e7
0014 
0015 #define NPC_MAX_HASH 2
0016 #define NPC_MAX_HASH_MASK 2
0017 
0018 #define KEX_LD_CFG_USE_HASH(use_hash, bytesm1, hdr_ofs, ena, flags_ena, key_ofs) \
0019                 ((use_hash) << 20 | ((bytesm1) << 16) | ((hdr_ofs) << 8) | \
0020                  ((ena) << 7) | ((flags_ena) << 6) | ((key_ofs) & 0x3F))
0021 #define KEX_LD_CFG_HASH(hdr_ofs, bytesm1, lt_en, lid_en, lid, ltype_match, ltype_mask)  \
0022             (((hdr_ofs) << 32) | ((bytesm1) << 16) | \
0023              ((lt_en) << 12) | ((lid_en) << 11) | ((lid) << 8) | \
0024              ((ltype_match) << 4) | ((ltype_mask) & 0xF))
0025 
0026 #define SET_KEX_LD_HASH(intf, ld, cfg) \
0027     rvu_write64(rvu, blkaddr,   \
0028             NPC_AF_INTFX_HASHX_CFG(intf, ld), cfg)
0029 
0030 #define SET_KEX_LD_HASH_MASK(intf, ld, mask_idx, cfg) \
0031     rvu_write64(rvu, blkaddr,   \
0032             NPC_AF_INTFX_HASHX_MASKX(intf, ld, mask_idx), cfg)
0033 
0034 #define SET_KEX_LD_HASH_CTRL(intf, ld, cfg) \
0035     rvu_write64(rvu, blkaddr,   \
0036             NPC_AF_INTFX_HASHX_RESULT_CTRL(intf, ld), cfg)
0037 
0038 struct npc_mcam_kex_hash {
0039     /* NPC_AF_INTF(0..1)_LID(0..7)_LT(0..15)_LD(0..1)_CFG */
0040     bool lid_lt_ld_hash_en[NPC_MAX_INTF][NPC_MAX_LID][NPC_MAX_LT][NPC_MAX_LD];
0041     /* NPC_AF_INTF(0..1)_HASH(0..1)_CFG */
0042     u64 hash[NPC_MAX_INTF][NPC_MAX_HASH];
0043     /* NPC_AF_INTF(0..1)_HASH(0..1)_MASK(0..1) */
0044     u64 hash_mask[NPC_MAX_INTF][NPC_MAX_HASH][NPC_MAX_HASH_MASK];
0045     /* NPC_AF_INTF(0..1)_HASH(0..1)_RESULT_CTRL */
0046     u64 hash_ctrl[NPC_MAX_INTF][NPC_MAX_HASH];
0047 } __packed;
0048 
0049 void npc_update_field_hash(struct rvu *rvu, u8 intf,
0050                struct mcam_entry *entry,
0051                int blkaddr,
0052                u64 features,
0053                struct flow_msg *pkt,
0054                struct flow_msg *mask,
0055                struct flow_msg *opkt,
0056                struct flow_msg *omask);
0057 void npc_config_secret_key(struct rvu *rvu, int blkaddr);
0058 void npc_program_mkex_hash(struct rvu *rvu, int blkaddr);
0059 u32 npc_field_hash_calc(u64 *ldata, struct npc_mcam_kex_hash *mkex_hash,
0060             u64 *secret_key, u8 intf, u8 hash_idx);
0061 
0062 static struct npc_mcam_kex_hash npc_mkex_hash_default __maybe_unused = {
0063     .lid_lt_ld_hash_en = {
0064     [NIX_INTF_RX] = {
0065         [NPC_LID_LC] = {
0066             [NPC_LT_LC_IP6] = {
0067                 true,
0068                 true,
0069             },
0070         },
0071     },
0072 
0073     [NIX_INTF_TX] = {
0074         [NPC_LID_LC] = {
0075             [NPC_LT_LC_IP6] = {
0076                 true,
0077                 true,
0078             },
0079         },
0080     },
0081     },
0082 
0083     .hash = {
0084     [NIX_INTF_RX] = {
0085         KEX_LD_CFG_HASH(0x8ULL, 0xf, 0x1, 0x1, NPC_LID_LC, NPC_LT_LC_IP6, 0xf),
0086         KEX_LD_CFG_HASH(0x18ULL, 0xf, 0x1, 0x1, NPC_LID_LC, NPC_LT_LC_IP6, 0xf),
0087     },
0088 
0089     [NIX_INTF_TX] = {
0090         KEX_LD_CFG_HASH(0x8ULL, 0xf, 0x1, 0x1, NPC_LID_LC, NPC_LT_LC_IP6, 0xf),
0091         KEX_LD_CFG_HASH(0x18ULL, 0xf, 0x1, 0x1, NPC_LID_LC, NPC_LT_LC_IP6, 0xf),
0092     },
0093     },
0094 
0095     .hash_mask = {
0096     [NIX_INTF_RX] = {
0097         [0] = {
0098             GENMASK_ULL(63, 0),
0099             GENMASK_ULL(63, 0),
0100         },
0101         [1] = {
0102             GENMASK_ULL(63, 0),
0103             GENMASK_ULL(63, 0),
0104         },
0105     },
0106 
0107     [NIX_INTF_TX] = {
0108         [0] = {
0109             GENMASK_ULL(63, 0),
0110             GENMASK_ULL(63, 0),
0111         },
0112         [1] = {
0113             GENMASK_ULL(63, 0),
0114             GENMASK_ULL(63, 0),
0115         },
0116     },
0117     },
0118 
0119     .hash_ctrl = {
0120     [NIX_INTF_RX] = {
0121         [0] = GENMASK_ULL(63, 32), /* MSB 32 bit is mask and LSB 32 bit is offset. */
0122         [1] = GENMASK_ULL(63, 32), /* MSB 32 bit is mask and LSB 32 bit is offset. */
0123     },
0124 
0125     [NIX_INTF_TX] = {
0126         [0] = GENMASK_ULL(63, 32), /* MSB 32 bit is mask and LSB 32 bit is offset. */
0127         [1] = GENMASK_ULL(63, 32), /* MSB 32 bit is mask and LSB 32 bit is offset. */
0128     },
0129     },
0130 };
0131 
0132 /* If exact match table support is enabled, enable drop rules */
0133 #define NPC_MCAM_DROP_RULE_MAX 30
0134 #define NPC_MCAM_SDP_DROP_RULE_IDX 0
0135 
0136 #define RVU_PFFUNC(pf, func)    \
0137     ((((pf) & RVU_PFVF_PF_MASK) << RVU_PFVF_PF_SHIFT) | \
0138     (((func) & RVU_PFVF_FUNC_MASK) << RVU_PFVF_FUNC_SHIFT))
0139 
0140 enum npc_exact_opc_type {
0141     NPC_EXACT_OPC_MEM,
0142     NPC_EXACT_OPC_CAM,
0143 };
0144 
0145 struct npc_exact_table_entry {
0146     struct list_head list;
0147     struct list_head glist;
0148     u32 seq_id; /* Sequence number of entry */
0149     u32 index;  /* Mem table or cam table index */
0150     u32 mcam_idx;
0151         /* Mcam index. This is valid only if "cmd" field is false */
0152     enum npc_exact_opc_type opc_type;
0153     u16 chan;
0154     u16 pcifunc;
0155     u8 ways;
0156     u8 mac[ETH_ALEN];
0157     u8 ctype;
0158     u8 cgx_id;
0159     u8 lmac_id;
0160     bool cmd;   /* Is added by ethtool command ? */
0161 };
0162 
0163 struct npc_exact_table {
0164     struct mutex lock;  /* entries update lock */
0165     unsigned long *id_bmap;
0166     int num_drop_rules;
0167     u32 tot_ids;
0168     u16 cnt_cmd_rules[NPC_MCAM_DROP_RULE_MAX];
0169     u16 counter_idx[NPC_MCAM_DROP_RULE_MAX];
0170     bool promisc_mode[NPC_MCAM_DROP_RULE_MAX];
0171     struct {
0172         int ways;
0173         int depth;
0174         unsigned long *bmap;
0175         u64 mask;   // Masks before hash calculation.
0176         u16 hash_mask;  // 11 bits for hash mask
0177         u16 hash_offset; // 11 bits offset
0178     } mem_table;
0179 
0180     struct {
0181         int depth;
0182         unsigned long *bmap;
0183     } cam_table;
0184 
0185     struct {
0186         bool valid;
0187         u16 chan_val;
0188         u16 chan_mask;
0189         u16 pcifunc;
0190         u8 drop_rule_idx;
0191     } drop_rule_map[NPC_MCAM_DROP_RULE_MAX];
0192 
0193 #define NPC_EXACT_TBL_MAX_WAYS 4
0194 
0195     struct list_head lhead_mem_tbl_entry[NPC_EXACT_TBL_MAX_WAYS];
0196     int mem_tbl_entry_cnt;
0197 
0198     struct list_head lhead_cam_tbl_entry;
0199     int cam_tbl_entry_cnt;
0200 
0201     struct list_head lhead_gbl;
0202 };
0203 
0204 bool rvu_npc_exact_has_match_table(struct rvu *rvu);
0205 u32 rvu_npc_exact_get_max_entries(struct rvu *rvu);
0206 int rvu_npc_exact_init(struct rvu *rvu);
0207 int rvu_npc_exact_mac_addr_reset(struct rvu *rvu, struct cgx_mac_addr_reset_req *req,
0208                  struct msg_rsp *rsp);
0209 
0210 int rvu_npc_exact_mac_addr_update(struct rvu *rvu,
0211                   struct cgx_mac_addr_update_req *req,
0212                   struct cgx_mac_addr_update_rsp *rsp);
0213 
0214 int rvu_npc_exact_mac_addr_add(struct rvu *rvu,
0215                    struct cgx_mac_addr_add_req *req,
0216                    struct cgx_mac_addr_add_rsp *rsp);
0217 
0218 int rvu_npc_exact_mac_addr_del(struct rvu *rvu,
0219                    struct cgx_mac_addr_del_req *req,
0220                    struct msg_rsp *rsp);
0221 
0222 int rvu_npc_exact_mac_addr_set(struct rvu *rvu, struct cgx_mac_addr_set_or_get *req,
0223                    struct cgx_mac_addr_set_or_get *rsp);
0224 
0225 void rvu_npc_exact_reset(struct rvu *rvu, u16 pcifunc);
0226 
0227 bool rvu_npc_exact_can_disable_feature(struct rvu *rvu);
0228 void rvu_npc_exact_disable_feature(struct rvu *rvu);
0229 void rvu_npc_exact_reset(struct rvu *rvu, u16 pcifunc);
0230 u16 rvu_npc_exact_drop_rule_to_pcifunc(struct rvu *rvu, u32 drop_rule_idx);
0231 int rvu_npc_exact_promisc_disable(struct rvu *rvu, u16 pcifunc);
0232 int rvu_npc_exact_promisc_enable(struct rvu *rvu, u16 pcifunc);
0233 #endif /* RVU_NPC_HASH_H */