intel/ixgbevf/vf.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /* Copyright(c) 1999 - 2018 Intel Corporation. */
0003
0004 #ifndef __IXGBE_VF_H__
0005 #define __IXGBE_VF_H__
0006
0007 #include <linux/pci.h>
0008 #include <linux/delay.h>
0009 #include <linux/interrupt.h>
0010 #include <linux/if_ether.h>
0011 #include <linux/netdevice.h>
0012
0013 #include "defines.h"
0014 #include "regs.h"
0015 #include "mbx.h"
0016
0017 struct ixgbe_hw;
0018
0019 struct ixgbe_mac_operations {
0020     s32 (*init_hw)(struct ixgbe_hw *);
0021     s32 (*reset_hw)(struct ixgbe_hw *);
0022     s32 (*start_hw)(struct ixgbe_hw *);
0023     s32 (*clear_hw_cntrs)(struct ixgbe_hw *);
0024     enum ixgbe_media_type (*get_media_type)(struct ixgbe_hw *);
0025     s32 (*get_mac_addr)(struct ixgbe_hw *, u8 *);
0026     s32 (*stop_adapter)(struct ixgbe_hw *);
0027     s32 (*get_bus_info)(struct ixgbe_hw *);
0028     s32 (*negotiate_api_version)(struct ixgbe_hw *hw, int api);
0029
0030     /* Link */
0031     s32 (*setup_link)(struct ixgbe_hw *, ixgbe_link_speed, bool, bool);
0032     s32 (*check_link)(struct ixgbe_hw *, ixgbe_link_speed *, bool *, bool);
0033     s32 (*get_link_capabilities)(struct ixgbe_hw *, ixgbe_link_speed *,
0034                      bool *);
0035
0036     /* RAR, Multicast, VLAN */
0037     s32 (*set_rar)(struct ixgbe_hw *, u32, u8 *, u32);
0038     s32 (*set_uc_addr)(struct ixgbe_hw *, u32, u8 *);
0039     s32 (*init_rx_addrs)(struct ixgbe_hw *);
0040     s32 (*update_mc_addr_list)(struct ixgbe_hw *, struct net_device *);
0041     s32 (*update_xcast_mode)(struct ixgbe_hw *, int);
0042     s32 (*get_link_state)(struct ixgbe_hw *hw, bool *link_state);
0043     s32 (*enable_mc)(struct ixgbe_hw *);
0044     s32 (*disable_mc)(struct ixgbe_hw *);
0045     s32 (*clear_vfta)(struct ixgbe_hw *);
0046     s32 (*set_vfta)(struct ixgbe_hw *, u32, u32, bool);
0047     s32 (*set_rlpml)(struct ixgbe_hw *, u16);
0048 };
0049
0050 enum ixgbe_mac_type {
0051     ixgbe_mac_unknown = 0,
0052     ixgbe_mac_82599_vf,
0053     ixgbe_mac_X540_vf,
0054     ixgbe_mac_X550_vf,
0055     ixgbe_mac_X550EM_x_vf,
0056     ixgbe_mac_x550em_a_vf,
0057     ixgbe_num_macs
0058 };
0059
0060 struct ixgbe_mac_info {
0061     struct ixgbe_mac_operations ops;
0062     u8 addr[6];
0063     u8 perm_addr[6];
0064
0065     enum ixgbe_mac_type type;
0066
0067     s32  mc_filter_type;
0068
0069     bool get_link_status;
0070     u32  max_tx_queues;
0071     u32  max_rx_queues;
0072     u32  max_msix_vectors;
0073 };
0074
0075 struct ixgbe_mbx_operations {
0076     s32 (*init_params)(struct ixgbe_hw *hw);
0077     void (*release)(struct ixgbe_hw *hw);
0078     s32 (*read)(struct ixgbe_hw *, u32 *, u16);
0079     s32 (*write)(struct ixgbe_hw *, u32 *, u16);
0080     s32 (*check_for_msg)(struct ixgbe_hw *);
0081     s32 (*check_for_ack)(struct ixgbe_hw *);
0082     s32 (*check_for_rst)(struct ixgbe_hw *);
0083 };
0084
0085 struct ixgbe_mbx_stats {
0086     u32 msgs_tx;
0087     u32 msgs_rx;
0088
0089     u32 acks;
0090     u32 reqs;
0091     u32 rsts;
0092 };
0093
0094 struct ixgbe_mbx_info {
0095     struct ixgbe_mbx_operations ops;
0096     struct ixgbe_mbx_stats stats;
0097     u32 timeout;
0098     u32 udelay;
0099     u32 vf_mailbox;
0100     u16 size;
0101 };
0102
0103 struct ixgbe_hw {
0104     void *back;
0105
0106     u8 __iomem *hw_addr;
0107
0108     struct ixgbe_mac_info mac;
0109     struct ixgbe_mbx_info mbx;
0110
0111     u16 device_id;
0112     u16 subsystem_vendor_id;
0113     u16 subsystem_device_id;
0114     u16 vendor_id;
0115
0116     u8  revision_id;
0117     bool adapter_stopped;
0118
0119     int api_version;
0120 };
0121
0122 struct ixgbevf_hw_stats {
0123     u64 base_vfgprc;
0124     u64 base_vfgptc;
0125     u64 base_vfgorc;
0126     u64 base_vfgotc;
0127     u64 base_vfmprc;
0128
0129     u64 last_vfgprc;
0130     u64 last_vfgptc;
0131     u64 last_vfgorc;
0132     u64 last_vfgotc;
0133     u64 last_vfmprc;
0134
0135     u64 vfgprc;
0136     u64 vfgptc;
0137     u64 vfgorc;
0138     u64 vfgotc;
0139     u64 vfmprc;
0140
0141     u64 saved_reset_vfgprc;
0142     u64 saved_reset_vfgptc;
0143     u64 saved_reset_vfgorc;
0144     u64 saved_reset_vfgotc;
0145     u64 saved_reset_vfmprc;
0146 };
0147
0148 struct ixgbevf_info {
0149     enum ixgbe_mac_type mac;
0150     const struct ixgbe_mac_operations *mac_ops;
0151 };
0152
0153 #define IXGBE_FAILED_READ_REG 0xffffffffU
0154
0155 #define IXGBE_REMOVED(a) unlikely(!(a))
0156
0157 static inline void ixgbe_write_reg(struct ixgbe_hw *hw, u32 reg, u32 value)
0158 {
0159     u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr);
0160
0161     if (IXGBE_REMOVED(reg_addr))
0162         return;
0163     writel(value, reg_addr + reg);
0164 }
0165
0166 #define IXGBE_WRITE_REG(h, r, v) ixgbe_write_reg(h, r, v)
0167
0168 u32 ixgbevf_read_reg(struct ixgbe_hw *hw, u32 reg);
0169 #define IXGBE_READ_REG(h, r) ixgbevf_read_reg(h, r)
0170
0171 static inline void ixgbe_write_reg_array(struct ixgbe_hw *hw, u32 reg,
0172                      u32 offset, u32 value)
0173 {
0174     ixgbe_write_reg(hw, reg + (offset << 2), value);
0175 }
0176
0177 #define IXGBE_WRITE_REG_ARRAY(h, r, o, v) ixgbe_write_reg_array(h, r, o, v)
0178
0179 static inline u32 ixgbe_read_reg_array(struct ixgbe_hw *hw, u32 reg,
0180                        u32 offset)
0181 {
0182     return ixgbevf_read_reg(hw, reg + (offset << 2));
0183 }
0184
0185 #define IXGBE_READ_REG_ARRAY(h, r, o) ixgbe_read_reg_array(h, r, o)
0186
0187 int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs,
0188                unsigned int *default_tc);
0189 int ixgbevf_get_reta_locked(struct ixgbe_hw *hw, u32 *reta, int num_rx_queues);
0190 int ixgbevf_get_rss_key_locked(struct ixgbe_hw *hw, u8 *rss_key);
0191 #endif /* __IXGBE_VF_H__ */