intel/ixgbe/ixgbe_ethtool.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /* Copyright(c) 1999 - 2018 Intel Corporation. */
0003
0004 /* ethtool support for ixgbe */
0005
0006 #include <linux/interrupt.h>
0007 #include <linux/types.h>
0008 #include <linux/module.h>
0009 #include <linux/slab.h>
0010 #include <linux/pci.h>
0011 #include <linux/netdevice.h>
0012 #include <linux/ethtool.h>
0013 #include <linux/vmalloc.h>
0014 #include <linux/highmem.h>
0015 #include <linux/uaccess.h>
0016
0017 #include "ixgbe.h"
0018 #include "ixgbe_phy.h"
0019
0020
0021 enum {NETDEV_STATS, IXGBE_STATS};
0022
0023 struct ixgbe_stats {
0024     char stat_string[ETH_GSTRING_LEN];
0025     int type;
0026     int sizeof_stat;
0027     int stat_offset;
0028 };
0029
0030 #define IXGBE_STAT(m)       IXGBE_STATS, \
0031                 sizeof(((struct ixgbe_adapter *)0)->m), \
0032                 offsetof(struct ixgbe_adapter, m)
0033 #define IXGBE_NETDEV_STAT(m)    NETDEV_STATS, \
0034                 sizeof(((struct rtnl_link_stats64 *)0)->m), \
0035                 offsetof(struct rtnl_link_stats64, m)
0036
0037 static const struct ixgbe_stats ixgbe_gstrings_stats[] = {
0038     {"rx_packets", IXGBE_NETDEV_STAT(rx_packets)},
0039     {"tx_packets", IXGBE_NETDEV_STAT(tx_packets)},
0040     {"rx_bytes", IXGBE_NETDEV_STAT(rx_bytes)},
0041     {"tx_bytes", IXGBE_NETDEV_STAT(tx_bytes)},
0042     {"rx_pkts_nic", IXGBE_STAT(stats.gprc)},
0043     {"tx_pkts_nic", IXGBE_STAT(stats.gptc)},
0044     {"rx_bytes_nic", IXGBE_STAT(stats.gorc)},
0045     {"tx_bytes_nic", IXGBE_STAT(stats.gotc)},
0046     {"lsc_int", IXGBE_STAT(lsc_int)},
0047     {"tx_busy", IXGBE_STAT(tx_busy)},
0048     {"non_eop_descs", IXGBE_STAT(non_eop_descs)},
0049     {"rx_errors", IXGBE_NETDEV_STAT(rx_errors)},
0050     {"tx_errors", IXGBE_NETDEV_STAT(tx_errors)},
0051     {"rx_dropped", IXGBE_NETDEV_STAT(rx_dropped)},
0052     {"tx_dropped", IXGBE_NETDEV_STAT(tx_dropped)},
0053     {"multicast", IXGBE_NETDEV_STAT(multicast)},
0054     {"broadcast", IXGBE_STAT(stats.bprc)},
0055     {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) },
0056     {"collisions", IXGBE_NETDEV_STAT(collisions)},
0057     {"rx_over_errors", IXGBE_NETDEV_STAT(rx_over_errors)},
0058     {"rx_crc_errors", IXGBE_NETDEV_STAT(rx_crc_errors)},
0059     {"rx_frame_errors", IXGBE_NETDEV_STAT(rx_frame_errors)},
0060     {"hw_rsc_aggregated", IXGBE_STAT(rsc_total_count)},
0061     {"hw_rsc_flushed", IXGBE_STAT(rsc_total_flush)},
0062     {"fdir_match", IXGBE_STAT(stats.fdirmatch)},
0063     {"fdir_miss", IXGBE_STAT(stats.fdirmiss)},
0064     {"fdir_overflow", IXGBE_STAT(fdir_overflow)},
0065     {"rx_fifo_errors", IXGBE_NETDEV_STAT(rx_fifo_errors)},
0066     {"rx_missed_errors", IXGBE_NETDEV_STAT(rx_missed_errors)},
0067     {"tx_aborted_errors", IXGBE_NETDEV_STAT(tx_aborted_errors)},
0068     {"tx_carrier_errors", IXGBE_NETDEV_STAT(tx_carrier_errors)},
0069     {"tx_fifo_errors", IXGBE_NETDEV_STAT(tx_fifo_errors)},
0070     {"tx_heartbeat_errors", IXGBE_NETDEV_STAT(tx_heartbeat_errors)},
0071     {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)},
0072     {"tx_restart_queue", IXGBE_STAT(restart_queue)},
0073     {"rx_length_errors", IXGBE_STAT(stats.rlec)},
0074     {"rx_long_length_errors", IXGBE_STAT(stats.roc)},
0075     {"rx_short_length_errors", IXGBE_STAT(stats.ruc)},
0076     {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)},
0077     {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)},
0078     {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)},
0079     {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)},
0080     {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)},
0081     {"alloc_rx_page", IXGBE_STAT(alloc_rx_page)},
0082     {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
0083     {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
0084     {"rx_no_dma_resources", IXGBE_STAT(hw_rx_no_dma_resources)},
0085     {"os2bmc_rx_by_bmc", IXGBE_STAT(stats.o2bgptc)},
0086     {"os2bmc_tx_by_bmc", IXGBE_STAT(stats.b2ospc)},
0087     {"os2bmc_tx_by_host", IXGBE_STAT(stats.o2bspc)},
0088     {"os2bmc_rx_by_host", IXGBE_STAT(stats.b2ogprc)},
0089     {"tx_hwtstamp_timeouts", IXGBE_STAT(tx_hwtstamp_timeouts)},
0090     {"tx_hwtstamp_skipped", IXGBE_STAT(tx_hwtstamp_skipped)},
0091     {"rx_hwtstamp_cleared", IXGBE_STAT(rx_hwtstamp_cleared)},
0092     {"tx_ipsec", IXGBE_STAT(tx_ipsec)},
0093     {"rx_ipsec", IXGBE_STAT(rx_ipsec)},
0094 #ifdef IXGBE_FCOE
0095     {"fcoe_bad_fccrc", IXGBE_STAT(stats.fccrc)},
0096     {"rx_fcoe_dropped", IXGBE_STAT(stats.fcoerpdc)},
0097     {"rx_fcoe_packets", IXGBE_STAT(stats.fcoeprc)},
0098     {"rx_fcoe_dwords", IXGBE_STAT(stats.fcoedwrc)},
0099     {"fcoe_noddp", IXGBE_STAT(stats.fcoe_noddp)},
0100     {"fcoe_noddp_ext_buff", IXGBE_STAT(stats.fcoe_noddp_ext_buff)},
0101     {"tx_fcoe_packets", IXGBE_STAT(stats.fcoeptc)},
0102     {"tx_fcoe_dwords", IXGBE_STAT(stats.fcoedwtc)},
0103 #endif /* IXGBE_FCOE */
0104 };
0105
0106 /* ixgbe allocates num_tx_queues and num_rx_queues symmetrically so
0107  * we set the num_rx_queues to evaluate to num_tx_queues. This is
0108  * used because we do not have a good way to get the max number of
0109  * rx queues with CONFIG_RPS disabled.
0110  */
0111 #define IXGBE_NUM_RX_QUEUES netdev->num_tx_queues
0112
0113 #define IXGBE_QUEUE_STATS_LEN ( \
0114     (netdev->num_tx_queues + IXGBE_NUM_RX_QUEUES) * \
0115     (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
0116 #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
0117 #define IXGBE_PB_STATS_LEN ( \
0118             (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \
0119              sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \
0120              sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \
0121              sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
0122             / sizeof(u64))
0123 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \
0124              IXGBE_PB_STATS_LEN + \
0125              IXGBE_QUEUE_STATS_LEN)
0126
0127 static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = {
0128     "Register test  (offline)", "Eeprom test    (offline)",
0129     "Interrupt test (offline)", "Loopback test  (offline)",
0130     "Link test   (on/offline)"
0131 };
0132 #define IXGBE_TEST_LEN sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN
0133
0134 static const char ixgbe_priv_flags_strings[][ETH_GSTRING_LEN] = {
0135 #define IXGBE_PRIV_FLAGS_LEGACY_RX  BIT(0)
0136     "legacy-rx",
0137 #define IXGBE_PRIV_FLAGS_VF_IPSEC_EN    BIT(1)
0138     "vf-ipsec",
0139 #define IXGBE_PRIV_FLAGS_AUTO_DISABLE_VF    BIT(2)
0140     "mdd-disable-vf",
0141 };
0142
0143 #define IXGBE_PRIV_FLAGS_STR_LEN ARRAY_SIZE(ixgbe_priv_flags_strings)
0144
0145 #define ixgbe_isbackplane(type) ((type) == ixgbe_media_type_backplane)
0146
0147 static void ixgbe_set_supported_10gtypes(struct ixgbe_hw *hw,
0148                      struct ethtool_link_ksettings *cmd)
0149 {
0150     if (!ixgbe_isbackplane(hw->phy.media_type)) {
0151         ethtool_link_ksettings_add_link_mode(cmd, supported,
0152                              10000baseT_Full);
0153         return;
0154     }
0155
0156     switch (hw->device_id) {
0157     case IXGBE_DEV_ID_82598:
0158     case IXGBE_DEV_ID_82599_KX4:
0159     case IXGBE_DEV_ID_82599_KX4_MEZZ:
0160     case IXGBE_DEV_ID_X550EM_X_KX4:
0161         ethtool_link_ksettings_add_link_mode
0162             (cmd, supported, 10000baseKX4_Full);
0163         break;
0164     case IXGBE_DEV_ID_82598_BX:
0165     case IXGBE_DEV_ID_82599_KR:
0166     case IXGBE_DEV_ID_X550EM_X_KR:
0167     case IXGBE_DEV_ID_X550EM_X_XFI:
0168         ethtool_link_ksettings_add_link_mode
0169             (cmd, supported, 10000baseKR_Full);
0170         break;
0171     default:
0172         ethtool_link_ksettings_add_link_mode
0173             (cmd, supported, 10000baseKX4_Full);
0174         ethtool_link_ksettings_add_link_mode
0175             (cmd, supported, 10000baseKR_Full);
0176         break;
0177     }
0178 }
0179
0180 static void ixgbe_set_advertising_10gtypes(struct ixgbe_hw *hw,
0181                        struct ethtool_link_ksettings *cmd)
0182 {
0183     if (!ixgbe_isbackplane(hw->phy.media_type)) {
0184         ethtool_link_ksettings_add_link_mode(cmd, advertising,
0185                              10000baseT_Full);
0186         return;
0187     }
0188
0189     switch (hw->device_id) {
0190     case IXGBE_DEV_ID_82598:
0191     case IXGBE_DEV_ID_82599_KX4:
0192     case IXGBE_DEV_ID_82599_KX4_MEZZ:
0193     case IXGBE_DEV_ID_X550EM_X_KX4:
0194         ethtool_link_ksettings_add_link_mode
0195             (cmd, advertising, 10000baseKX4_Full);
0196         break;
0197     case IXGBE_DEV_ID_82598_BX:
0198     case IXGBE_DEV_ID_82599_KR:
0199     case IXGBE_DEV_ID_X550EM_X_KR:
0200     case IXGBE_DEV_ID_X550EM_X_XFI:
0201         ethtool_link_ksettings_add_link_mode
0202             (cmd, advertising, 10000baseKR_Full);
0203         break;
0204     default:
0205         ethtool_link_ksettings_add_link_mode
0206             (cmd, advertising, 10000baseKX4_Full);
0207         ethtool_link_ksettings_add_link_mode
0208             (cmd, advertising, 10000baseKR_Full);
0209         break;
0210     }
0211 }
0212
0213 static int ixgbe_get_link_ksettings(struct net_device *netdev,
0214                     struct ethtool_link_ksettings *cmd)
0215 {
0216     struct ixgbe_adapter *adapter = netdev_priv(netdev);
0217     struct ixgbe_hw *hw = &adapter->hw;
0218     ixgbe_link_speed supported_link;
0219     bool autoneg = false;
0220
0221     ethtool_link_ksettings_zero_link_mode(cmd, supported);
0222     ethtool_link_ksettings_zero_link_mode(cmd, advertising);
0223
0224     hw->mac.ops.get_link_capabilities(hw, &supported_link, &autoneg);
0225
0226     /* set the supported link speeds */
0227     if (supported_link & IXGBE_LINK_SPEED_10GB_FULL) {
0228         ixgbe_set_supported_10gtypes(hw, cmd);
0229         ixgbe_set_advertising_10gtypes(hw, cmd);
0230     }
0231     if (supported_link & IXGBE_LINK_SPEED_5GB_FULL)
0232         ethtool_link_ksettings_add_link_mode(cmd, supported,
0233                              5000baseT_Full);
0234
0235     if (supported_link & IXGBE_LINK_SPEED_2_5GB_FULL)
0236         ethtool_link_ksettings_add_link_mode(cmd, supported,
0237                              2500baseT_Full);
0238
0239     if (supported_link & IXGBE_LINK_SPEED_1GB_FULL) {
0240         if (ixgbe_isbackplane(hw->phy.media_type)) {
0241             ethtool_link_ksettings_add_link_mode(cmd, supported,
0242                                  1000baseKX_Full);
0243             ethtool_link_ksettings_add_link_mode(cmd, advertising,
0244                                  1000baseKX_Full);
0245         } else {
0246             ethtool_link_ksettings_add_link_mode(cmd, supported,
0247                                  1000baseT_Full);
0248             ethtool_link_ksettings_add_link_mode(cmd, advertising,
0249                                  1000baseT_Full);
0250         }
0251     }
0252     if (supported_link & IXGBE_LINK_SPEED_100_FULL) {
0253         ethtool_link_ksettings_add_link_mode(cmd, supported,
0254                              100baseT_Full);
0255         ethtool_link_ksettings_add_link_mode(cmd, advertising,
0256                              100baseT_Full);
0257     }
0258     if (supported_link & IXGBE_LINK_SPEED_10_FULL) {
0259         ethtool_link_ksettings_add_link_mode(cmd, supported,
0260                              10baseT_Full);
0261         ethtool_link_ksettings_add_link_mode(cmd, advertising,
0262                              10baseT_Full);
0263     }
0264
0265     /* set the advertised speeds */
0266     if (hw->phy.autoneg_advertised) {
0267         ethtool_link_ksettings_zero_link_mode(cmd, advertising);
0268         if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10_FULL)
0269             ethtool_link_ksettings_add_link_mode(cmd, advertising,
0270                                  10baseT_Full);
0271         if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL)
0272             ethtool_link_ksettings_add_link_mode(cmd, advertising,
0273                                  100baseT_Full);
0274         if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL)
0275             ixgbe_set_advertising_10gtypes(hw, cmd);
0276         if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL) {
0277             if (ethtool_link_ksettings_test_link_mode
0278                 (cmd, supported, 1000baseKX_Full))
0279                 ethtool_link_ksettings_add_link_mode
0280                     (cmd, advertising, 1000baseKX_Full);
0281             else
0282                 ethtool_link_ksettings_add_link_mode
0283                     (cmd, advertising, 1000baseT_Full);
0284         }
0285         if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_5GB_FULL)
0286             ethtool_link_ksettings_add_link_mode(cmd, advertising,
0287                                  5000baseT_Full);
0288         if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_2_5GB_FULL)
0289             ethtool_link_ksettings_add_link_mode(cmd, advertising,
0290                                  2500baseT_Full);
0291     } else {
0292         if (hw->phy.multispeed_fiber && !autoneg) {
0293             if (supported_link & IXGBE_LINK_SPEED_10GB_FULL)
0294                 ethtool_link_ksettings_add_link_mode
0295                     (cmd, advertising, 10000baseT_Full);
0296         }
0297     }
0298
0299     if (autoneg) {
0300         ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
0301         ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
0302         cmd->base.autoneg = AUTONEG_ENABLE;
0303     } else
0304         cmd->base.autoneg = AUTONEG_DISABLE;
0305
0306     /* Determine the remaining settings based on the PHY type. */
0307     switch (adapter->hw.phy.type) {
0308     case ixgbe_phy_tn:
0309     case ixgbe_phy_aq:
0310     case ixgbe_phy_x550em_ext_t:
0311     case ixgbe_phy_fw:
0312     case ixgbe_phy_cu_unknown:
0313         ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
0314         ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
0315         cmd->base.port = PORT_TP;
0316         break;
0317     case ixgbe_phy_qt:
0318         ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
0319         ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE);
0320         cmd->base.port = PORT_FIBRE;
0321         break;
0322     case ixgbe_phy_nl:
0323     case ixgbe_phy_sfp_passive_tyco:
0324     case ixgbe_phy_sfp_passive_unknown:
0325     case ixgbe_phy_sfp_ftl:
0326     case ixgbe_phy_sfp_avago:
0327     case ixgbe_phy_sfp_intel:
0328     case ixgbe_phy_sfp_unknown:
0329     case ixgbe_phy_qsfp_passive_unknown:
0330     case ixgbe_phy_qsfp_active_unknown:
0331     case ixgbe_phy_qsfp_intel:
0332     case ixgbe_phy_qsfp_unknown:
0333         /* SFP+ devices, further checking needed */
0334         switch (adapter->hw.phy.sfp_type) {
0335         case ixgbe_sfp_type_da_cu:
0336         case ixgbe_sfp_type_da_cu_core0:
0337         case ixgbe_sfp_type_da_cu_core1:
0338             ethtool_link_ksettings_add_link_mode(cmd, supported,
0339                                  FIBRE);
0340             ethtool_link_ksettings_add_link_mode(cmd, advertising,
0341                                  FIBRE);
0342             cmd->base.port = PORT_DA;
0343             break;
0344         case ixgbe_sfp_type_sr:
0345         case ixgbe_sfp_type_lr:
0346         case ixgbe_sfp_type_srlr_core0:
0347         case ixgbe_sfp_type_srlr_core1:
0348         case ixgbe_sfp_type_1g_sx_core0:
0349         case ixgbe_sfp_type_1g_sx_core1:
0350         case ixgbe_sfp_type_1g_lx_core0:
0351         case ixgbe_sfp_type_1g_lx_core1:
0352             ethtool_link_ksettings_add_link_mode(cmd, supported,
0353                                  FIBRE);
0354             ethtool_link_ksettings_add_link_mode(cmd, advertising,
0355                                  FIBRE);
0356             cmd->base.port = PORT_FIBRE;
0357             break;
0358         case ixgbe_sfp_type_not_present:
0359             ethtool_link_ksettings_add_link_mode(cmd, supported,
0360                                  FIBRE);
0361             ethtool_link_ksettings_add_link_mode(cmd, advertising,
0362                                  FIBRE);
0363             cmd->base.port = PORT_NONE;
0364             break;
0365         case ixgbe_sfp_type_1g_cu_core0:
0366         case ixgbe_sfp_type_1g_cu_core1:
0367             ethtool_link_ksettings_add_link_mode(cmd, supported,
0368                                  TP);
0369             ethtool_link_ksettings_add_link_mode(cmd, advertising,
0370                                  TP);
0371             cmd->base.port = PORT_TP;
0372             break;
0373         case ixgbe_sfp_type_unknown:
0374         default:
0375             ethtool_link_ksettings_add_link_mode(cmd, supported,
0376                                  FIBRE);
0377             ethtool_link_ksettings_add_link_mode(cmd, advertising,
0378                                  FIBRE);
0379             cmd->base.port = PORT_OTHER;
0380             break;
0381         }
0382         break;
0383     case ixgbe_phy_xaui:
0384         ethtool_link_ksettings_add_link_mode(cmd, supported,
0385                              FIBRE);
0386         ethtool_link_ksettings_add_link_mode(cmd, advertising,
0387                              FIBRE);
0388         cmd->base.port = PORT_NONE;
0389         break;
0390     case ixgbe_phy_unknown:
0391     case ixgbe_phy_generic:
0392     case ixgbe_phy_sfp_unsupported:
0393     default:
0394         ethtool_link_ksettings_add_link_mode(cmd, supported,
0395                              FIBRE);
0396         ethtool_link_ksettings_add_link_mode(cmd, advertising,
0397                              FIBRE);
0398         cmd->base.port = PORT_OTHER;
0399         break;
0400     }
0401
0402     /* Indicate pause support */
0403     ethtool_link_ksettings_add_link_mode(cmd, supported, Pause);
0404
0405     switch (hw->fc.requested_mode) {
0406     case ixgbe_fc_full:
0407         ethtool_link_ksettings_add_link_mode(cmd, advertising, Pause);
0408         break;
0409     case ixgbe_fc_rx_pause:
0410         ethtool_link_ksettings_add_link_mode(cmd, advertising, Pause);
0411         ethtool_link_ksettings_add_link_mode(cmd, advertising,
0412                              Asym_Pause);
0413         break;
0414     case ixgbe_fc_tx_pause:
0415         ethtool_link_ksettings_add_link_mode(cmd, advertising,
0416                              Asym_Pause);
0417         break;
0418     default:
0419         ethtool_link_ksettings_del_link_mode(cmd, advertising, Pause);
0420         ethtool_link_ksettings_del_link_mode(cmd, advertising,
0421                              Asym_Pause);
0422     }
0423
0424     if (netif_carrier_ok(netdev)) {
0425         switch (adapter->link_speed) {
0426         case IXGBE_LINK_SPEED_10GB_FULL:
0427             cmd->base.speed = SPEED_10000;
0428             break;
0429         case IXGBE_LINK_SPEED_5GB_FULL:
0430             cmd->base.speed = SPEED_5000;
0431             break;
0432         case IXGBE_LINK_SPEED_2_5GB_FULL:
0433             cmd->base.speed = SPEED_2500;
0434             break;
0435         case IXGBE_LINK_SPEED_1GB_FULL:
0436             cmd->base.speed = SPEED_1000;
0437             break;
0438         case IXGBE_LINK_SPEED_100_FULL:
0439             cmd->base.speed = SPEED_100;
0440             break;
0441         case IXGBE_LINK_SPEED_10_FULL:
0442             cmd->base.speed = SPEED_10;
0443             break;
0444         default:
0445             break;
0446         }
0447         cmd->base.duplex = DUPLEX_FULL;
0448     } else {
0449         cmd->base.speed = SPEED_UNKNOWN;
0450         cmd->base.duplex = DUPLEX_UNKNOWN;
0451     }
0452
0453     return 0;
0454 }
0455
0456 static int ixgbe_set_link_ksettings(struct net_device *netdev,
0457                     const struct ethtool_link_ksettings *cmd)
0458 {
0459     struct ixgbe_adapter *adapter = netdev_priv(netdev);
0460     struct ixgbe_hw *hw = &adapter->hw;
0461     u32 advertised, old;
0462     s32 err = 0;
0463
0464     if ((hw->phy.media_type == ixgbe_media_type_copper) ||
0465         (hw->phy.multispeed_fiber)) {
0466         /*
0467          * this function does not support duplex forcing, but can
0468          * limit the advertising of the adapter to the specified speed
0469          */
0470         if (!linkmode_subset(cmd->link_modes.advertising,
0471                      cmd->link_modes.supported))
0472             return -EINVAL;
0473
0474         /* only allow one speed at a time if no autoneg */
0475         if (!cmd->base.autoneg && hw->phy.multispeed_fiber) {
0476             if (ethtool_link_ksettings_test_link_mode(cmd, advertising,
0477                                   10000baseT_Full) &&
0478                 ethtool_link_ksettings_test_link_mode(cmd, advertising,
0479                                   1000baseT_Full))
0480                 return -EINVAL;
0481         }
0482
0483         old = hw->phy.autoneg_advertised;
0484         advertised = 0;
0485         if (ethtool_link_ksettings_test_link_mode(cmd, advertising,
0486                               10000baseT_Full))
0487             advertised |= IXGBE_LINK_SPEED_10GB_FULL;
0488         if (ethtool_link_ksettings_test_link_mode(cmd, advertising,
0489                               5000baseT_Full))
0490             advertised |= IXGBE_LINK_SPEED_5GB_FULL;
0491         if (ethtool_link_ksettings_test_link_mode(cmd, advertising,
0492                               2500baseT_Full))
0493             advertised |= IXGBE_LINK_SPEED_2_5GB_FULL;
0494         if (ethtool_link_ksettings_test_link_mode(cmd, advertising,
0495                               1000baseT_Full))
0496             advertised |= IXGBE_LINK_SPEED_1GB_FULL;
0497
0498         if (ethtool_link_ksettings_test_link_mode(cmd, advertising,
0499                               100baseT_Full))
0500             advertised |= IXGBE_LINK_SPEED_100_FULL;
0501
0502         if (ethtool_link_ksettings_test_link_mode(cmd, advertising,
0503                               10baseT_Full))
0504             advertised |= IXGBE_LINK_SPEED_10_FULL;
0505
0506         if (old == advertised)
0507             return err;
0508         /* this sets the link speed and restarts auto-neg */
0509         while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
0510             usleep_range(1000, 2000);
0511
0512         hw->mac.autotry_restart = true;
0513         err = hw->mac.ops.setup_link(hw, advertised, true);
0514         if (err) {
0515             e_info(probe, "setup link failed with code %d\n", err);
0516             hw->mac.ops.setup_link(hw, old, true);
0517         }
0518         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
0519     } else {
0520         /* in this case we currently only support 10Gb/FULL */
0521         u32 speed = cmd->base.speed;
0522
0523         if ((cmd->base.autoneg == AUTONEG_ENABLE) ||
0524             (!ethtool_link_ksettings_test_link_mode(cmd, advertising,
0525                                 10000baseT_Full)) ||
0526             (speed + cmd->base.duplex != SPEED_10000 + DUPLEX_FULL))
0527             return -EINVAL;
0528     }
0529
0530     return err;
0531 }
0532
0533 static void ixgbe_get_pause_stats(struct net_device *netdev,
0534                   struct ethtool_pause_stats *stats)
0535 {
0536     struct ixgbe_adapter *adapter = netdev_priv(netdev);
0537     struct ixgbe_hw_stats *hwstats = &adapter->stats;
0538
0539     stats->tx_pause_frames = hwstats->lxontxc + hwstats->lxofftxc;
0540     stats->rx_pause_frames = hwstats->lxonrxc + hwstats->lxoffrxc;
0541 }
0542
0543 static void ixgbe_get_pauseparam(struct net_device *netdev,
0544                  struct ethtool_pauseparam *pause)
0545 {
0546     struct ixgbe_adapter *adapter = netdev_priv(netdev);
0547     struct ixgbe_hw *hw = &adapter->hw;
0548
0549     if (ixgbe_device_supports_autoneg_fc(hw) &&
0550         !hw->fc.disable_fc_autoneg)
0551         pause->autoneg = 1;
0552     else
0553         pause->autoneg = 0;
0554
0555     if (hw->fc.current_mode == ixgbe_fc_rx_pause) {
0556         pause->rx_pause = 1;
0557     } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) {
0558         pause->tx_pause = 1;
0559     } else if (hw->fc.current_mode == ixgbe_fc_full) {
0560         pause->rx_pause = 1;
0561         pause->tx_pause = 1;
0562     }
0563 }
0564
0565 static int ixgbe_set_pauseparam(struct net_device *netdev,
0566                 struct ethtool_pauseparam *pause)
0567 {
0568     struct ixgbe_adapter *adapter = netdev_priv(netdev);
0569     struct ixgbe_hw *hw = &adapter->hw;
0570     struct ixgbe_fc_info fc = hw->fc;
0571
0572     /* 82598 does no support link flow control with DCB enabled */
0573     if ((hw->mac.type == ixgbe_mac_82598EB) &&
0574         (adapter->flags & IXGBE_FLAG_DCB_ENABLED))
0575         return -EINVAL;
0576
0577     /* some devices do not support autoneg of link flow control */
0578     if ((pause->autoneg == AUTONEG_ENABLE) &&
0579         !ixgbe_device_supports_autoneg_fc(hw))
0580         return -EINVAL;
0581
0582     fc.disable_fc_autoneg = (pause->autoneg != AUTONEG_ENABLE);
0583
0584     if ((pause->rx_pause && pause->tx_pause) || pause->autoneg)
0585         fc.requested_mode = ixgbe_fc_full;
0586     else if (pause->rx_pause && !pause->tx_pause)
0587         fc.requested_mode = ixgbe_fc_rx_pause;
0588     else if (!pause->rx_pause && pause->tx_pause)
0589         fc.requested_mode = ixgbe_fc_tx_pause;
0590     else
0591         fc.requested_mode = ixgbe_fc_none;
0592
0593     /* if the thing changed then we'll update and use new autoneg */
0594     if (memcmp(&fc, &hw->fc, sizeof(struct ixgbe_fc_info))) {
0595         hw->fc = fc;
0596         if (netif_running(netdev))
0597             ixgbe_reinit_locked(adapter);
0598         else
0599             ixgbe_reset(adapter);
0600     }
0601
0602     return 0;
0603 }
0604
0605 static u32 ixgbe_get_msglevel(struct net_device *netdev)
0606 {
0607     struct ixgbe_adapter *adapter = netdev_priv(netdev);
0608     return adapter->msg_enable;
0609 }
0610
0611 static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
0612 {
0613     struct ixgbe_adapter *adapter = netdev_priv(netdev);
0614     adapter->msg_enable = data;
0615 }
0616
0617 static int ixgbe_get_regs_len(struct net_device *netdev)
0618 {
0619 #define IXGBE_REGS_LEN  1145
0620     return IXGBE_REGS_LEN * sizeof(u32);
0621 }
0622
0623 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
0624
0625 static void ixgbe_get_regs(struct net_device *netdev,
0626                struct ethtool_regs *regs, void *p)
0627 {
0628     struct ixgbe_adapter *adapter = netdev_priv(netdev);
0629     struct ixgbe_hw *hw = &adapter->hw;
0630     u32 *regs_buff = p;
0631     u8 i;
0632
0633     memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
0634
0635     regs->version = hw->mac.type << 24 | hw->revision_id << 16 |
0636             hw->device_id;
0637
0638     /* General Registers */
0639     regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
0640     regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
0641     regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
0642     regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
0643     regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
0644     regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
0645     regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
0646     regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
0647
0648     /* NVM Register */
0649     regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
0650     regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
0651     regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA(hw));
0652     regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
0653     regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
0654     regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
0655     regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
0656     regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
0657     regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
0658     regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC(hw));
0659
0660     /* Interrupt */
0661     /* don't read EICR because it can clear interrupt causes, instead
0662      * read EICS which is a shadow but doesn't clear EICR */
0663     regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS);
0664     regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
0665     regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
0666     regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
0667     regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
0668     regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
0669     regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
0670     regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
0671     regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
0672     regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
0673     regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0));
0674     regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
0675
0676     /* Flow Control */
0677     regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
0678     for (i = 0; i < 4; i++)
0679         regs_buff[31 + i] = IXGBE_READ_REG(hw, IXGBE_FCTTV(i));
0680     for (i = 0; i < 8; i++) {
0681         switch (hw->mac.type) {
0682         case ixgbe_mac_82598EB:
0683             regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
0684             regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
0685             break;
0686         case ixgbe_mac_82599EB:
0687         case ixgbe_mac_X540:
0688         case ixgbe_mac_X550:
0689         case ixgbe_mac_X550EM_x:
0690         case ixgbe_mac_x550em_a:
0691             regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL_82599(i));
0692             regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH_82599(i));
0693             break;
0694         default:
0695             break;
0696         }
0697     }
0698     regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
0699     regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
0700
0701     /* Receive DMA */
0702     for (i = 0; i < 64; i++)
0703         regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
0704     for (i = 0; i < 64; i++)
0705         regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
0706     for (i = 0; i < 64; i++)
0707         regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
0708     for (i = 0; i < 64; i++)
0709         regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
0710     for (i = 0; i < 64; i++)
0711         regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
0712     for (i = 0; i < 64; i++)
0713         regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
0714     for (i = 0; i < 16; i++)
0715         regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
0716     for (i = 0; i < 16; i++)
0717         regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
0718     regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
0719     for (i = 0; i < 8; i++)
0720         regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
0721     regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
0722     regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
0723
0724     /* Receive */
0725     regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
0726     regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
0727     for (i = 0; i < 16; i++)
0728         regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
0729     for (i = 0; i < 16; i++)
0730         regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
0731     regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0));
0732     regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
0733     regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
0734     regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
0735     regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
0736     regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
0737     for (i = 0; i < 8; i++)
0738         regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
0739     for (i = 0; i < 8; i++)
0740         regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
0741     regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
0742
0743     /* Transmit */
0744     for (i = 0; i < 32; i++)
0745         regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
0746     for (i = 0; i < 32; i++)
0747         regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
0748     for (i = 0; i < 32; i++)
0749         regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
0750     for (i = 0; i < 32; i++)
0751         regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
0752     for (i = 0; i < 32; i++)
0753         regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
0754     for (i = 0; i < 32; i++)
0755         regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
0756     for (i = 0; i < 32; i++)
0757         regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
0758     for (i = 0; i < 32; i++)
0759         regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
0760     regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
0761     for (i = 0; i < 16; i++)
0762         regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
0763     regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
0764     for (i = 0; i < 8; i++)
0765         regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
0766     regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
0767
0768     /* Wake Up */
0769     regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
0770     regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
0771     regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
0772     regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
0773     regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
0774     regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
0775     regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
0776     regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
0777     regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT(0));
0778
0779     /* DCB */
0780     regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);   /* same as FCCFG  */
0781     regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS); /* same as RTTPCS */
0782
0783     switch (hw->mac.type) {
0784     case ixgbe_mac_82598EB:
0785         regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
0786         regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
0787         for (i = 0; i < 8; i++)
0788             regs_buff[833 + i] =
0789                 IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
0790         for (i = 0; i < 8; i++)
0791             regs_buff[841 + i] =
0792                 IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
0793         for (i = 0; i < 8; i++)
0794             regs_buff[849 + i] =
0795                 IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
0796         for (i = 0; i < 8; i++)
0797             regs_buff[857 + i] =
0798                 IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
0799         break;
0800     case ixgbe_mac_82599EB:
0801     case ixgbe_mac_X540:
0802     case ixgbe_mac_X550:
0803     case ixgbe_mac_X550EM_x:
0804     case ixgbe_mac_x550em_a:
0805         regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
0806         regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RTRPCS);
0807         for (i = 0; i < 8; i++)
0808             regs_buff[833 + i] =
0809                 IXGBE_READ_REG(hw, IXGBE_RTRPT4C(i));
0810         for (i = 0; i < 8; i++)
0811             regs_buff[841 + i] =
0812                 IXGBE_READ_REG(hw, IXGBE_RTRPT4S(i));
0813         for (i = 0; i < 8; i++)
0814             regs_buff[849 + i] =
0815                 IXGBE_READ_REG(hw, IXGBE_RTTDT2C(i));
0816         for (i = 0; i < 8; i++)
0817             regs_buff[857 + i] =
0818                 IXGBE_READ_REG(hw, IXGBE_RTTDT2S(i));
0819         break;
0820     default:
0821         break;
0822     }
0823
0824     for (i = 0; i < 8; i++)
0825         regs_buff[865 + i] =
0826         IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i)); /* same as RTTPT2C */
0827     for (i = 0; i < 8; i++)
0828         regs_buff[873 + i] =
0829         IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i)); /* same as RTTPT2S */
0830
0831     /* Statistics */
0832     regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
0833     regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
0834     regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
0835     regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
0836     for (i = 0; i < 8; i++)
0837         regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
0838     regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
0839     regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
0840     regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
0841     regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
0842     regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
0843     regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
0844     regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
0845     for (i = 0; i < 8; i++)
0846         regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
0847     for (i = 0; i < 8; i++)
0848         regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
0849     for (i = 0; i < 8; i++)
0850         regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
0851     for (i = 0; i < 8; i++)
0852         regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
0853     regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
0854     regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
0855     regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
0856     regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
0857     regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
0858     regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
0859     regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
0860     regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
0861     regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
0862     regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
0863     regs_buff[942] = (u32)IXGBE_GET_STAT(adapter, gorc);
0864     regs_buff[943] = (u32)(IXGBE_GET_STAT(adapter, gorc) >> 32);
0865     regs_buff[944] = (u32)IXGBE_GET_STAT(adapter, gotc);
0866     regs_buff[945] = (u32)(IXGBE_GET_STAT(adapter, gotc) >> 32);
0867     for (i = 0; i < 8; i++)
0868         regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
0869     regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
0870     regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
0871     regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
0872     regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
0873     regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
0874     regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
0875     regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
0876     regs_buff[961] = (u32)IXGBE_GET_STAT(adapter, tor);
0877     regs_buff[962] = (u32)(IXGBE_GET_STAT(adapter, tor) >> 32);
0878     regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
0879     regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
0880     regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
0881     regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
0882     regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
0883     regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
0884     regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
0885     regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
0886     regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
0887     regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
0888     regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
0889     for (i = 0; i < 16; i++)
0890         regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
0891     for (i = 0; i < 16; i++)
0892         regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
0893     for (i = 0; i < 16; i++)
0894         regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
0895     for (i = 0; i < 16; i++)
0896         regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
0897
0898     /* MAC */
0899     regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
0900     regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
0901     regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
0902     regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
0903     regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
0904     regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
0905     regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
0906     regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
0907     regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
0908     regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
0909     regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
0910     regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
0911     regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
0912     regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
0913     regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
0914     regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
0915     regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
0916     regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
0917     regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
0918     regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
0919     regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
0920     regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
0921     regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
0922     regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
0923     regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
0924     regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
0925     regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
0926     regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
0927     regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
0928     regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
0929     regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
0930     regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
0931     regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
0932
0933     /* Diagnostic */
0934     regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
0935     for (i = 0; i < 8; i++)
0936         regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
0937     regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
0938     for (i = 0; i < 4; i++)
0939         regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i));
0940     regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
0941     regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
0942     for (i = 0; i < 8; i++)
0943         regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
0944     regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
0945     for (i = 0; i < 4; i++)
0946         regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i));
0947     regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
0948     regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
0949     for (i = 0; i < 4; i++)
0950         regs_buff[1102 + i] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA(i));
0951     regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
0952     for (i = 0; i < 4; i++)
0953         regs_buff[1107 + i] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA(i));
0954     for (i = 0; i < 8; i++)
0955         regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
0956     regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
0957     regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
0958     regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
0959     regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
0960     regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
0961     regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
0962     regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
0963     regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
0964     regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
0965
0966     /* 82599 X540 specific registers  */
0967     regs_buff[1128] = IXGBE_READ_REG(hw, IXGBE_MFLCN);
0968
0969     /* 82599 X540 specific DCB registers  */
0970     regs_buff[1129] = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
0971     regs_buff[1130] = IXGBE_READ_REG(hw, IXGBE_RTTUP2TC);
0972     for (i = 0; i < 4; i++)
0973         regs_buff[1131 + i] = IXGBE_READ_REG(hw, IXGBE_TXLLQ(i));
0974     regs_buff[1135] = IXGBE_READ_REG(hw, IXGBE_RTTBCNRM);
0975                     /* same as RTTQCNRM */
0976     regs_buff[1136] = IXGBE_READ_REG(hw, IXGBE_RTTBCNRD);
0977                     /* same as RTTQCNRR */
0978
0979     /* X540 specific DCB registers  */
0980     regs_buff[1137] = IXGBE_READ_REG(hw, IXGBE_RTTQCNCR);
0981     regs_buff[1138] = IXGBE_READ_REG(hw, IXGBE_RTTQCNTG);
0982
0983     /* Security config registers */
0984     regs_buff[1139] = IXGBE_READ_REG(hw, IXGBE_SECTXCTRL);
0985     regs_buff[1140] = IXGBE_READ_REG(hw, IXGBE_SECTXSTAT);
0986     regs_buff[1141] = IXGBE_READ_REG(hw, IXGBE_SECTXBUFFAF);
0987     regs_buff[1142] = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
0988     regs_buff[1143] = IXGBE_READ_REG(hw, IXGBE_SECRXCTRL);
0989     regs_buff[1144] = IXGBE_READ_REG(hw, IXGBE_SECRXSTAT);
0990 }
0991
0992 static int ixgbe_get_eeprom_len(struct net_device *netdev)
0993 {
0994     struct ixgbe_adapter *adapter = netdev_priv(netdev);
0995     return adapter->hw.eeprom.word_size * 2;
0996 }
0997
0998 static int ixgbe_get_eeprom(struct net_device *netdev,
0999                 struct ethtool_eeprom *eeprom, u8 *bytes)
1000 {
1001     struct ixgbe_adapter *adapter = netdev_priv(netdev);
1002     struct ixgbe_hw *hw = &adapter->hw;
1003     u16 *eeprom_buff;
1004     int first_word, last_word, eeprom_len;
1005     int ret_val = 0;
1006     u16 i;
1007
1008     if (eeprom->len == 0)
1009         return -EINVAL;
1010
1011     eeprom->magic = hw->vendor_id | (hw->device_id << 16);
1012
1013     first_word = eeprom->offset >> 1;
1014     last_word = (eeprom->offset + eeprom->len - 1) >> 1;
1015     eeprom_len = last_word - first_word + 1;
1016
1017     eeprom_buff = kmalloc_array(eeprom_len, sizeof(u16), GFP_KERNEL);
1018     if (!eeprom_buff)
1019         return -ENOMEM;
1020
1021     ret_val = hw->eeprom.ops.read_buffer(hw, first_word, eeprom_len,
1022                          eeprom_buff);
1023
1024     /* Device's eeprom is always little-endian, word addressable */
1025     for (i = 0; i < eeprom_len; i++)
1026         le16_to_cpus(&eeprom_buff[i]);
1027
1028     memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
1029     kfree(eeprom_buff);
1030
1031     return ret_val;
1032 }
1033
1034 static int ixgbe_set_eeprom(struct net_device *netdev,
1035                 struct ethtool_eeprom *eeprom, u8 *bytes)
1036 {
1037     struct ixgbe_adapter *adapter = netdev_priv(netdev);
1038     struct ixgbe_hw *hw = &adapter->hw;
1039     u16 *eeprom_buff;
1040     void *ptr;
1041     int max_len, first_word, last_word, ret_val = 0;
1042     u16 i;
1043
1044     if (eeprom->len == 0)
1045         return -EINVAL;
1046
1047     if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
1048         return -EINVAL;
1049
1050     max_len = hw->eeprom.word_size * 2;
1051
1052     first_word = eeprom->offset >> 1;
1053     last_word = (eeprom->offset + eeprom->len - 1) >> 1;
1054     eeprom_buff = kmalloc(max_len, GFP_KERNEL);
1055     if (!eeprom_buff)
1056         return -ENOMEM;
1057
1058     ptr = eeprom_buff;
1059
1060     if (eeprom->offset & 1) {
1061         /*
1062          * need read/modify/write of first changed EEPROM word
1063          * only the second byte of the word is being modified
1064          */
1065         ret_val = hw->eeprom.ops.read(hw, first_word, &eeprom_buff[0]);
1066         if (ret_val)
1067             goto err;
1068
1069         ptr++;
1070     }
1071     if ((eeprom->offset + eeprom->len) & 1) {
1072         /*
1073          * need read/modify/write of last changed EEPROM word
1074          * only the first byte of the word is being modified
1075          */
1076         ret_val = hw->eeprom.ops.read(hw, last_word,
1077                       &eeprom_buff[last_word - first_word]);
1078         if (ret_val)
1079             goto err;
1080     }
1081
1082     /* Device's eeprom is always little-endian, word addressable */
1083     for (i = 0; i < last_word - first_word + 1; i++)
1084         le16_to_cpus(&eeprom_buff[i]);
1085
1086     memcpy(ptr, bytes, eeprom->len);
1087
1088     for (i = 0; i < last_word - first_word + 1; i++)
1089         cpu_to_le16s(&eeprom_buff[i]);
1090
1091     ret_val = hw->eeprom.ops.write_buffer(hw, first_word,
1092                           last_word - first_word + 1,
1093                           eeprom_buff);
1094
1095     /* Update the checksum */
1096     if (ret_val == 0)
1097         hw->eeprom.ops.update_checksum(hw);
1098
1099 err:
1100     kfree(eeprom_buff);
1101     return ret_val;
1102 }
1103
1104 static void ixgbe_get_drvinfo(struct net_device *netdev,
1105                   struct ethtool_drvinfo *drvinfo)
1106 {
1107     struct ixgbe_adapter *adapter = netdev_priv(netdev);
1108
1109     strlcpy(drvinfo->driver, ixgbe_driver_name, sizeof(drvinfo->driver));
1110
1111     strlcpy(drvinfo->fw_version, adapter->eeprom_id,
1112         sizeof(drvinfo->fw_version));
1113
1114     strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
1115         sizeof(drvinfo->bus_info));
1116
1117     drvinfo->n_priv_flags = IXGBE_PRIV_FLAGS_STR_LEN;
1118 }
1119
1120 static void ixgbe_get_ringparam(struct net_device *netdev,
1121                 struct ethtool_ringparam *ring,
1122                 struct kernel_ethtool_ringparam *kernel_ring,
1123                 struct netlink_ext_ack *extack)
1124 {
1125     struct ixgbe_adapter *adapter = netdev_priv(netdev);
1126     struct ixgbe_ring *tx_ring = adapter->tx_ring[0];
1127     struct ixgbe_ring *rx_ring = adapter->rx_ring[0];
1128
1129     ring->rx_max_pending = IXGBE_MAX_RXD;
1130     ring->tx_max_pending = IXGBE_MAX_TXD;
1131     ring->rx_pending = rx_ring->count;
1132     ring->tx_pending = tx_ring->count;
1133 }
1134
1135 static int ixgbe_set_ringparam(struct net_device *netdev,
1136                    struct ethtool_ringparam *ring,
1137                    struct kernel_ethtool_ringparam *kernel_ring,
1138                    struct netlink_ext_ack *extack)
1139 {
1140     struct ixgbe_adapter *adapter = netdev_priv(netdev);
1141     struct ixgbe_ring *temp_ring;
1142     int i, j, err = 0;
1143     u32 new_rx_count, new_tx_count;
1144
1145     if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
1146         return -EINVAL;
1147
1148     new_tx_count = clamp_t(u32, ring->tx_pending,
1149                    IXGBE_MIN_TXD, IXGBE_MAX_TXD);
1150     new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
1151
1152     new_rx_count = clamp_t(u32, ring->rx_pending,
1153                    IXGBE_MIN_RXD, IXGBE_MAX_RXD);
1154     new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
1155
1156     if ((new_tx_count == adapter->tx_ring_count) &&
1157         (new_rx_count == adapter->rx_ring_count)) {
1158         /* nothing to do */
1159         return 0;
1160     }
1161
1162     while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
1163         usleep_range(1000, 2000);
1164
1165     if (!netif_running(adapter->netdev)) {
1166         for (i = 0; i < adapter->num_tx_queues; i++)
1167             adapter->tx_ring[i]->count = new_tx_count;
1168         for (i = 0; i < adapter->num_xdp_queues; i++)
1169             adapter->xdp_ring[i]->count = new_tx_count;
1170         for (i = 0; i < adapter->num_rx_queues; i++)
1171             adapter->rx_ring[i]->count = new_rx_count;
1172         adapter->tx_ring_count = new_tx_count;
1173         adapter->xdp_ring_count = new_tx_count;
1174         adapter->rx_ring_count = new_rx_count;
1175         goto clear_reset;
1176     }
1177
1178     /* allocate temporary buffer to store rings in */
1179     i = max_t(int, adapter->num_tx_queues + adapter->num_xdp_queues,
1180           adapter->num_rx_queues);
1181     temp_ring = vmalloc(array_size(i, sizeof(struct ixgbe_ring)));
1182
1183     if (!temp_ring) {
1184         err = -ENOMEM;
1185         goto clear_reset;
1186     }
1187
1188     ixgbe_down(adapter);
1189
1190     /*
1191      * Setup new Tx resources and free the old Tx resources in that order.
1192      * We can then assign the new resources to the rings via a memcpy.
1193      * The advantage to this approach is that we are guaranteed to still
1194      * have resources even in the case of an allocation failure.
1195      */
1196     if (new_tx_count != adapter->tx_ring_count) {
1197         for (i = 0; i < adapter->num_tx_queues; i++) {
1198             memcpy(&temp_ring[i], adapter->tx_ring[i],
1199                    sizeof(struct ixgbe_ring));
1200
1201             temp_ring[i].count = new_tx_count;
1202             err = ixgbe_setup_tx_resources(&temp_ring[i]);
1203             if (err) {
1204                 while (i) {
1205                     i--;
1206                     ixgbe_free_tx_resources(&temp_ring[i]);
1207                 }
1208                 goto err_setup;
1209             }
1210         }
1211
1212         for (j = 0; j < adapter->num_xdp_queues; j++, i++) {
1213             memcpy(&temp_ring[i], adapter->xdp_ring[j],
1214                    sizeof(struct ixgbe_ring));
1215
1216             temp_ring[i].count = new_tx_count;
1217             err = ixgbe_setup_tx_resources(&temp_ring[i]);
1218             if (err) {
1219                 while (i) {
1220                     i--;
1221                     ixgbe_free_tx_resources(&temp_ring[i]);
1222                 }
1223                 goto err_setup;
1224             }
1225         }
1226
1227         for (i = 0; i < adapter->num_tx_queues; i++) {
1228             ixgbe_free_tx_resources(adapter->tx_ring[i]);
1229
1230             memcpy(adapter->tx_ring[i], &temp_ring[i],
1231                    sizeof(struct ixgbe_ring));
1232         }
1233         for (j = 0; j < adapter->num_xdp_queues; j++, i++) {
1234             ixgbe_free_tx_resources(adapter->xdp_ring[j]);
1235
1236             memcpy(adapter->xdp_ring[j], &temp_ring[i],
1237                    sizeof(struct ixgbe_ring));
1238         }
1239
1240         adapter->tx_ring_count = new_tx_count;
1241     }
1242
1243     /* Repeat the process for the Rx rings if needed */
1244     if (new_rx_count != adapter->rx_ring_count) {
1245         for (i = 0; i < adapter->num_rx_queues; i++) {
1246             memcpy(&temp_ring[i], adapter->rx_ring[i],
1247                    sizeof(struct ixgbe_ring));
1248
1249             /* Clear copied XDP RX-queue info */
1250             memset(&temp_ring[i].xdp_rxq, 0,
1251                    sizeof(temp_ring[i].xdp_rxq));
1252
1253             temp_ring[i].count = new_rx_count;
1254             err = ixgbe_setup_rx_resources(adapter, &temp_ring[i]);
1255             if (err) {
1256                 while (i) {
1257                     i--;
1258                     ixgbe_free_rx_resources(&temp_ring[i]);
1259                 }
1260                 goto err_setup;
1261             }
1262
1263         }
1264
1265         for (i = 0; i < adapter->num_rx_queues; i++) {
1266             ixgbe_free_rx_resources(adapter->rx_ring[i]);
1267
1268             memcpy(adapter->rx_ring[i], &temp_ring[i],
1269                    sizeof(struct ixgbe_ring));
1270         }
1271
1272         adapter->rx_ring_count = new_rx_count;
1273     }
1274
1275 err_setup:
1276     ixgbe_up(adapter);
1277     vfree(temp_ring);
1278 clear_reset:
1279     clear_bit(__IXGBE_RESETTING, &adapter->state);
1280     return err;
1281 }
1282
1283 static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
1284 {
1285     switch (sset) {
1286     case ETH_SS_TEST:
1287         return IXGBE_TEST_LEN;
1288     case ETH_SS_STATS:
1289         return IXGBE_STATS_LEN;
1290     case ETH_SS_PRIV_FLAGS:
1291         return IXGBE_PRIV_FLAGS_STR_LEN;
1292     default:
1293         return -EOPNOTSUPP;
1294     }
1295 }
1296
1297 static void ixgbe_get_ethtool_stats(struct net_device *netdev,
1298                     struct ethtool_stats *stats, u64 *data)
1299 {
1300     struct ixgbe_adapter *adapter = netdev_priv(netdev);
1301     struct rtnl_link_stats64 temp;
1302     const struct rtnl_link_stats64 *net_stats;
1303     unsigned int start;
1304     struct ixgbe_ring *ring;
1305     int i, j;
1306     char *p = NULL;
1307
1308     ixgbe_update_stats(adapter);
1309     net_stats = dev_get_stats(netdev, &temp);
1310     for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1311         switch (ixgbe_gstrings_stats[i].type) {
1312         case NETDEV_STATS:
1313             p = (char *) net_stats +
1314                     ixgbe_gstrings_stats[i].stat_offset;
1315             break;
1316         case IXGBE_STATS:
1317             p = (char *) adapter +
1318                     ixgbe_gstrings_stats[i].stat_offset;
1319             break;
1320         default:
1321             data[i] = 0;
1322             continue;
1323         }
1324
1325         data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
1326                sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1327     }
1328     for (j = 0; j < netdev->num_tx_queues; j++) {
1329         ring = adapter->tx_ring[j];
1330         if (!ring) {
1331             data[i] = 0;
1332             data[i+1] = 0;
1333             i += 2;
1334             continue;
1335         }
1336
1337         do {
1338             start = u64_stats_fetch_begin_irq(&ring->syncp);
1339             data[i]   = ring->stats.packets;
1340             data[i+1] = ring->stats.bytes;
1341         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1342         i += 2;
1343     }
1344     for (j = 0; j < IXGBE_NUM_RX_QUEUES; j++) {
1345         ring = adapter->rx_ring[j];
1346         if (!ring) {
1347             data[i] = 0;
1348             data[i+1] = 0;
1349             i += 2;
1350             continue;
1351         }
1352
1353         do {
1354             start = u64_stats_fetch_begin_irq(&ring->syncp);
1355             data[i]   = ring->stats.packets;
1356             data[i+1] = ring->stats.bytes;
1357         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1358         i += 2;
1359     }
1360
1361     for (j = 0; j < IXGBE_MAX_PACKET_BUFFERS; j++) {
1362         data[i++] = adapter->stats.pxontxc[j];
1363         data[i++] = adapter->stats.pxofftxc[j];
1364     }
1365     for (j = 0; j < IXGBE_MAX_PACKET_BUFFERS; j++) {
1366         data[i++] = adapter->stats.pxonrxc[j];
1367         data[i++] = adapter->stats.pxoffrxc[j];
1368     }
1369 }
1370
1371 static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
1372                   u8 *data)
1373 {
1374     unsigned int i;
1375     u8 *p = data;
1376
1377     switch (stringset) {
1378     case ETH_SS_TEST:
1379         for (i = 0; i < IXGBE_TEST_LEN; i++)
1380             ethtool_sprintf(&p, ixgbe_gstrings_test[i]);
1381         break;
1382     case ETH_SS_STATS:
1383         for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++)
1384             ethtool_sprintf(&p,
1385                     ixgbe_gstrings_stats[i].stat_string);
1386         for (i = 0; i < netdev->num_tx_queues; i++) {
1387             ethtool_sprintf(&p, "tx_queue_%u_packets", i);
1388             ethtool_sprintf(&p, "tx_queue_%u_bytes", i);
1389         }
1390         for (i = 0; i < IXGBE_NUM_RX_QUEUES; i++) {
1391             ethtool_sprintf(&p, "rx_queue_%u_packets", i);
1392             ethtool_sprintf(&p, "rx_queue_%u_bytes", i);
1393         }
1394         for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++) {
1395             ethtool_sprintf(&p, "tx_pb_%u_pxon", i);
1396             ethtool_sprintf(&p, "tx_pb_%u_pxoff", i);
1397         }
1398         for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++) {
1399             ethtool_sprintf(&p, "rx_pb_%u_pxon", i);
1400             ethtool_sprintf(&p, "rx_pb_%u_pxoff", i);
1401         }
1402         /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
1403         break;
1404     case ETH_SS_PRIV_FLAGS:
1405         memcpy(data, ixgbe_priv_flags_strings,
1406                IXGBE_PRIV_FLAGS_STR_LEN * ETH_GSTRING_LEN);
1407     }
1408 }
1409
1410 static int ixgbe_link_test(struct ixgbe_adapter *adapter, u64 *data)
1411 {
1412     struct ixgbe_hw *hw = &adapter->hw;
1413     bool link_up;
1414     u32 link_speed = 0;
1415
1416     if (ixgbe_removed(hw->hw_addr)) {
1417         *data = 1;
1418         return 1;
1419     }
1420     *data = 0;
1421
1422     hw->mac.ops.check_link(hw, &link_speed, &link_up, true);
1423     if (link_up)
1424         return *data;
1425     else
1426         *data = 1;
1427     return *data;
1428 }
1429
1430 /* ethtool register test data */
1431 struct ixgbe_reg_test {
1432     u16 reg;
1433     u8  array_len;
1434     u8  test_type;
1435     u32 mask;
1436     u32 write;
1437 };
1438
1439 /* In the hardware, registers are laid out either singly, in arrays
1440  * spaced 0x40 bytes apart, or in contiguous tables.  We assume
1441  * most tests take place on arrays or single registers (handled
1442  * as a single-element array) and special-case the tables.
1443  * Table tests are always pattern tests.
1444  *
1445  * We also make provision for some required setup steps by specifying
1446  * registers to be written without any read-back testing.
1447  */
1448
1449 #define PATTERN_TEST    1
1450 #define SET_READ_TEST   2
1451 #define WRITE_NO_TEST   3
1452 #define TABLE32_TEST    4
1453 #define TABLE64_TEST_LO 5
1454 #define TABLE64_TEST_HI 6
1455
1456 /* default 82599 register test */
1457 static const struct ixgbe_reg_test reg_test_82599[] = {
1458     { IXGBE_FCRTL_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1459     { IXGBE_FCRTH_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1460     { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1461     { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1462     { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 },
1463     { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1464     { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1465     { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1466     { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1467     { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1468     { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1469     { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1470     { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1471     { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1472     { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFF80 },
1473     { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000001, 0x00000001 },
1474     { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1475     { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x8001FFFF, 0x800CFFFF },
1476     { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1477     { .reg = 0 }
1478 };
1479
1480 /* default 82598 register test */
1481 static const struct ixgbe_reg_test reg_test_82598[] = {
1482     { IXGBE_FCRTL(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1483     { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1484     { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1485     { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1486     { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1487     { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1488     { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1489     /* Enable all four RX queues before testing. */
1490     { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1491     /* RDH is read-only for 82598, only test RDT. */
1492     { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1493     { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1494     { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1495     { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1496     { IXGBE_TIPG, 1, PATTERN_TEST, 0x000000FF, 0x000000FF },
1497     { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1498     { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1499     { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1500     { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000003, 0x00000003 },
1501     { IXGBE_DTXCTL, 1, SET_READ_TEST, 0x00000005, 0x00000005 },
1502     { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1503     { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x800CFFFF, 0x800CFFFF },
1504     { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1505     { .reg = 0 }
1506 };
1507
1508 static bool reg_pattern_test(struct ixgbe_adapter *adapter, u64 *data, int reg,
1509                  u32 mask, u32 write)
1510 {
1511     u32 pat, val, before;
1512     static const u32 test_pattern[] = {
1513         0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1514
1515     if (ixgbe_removed(adapter->hw.hw_addr)) {
1516         *data = 1;
1517         return true;
1518     }
1519     for (pat = 0; pat < ARRAY_SIZE(test_pattern); pat++) {
1520         before = ixgbe_read_reg(&adapter->hw, reg);
1521         ixgbe_write_reg(&adapter->hw, reg, test_pattern[pat] & write);
1522         val = ixgbe_read_reg(&adapter->hw, reg);
1523         if (val != (test_pattern[pat] & write & mask)) {
1524             e_err(drv, "pattern test reg %04X failed: got 0x%08X expected 0x%08X\n",
1525                   reg, val, (test_pattern[pat] & write & mask));
1526             *data = reg;
1527             ixgbe_write_reg(&adapter->hw, reg, before);
1528             return true;
1529         }
1530         ixgbe_write_reg(&adapter->hw, reg, before);
1531     }
1532     return false;
1533 }
1534
1535 static bool reg_set_and_check(struct ixgbe_adapter *adapter, u64 *data, int reg,
1536                   u32 mask, u32 write)
1537 {
1538     u32 val, before;
1539
1540     if (ixgbe_removed(adapter->hw.hw_addr)) {
1541         *data = 1;
1542         return true;
1543     }
1544     before = ixgbe_read_reg(&adapter->hw, reg);
1545     ixgbe_write_reg(&adapter->hw, reg, write & mask);
1546     val = ixgbe_read_reg(&adapter->hw, reg);
1547     if ((write & mask) != (val & mask)) {
1548         e_err(drv, "set/check reg %04X test failed: got 0x%08X expected 0x%08X\n",
1549               reg, (val & mask), (write & mask));
1550         *data = reg;
1551         ixgbe_write_reg(&adapter->hw, reg, before);
1552         return true;
1553     }
1554     ixgbe_write_reg(&adapter->hw, reg, before);
1555     return false;
1556 }
1557
1558 static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data)
1559 {
1560     const struct ixgbe_reg_test *test;
1561     u32 value, before, after;
1562     u32 i, toggle;
1563
1564     if (ixgbe_removed(adapter->hw.hw_addr)) {
1565         e_err(drv, "Adapter removed - register test blocked\n");
1566         *data = 1;
1567         return 1;
1568     }
1569     switch (adapter->hw.mac.type) {
1570     case ixgbe_mac_82598EB:
1571         toggle = 0x7FFFF3FF;
1572         test = reg_test_82598;
1573         break;
1574     case ixgbe_mac_82599EB:
1575     case ixgbe_mac_X540:
1576     case ixgbe_mac_X550:
1577     case ixgbe_mac_X550EM_x:
1578     case ixgbe_mac_x550em_a:
1579         toggle = 0x7FFFF30F;
1580         test = reg_test_82599;
1581         break;
1582     default:
1583         *data = 1;
1584         return 1;
1585     }
1586
1587     /*
1588      * Because the status register is such a special case,
1589      * we handle it separately from the rest of the register
1590      * tests.  Some bits are read-only, some toggle, and some
1591      * are writeable on newer MACs.
1592      */
1593     before = ixgbe_read_reg(&adapter->hw, IXGBE_STATUS);
1594     value = (ixgbe_read_reg(&adapter->hw, IXGBE_STATUS) & toggle);
1595     ixgbe_write_reg(&adapter->hw, IXGBE_STATUS, toggle);
1596     after = ixgbe_read_reg(&adapter->hw, IXGBE_STATUS) & toggle;
1597     if (value != after) {
1598         e_err(drv, "failed STATUS register test got: 0x%08X expected: 0x%08X\n",
1599               after, value);
1600         *data = 1;
1601         return 1;
1602     }
1603     /* restore previous status */
1604     ixgbe_write_reg(&adapter->hw, IXGBE_STATUS, before);
1605
1606     /*
1607      * Perform the remainder of the register test, looping through
1608      * the test table until we either fail or reach the null entry.
1609      */
1610     while (test->reg) {
1611         for (i = 0; i < test->array_len; i++) {
1612             bool b = false;
1613
1614             switch (test->test_type) {
1615             case PATTERN_TEST:
1616                 b = reg_pattern_test(adapter, data,
1617                              test->reg + (i * 0x40),
1618                              test->mask,
1619                              test->write);
1620                 break;
1621             case SET_READ_TEST:
1622                 b = reg_set_and_check(adapter, data,
1623                               test->reg + (i * 0x40),
1624                               test->mask,
1625                               test->write);
1626                 break;
1627             case WRITE_NO_TEST:
1628                 ixgbe_write_reg(&adapter->hw,
1629                         test->reg + (i * 0x40),
1630                         test->write);
1631                 break;
1632             case TABLE32_TEST:
1633                 b = reg_pattern_test(adapter, data,
1634                              test->reg + (i * 4),
1635                              test->mask,
1636                              test->write);
1637                 break;
1638             case TABLE64_TEST_LO:
1639                 b = reg_pattern_test(adapter, data,
1640                              test->reg + (i * 8),
1641                              test->mask,
1642                              test->write);
1643                 break;
1644             case TABLE64_TEST_HI:
1645                 b = reg_pattern_test(adapter, data,
1646                              (test->reg + 4) + (i * 8),
1647                              test->mask,
1648                              test->write);
1649                 break;
1650             }
1651             if (b)
1652                 return 1;
1653         }
1654         test++;
1655     }
1656
1657     *data = 0;
1658     return 0;
1659 }
1660
1661 static int ixgbe_eeprom_test(struct ixgbe_adapter *adapter, u64 *data)
1662 {
1663     struct ixgbe_hw *hw = &adapter->hw;
1664     if (hw->eeprom.ops.validate_checksum(hw, NULL))
1665         *data = 1;
1666     else
1667         *data = 0;
1668     return *data;
1669 }
1670
1671 static irqreturn_t ixgbe_test_intr(int irq, void *data)
1672 {
1673     struct net_device *netdev = (struct net_device *) data;
1674     struct ixgbe_adapter *adapter = netdev_priv(netdev);
1675
1676     adapter->test_icr |= IXGBE_READ_REG(&adapter->hw, IXGBE_EICR);
1677
1678     return IRQ_HANDLED;
1679 }
1680
1681 static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data)
1682 {
1683     struct net_device *netdev = adapter->netdev;
1684     u32 mask, i = 0, shared_int = true;
1685     u32 irq = adapter->pdev->irq;
1686
1687     *data = 0;
1688
1689     /* Hook up test interrupt handler just for this test */
1690     if (adapter->msix_entries) {
1691         /* NOTE: we don't test MSI-X interrupts here, yet */
1692         return 0;
1693     } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1694         shared_int = false;
1695         if (request_irq(irq, ixgbe_test_intr, 0, netdev->name,
1696                 netdev)) {
1697             *data = 1;
1698             return -1;
1699         }
1700     } else if (!request_irq(irq, ixgbe_test_intr, IRQF_PROBE_SHARED,
1701                 netdev->name, netdev)) {
1702         shared_int = false;
1703     } else if (request_irq(irq, ixgbe_test_intr, IRQF_SHARED,
1704                    netdev->name, netdev)) {
1705         *data = 1;
1706         return -1;
1707     }
1708     e_info(hw, "testing %s interrupt\n", shared_int ?
1709            "shared" : "unshared");
1710
1711     /* Disable all the interrupts */
1712     IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1713     IXGBE_WRITE_FLUSH(&adapter->hw);
1714     usleep_range(10000, 20000);
1715
1716     /* Test each interrupt */
1717     for (; i < 10; i++) {
1718         /* Interrupt to test */
1719         mask = BIT(i);
1720
1721         if (!shared_int) {
1722             /*
1723              * Disable the interrupts to be reported in
1724              * the cause register and then force the same
1725              * interrupt and see if one gets posted.  If
1726              * an interrupt was posted to the bus, the
1727              * test failed.
1728              */
1729             adapter->test_icr = 0;
1730             IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1731                     ~mask & 0x00007FFF);
1732             IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1733                     ~mask & 0x00007FFF);
1734             IXGBE_WRITE_FLUSH(&adapter->hw);
1735             usleep_range(10000, 20000);
1736
1737             if (adapter->test_icr & mask) {
1738                 *data = 3;
1739                 break;
1740             }
1741         }
1742
1743         /*
1744          * Enable the interrupt to be reported in the cause
1745          * register and then force the same interrupt and see
1746          * if one gets posted.  If an interrupt was not posted
1747          * to the bus, the test failed.
1748          */
1749         adapter->test_icr = 0;
1750         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1751         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
1752         IXGBE_WRITE_FLUSH(&adapter->hw);
1753         usleep_range(10000, 20000);
1754
1755         if (!(adapter->test_icr & mask)) {
1756             *data = 4;
1757             break;
1758         }
1759
1760         if (!shared_int) {
1761             /*
1762              * Disable the other interrupts to be reported in
1763              * the cause register and then force the other
1764              * interrupts and see if any get posted.  If
1765              * an interrupt was posted to the bus, the
1766              * test failed.
1767              */
1768             adapter->test_icr = 0;
1769             IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1770                     ~mask & 0x00007FFF);
1771             IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1772                     ~mask & 0x00007FFF);
1773             IXGBE_WRITE_FLUSH(&adapter->hw);
1774             usleep_range(10000, 20000);
1775
1776             if (adapter->test_icr) {
1777                 *data = 5;
1778                 break;
1779             }
1780         }
1781     }
1782
1783     /* Disable all the interrupts */
1784     IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1785     IXGBE_WRITE_FLUSH(&adapter->hw);
1786     usleep_range(10000, 20000);
1787
1788     /* Unhook test interrupt handler */
1789     free_irq(irq, netdev);
1790
1791     return *data;
1792 }
1793
1794 static void ixgbe_free_desc_rings(struct ixgbe_adapter *adapter)
1795 {
1796     /* Shut down the DMA engines now so they can be reinitialized later,
1797      * since the test rings and normally used rings should overlap on
1798      * queue 0 we can just use the standard disable Rx/Tx calls and they
1799      * will take care of disabling the test rings for us.
1800      */
1801
1802     /* first Rx */
1803     ixgbe_disable_rx(adapter);
1804
1805     /* now Tx */
1806     ixgbe_disable_tx(adapter);
1807
1808     ixgbe_reset(adapter);
1809
1810     ixgbe_free_tx_resources(&adapter->test_tx_ring);
1811     ixgbe_free_rx_resources(&adapter->test_rx_ring);
1812 }
1813
1814 static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter)
1815 {
1816     struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1817     struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1818     struct ixgbe_hw *hw = &adapter->hw;
1819     u32 rctl, reg_data;
1820     int ret_val;
1821     int err;
1822
1823     /* Setup Tx descriptor ring and Tx buffers */
1824     tx_ring->count = IXGBE_DEFAULT_TXD;
1825     tx_ring->queue_index = 0;
1826     tx_ring->dev = &adapter->pdev->dev;
1827     tx_ring->netdev = adapter->netdev;
1828     tx_ring->reg_idx = adapter->tx_ring[0]->reg_idx;
1829
1830     err = ixgbe_setup_tx_resources(tx_ring);
1831     if (err)
1832         return 1;
1833
1834     switch (adapter->hw.mac.type) {
1835     case ixgbe_mac_82599EB:
1836     case ixgbe_mac_X540:
1837     case ixgbe_mac_X550:
1838     case ixgbe_mac_X550EM_x:
1839     case ixgbe_mac_x550em_a:
1840         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL);
1841         reg_data |= IXGBE_DMATXCTL_TE;
1842         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data);
1843         break;
1844     default:
1845         break;
1846     }
1847
1848     ixgbe_configure_tx_ring(adapter, tx_ring);
1849
1850     /* Setup Rx Descriptor ring and Rx buffers */
1851     rx_ring->count = IXGBE_DEFAULT_RXD;
1852     rx_ring->queue_index = 0;
1853     rx_ring->dev = &adapter->pdev->dev;
1854     rx_ring->netdev = adapter->netdev;
1855     rx_ring->reg_idx = adapter->rx_ring[0]->reg_idx;
1856
1857     err = ixgbe_setup_rx_resources(adapter, rx_ring);
1858     if (err) {
1859         ret_val = 4;
1860         goto err_nomem;
1861     }
1862
1863     hw->mac.ops.disable_rx(hw);
1864
1865     ixgbe_configure_rx_ring(adapter, rx_ring);
1866
1867     rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
1868     rctl |= IXGBE_RXCTRL_DMBYPS;
1869     IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl);
1870
1871     hw->mac.ops.enable_rx(hw);
1872
1873     return 0;
1874
1875 err_nomem:
1876     ixgbe_free_desc_rings(adapter);
1877     return ret_val;
1878 }
1879
1880 static int ixgbe_setup_loopback_test(struct ixgbe_adapter *adapter)
1881 {
1882     struct ixgbe_hw *hw = &adapter->hw;
1883     u32 reg_data;
1884
1885
1886     /* Setup MAC loopback */
1887     reg_data = IXGBE_READ_REG(hw, IXGBE_HLREG0);
1888     reg_data |= IXGBE_HLREG0_LPBK;
1889     IXGBE_WRITE_REG(hw, IXGBE_HLREG0, reg_data);
1890
1891     reg_data = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1892     reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE;
1893     IXGBE_WRITE_REG(hw, IXGBE_FCTRL, reg_data);
1894
1895     /* X540 and X550 needs to set the MACC.FLU bit to force link up */
1896     switch (adapter->hw.mac.type) {
1897     case ixgbe_mac_X540:
1898     case ixgbe_mac_X550:
1899     case ixgbe_mac_X550EM_x:
1900     case ixgbe_mac_x550em_a:
1901         reg_data = IXGBE_READ_REG(hw, IXGBE_MACC);
1902         reg_data |= IXGBE_MACC_FLU;
1903         IXGBE_WRITE_REG(hw, IXGBE_MACC, reg_data);
1904         break;
1905     default:
1906         if (hw->mac.orig_autoc) {
1907             reg_data = hw->mac.orig_autoc | IXGBE_AUTOC_FLU;
1908             IXGBE_WRITE_REG(hw, IXGBE_AUTOC, reg_data);
1909         } else {
1910             return 10;
1911         }
1912     }
1913     IXGBE_WRITE_FLUSH(hw);
1914     usleep_range(10000, 20000);
1915
1916     /* Disable Atlas Tx lanes; re-enabled in reset path */
1917     if (hw->mac.type == ixgbe_mac_82598EB) {
1918         u8 atlas;
1919
1920         hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &atlas);
1921         atlas |= IXGBE_ATLAS_PDN_TX_REG_EN;
1922         hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, atlas);
1923
1924         hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &atlas);
1925         atlas |= IXGBE_ATLAS_PDN_TX_10G_QL_ALL;
1926         hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, atlas);
1927
1928         hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &atlas);
1929         atlas |= IXGBE_ATLAS_PDN_TX_1G_QL_ALL;
1930         hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, atlas);
1931
1932         hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &atlas);
1933         atlas |= IXGBE_ATLAS_PDN_TX_AN_QL_ALL;
1934         hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, atlas);
1935     }
1936
1937     return 0;
1938 }
1939
1940 static void ixgbe_loopback_cleanup(struct ixgbe_adapter *adapter)
1941 {
1942     u32 reg_data;
1943
1944     reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
1945     reg_data &= ~IXGBE_HLREG0_LPBK;
1946     IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
1947 }
1948
1949 static void ixgbe_create_lbtest_frame(struct sk_buff *skb,
1950                       unsigned int frame_size)
1951 {
1952     memset(skb->data, 0xFF, frame_size);
1953     frame_size >>= 1;
1954     memset(&skb->data[frame_size], 0xAA, frame_size / 2 - 1);
1955     skb->data[frame_size + 10] = 0xBE;
1956     skb->data[frame_size + 12] = 0xAF;
1957 }
1958
1959 static bool ixgbe_check_lbtest_frame(struct ixgbe_rx_buffer *rx_buffer,
1960                      unsigned int frame_size)
1961 {
1962     unsigned char *data;
1963     bool match = true;
1964
1965     frame_size >>= 1;
1966
1967     data = kmap(rx_buffer->page) + rx_buffer->page_offset;
1968
1969     if (data[3] != 0xFF ||
1970         data[frame_size + 10] != 0xBE ||
1971         data[frame_size + 12] != 0xAF)
1972         match = false;
1973
1974     kunmap(rx_buffer->page);
1975
1976     return match;
1977 }
1978
1979 static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring,
1980                   struct ixgbe_ring *tx_ring,
1981                   unsigned int size)
1982 {
1983     union ixgbe_adv_rx_desc *rx_desc;
1984     u16 rx_ntc, tx_ntc, count = 0;
1985
1986     /* initialize next to clean and descriptor values */
1987     rx_ntc = rx_ring->next_to_clean;
1988     tx_ntc = tx_ring->next_to_clean;
1989     rx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc);
1990
1991     while (tx_ntc != tx_ring->next_to_use) {
1992         union ixgbe_adv_tx_desc *tx_desc;
1993         struct ixgbe_tx_buffer *tx_buffer;
1994
1995         tx_desc = IXGBE_TX_DESC(tx_ring, tx_ntc);
1996
1997         /* if DD is not set transmit has not completed */
1998         if (!(tx_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1999             return count;
2000
2001         /* unmap buffer on Tx side */
2002         tx_buffer = &tx_ring->tx_buffer_info[tx_ntc];
2003
2004         /* Free all the Tx ring sk_buffs */
2005         dev_kfree_skb_any(tx_buffer->skb);
2006
2007         /* unmap skb header data */
2008         dma_unmap_single(tx_ring->dev,
2009                  dma_unmap_addr(tx_buffer, dma),
2010                  dma_unmap_len(tx_buffer, len),
2011                  DMA_TO_DEVICE);
2012         dma_unmap_len_set(tx_buffer, len, 0);
2013
2014         /* increment Tx next to clean counter */
2015         tx_ntc++;
2016         if (tx_ntc == tx_ring->count)
2017             tx_ntc = 0;
2018     }
2019
2020     while (rx_desc->wb.upper.length) {
2021         struct ixgbe_rx_buffer *rx_buffer;
2022
2023         /* check Rx buffer */
2024         rx_buffer = &rx_ring->rx_buffer_info[rx_ntc];
2025
2026         /* sync Rx buffer for CPU read */
2027         dma_sync_single_for_cpu(rx_ring->dev,
2028                     rx_buffer->dma,
2029                     ixgbe_rx_bufsz(rx_ring),
2030                     DMA_FROM_DEVICE);
2031
2032         /* verify contents of skb */
2033         if (ixgbe_check_lbtest_frame(rx_buffer, size))
2034             count++;
2035         else
2036             break;
2037
2038         /* sync Rx buffer for device write */
2039         dma_sync_single_for_device(rx_ring->dev,
2040                        rx_buffer->dma,
2041                        ixgbe_rx_bufsz(rx_ring),
2042                        DMA_FROM_DEVICE);
2043
2044         /* increment Rx next to clean counter */
2045         rx_ntc++;
2046         if (rx_ntc == rx_ring->count)
2047             rx_ntc = 0;
2048
2049         /* fetch next descriptor */
2050         rx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc);
2051     }
2052
2053     netdev_tx_reset_queue(txring_txq(tx_ring));
2054
2055     /* re-map buffers to ring, store next to clean values */
2056     ixgbe_alloc_rx_buffers(rx_ring, count);
2057     rx_ring->next_to_clean = rx_ntc;
2058     tx_ring->next_to_clean = tx_ntc;
2059
2060     return count;
2061 }
2062
2063 static int ixgbe_run_loopback_test(struct ixgbe_adapter *adapter)
2064 {
2065     struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
2066     struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
2067     int i, j, lc, good_cnt, ret_val = 0;
2068     unsigned int size = 1024;
2069     netdev_tx_t tx_ret_val;
2070     struct sk_buff *skb;
2071     u32 flags_orig = adapter->flags;
2072
2073     /* DCB can modify the frames on Tx */
2074     adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
2075
2076     /* allocate test skb */
2077     skb = alloc_skb(size, GFP_KERNEL);
2078     if (!skb)
2079         return 11;
2080
2081     /* place data into test skb */
2082     ixgbe_create_lbtest_frame(skb, size);
2083     skb_put(skb, size);
2084
2085     /*
2086      * Calculate the loop count based on the largest descriptor ring
2087      * The idea is to wrap the largest ring a number of times using 64
2088      * send/receive pairs during each loop
2089      */
2090
2091     if (rx_ring->count <= tx_ring->count)
2092         lc = ((tx_ring->count / 64) * 2) + 1;
2093     else
2094         lc = ((rx_ring->count / 64) * 2) + 1;
2095
2096     for (j = 0; j <= lc; j++) {
2097         /* reset count of good packets */
2098         good_cnt = 0;
2099
2100         /* place 64 packets on the transmit queue*/
2101         for (i = 0; i < 64; i++) {
2102             skb_get(skb);
2103             tx_ret_val = ixgbe_xmit_frame_ring(skb,
2104                                adapter,
2105                                tx_ring);
2106             if (tx_ret_val == NETDEV_TX_OK)
2107                 good_cnt++;
2108         }
2109
2110         if (good_cnt != 64) {
2111             ret_val = 12;
2112             break;
2113         }
2114
2115         /* allow 200 milliseconds for packets to go from Tx to Rx */
2116         msleep(200);
2117
2118         good_cnt = ixgbe_clean_test_rings(rx_ring, tx_ring, size);
2119         if (good_cnt != 64) {
2120             ret_val = 13;
2121             break;
2122         }
2123     }
2124
2125     /* free the original skb */
2126     kfree_skb(skb);
2127     adapter->flags = flags_orig;
2128
2129     return ret_val;
2130 }
2131
2132 static int ixgbe_loopback_test(struct ixgbe_adapter *adapter, u64 *data)
2133 {
2134     *data = ixgbe_setup_desc_rings(adapter);
2135     if (*data)
2136         goto out;
2137     *data = ixgbe_setup_loopback_test(adapter);
2138     if (*data)
2139         goto err_loopback;
2140     *data = ixgbe_run_loopback_test(adapter);
2141     ixgbe_loopback_cleanup(adapter);
2142
2143 err_loopback:
2144     ixgbe_free_desc_rings(adapter);
2145 out:
2146     return *data;
2147 }
2148
2149 static void ixgbe_diag_test(struct net_device *netdev,
2150                 struct ethtool_test *eth_test, u64 *data)
2151 {
2152     struct ixgbe_adapter *adapter = netdev_priv(netdev);
2153     bool if_running = netif_running(netdev);
2154
2155     if (ixgbe_removed(adapter->hw.hw_addr)) {
2156         e_err(hw, "Adapter removed - test blocked\n");
2157         data[0] = 1;
2158         data[1] = 1;
2159         data[2] = 1;
2160         data[3] = 1;
2161         data[4] = 1;
2162         eth_test->flags |= ETH_TEST_FL_FAILED;
2163         return;
2164     }
2165     set_bit(__IXGBE_TESTING, &adapter->state);
2166     if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
2167         struct ixgbe_hw *hw = &adapter->hw;
2168
2169         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
2170             int i;
2171             for (i = 0; i < adapter->num_vfs; i++) {
2172                 if (adapter->vfinfo[i].clear_to_send) {
2173                     netdev_warn(netdev, "offline diagnostic is not supported when VFs are present\n");
2174                     data[0] = 1;
2175                     data[1] = 1;
2176                     data[2] = 1;
2177                     data[3] = 1;
2178                     data[4] = 1;
2179                     eth_test->flags |= ETH_TEST_FL_FAILED;
2180                     clear_bit(__IXGBE_TESTING,
2181                           &adapter->state);
2182                     return;
2183                 }
2184             }
2185         }
2186
2187         /* Offline tests */
2188         e_info(hw, "offline testing starting\n");
2189
2190         /* Link test performed before hardware reset so autoneg doesn't
2191          * interfere with test result
2192          */
2193         if (ixgbe_link_test(adapter, &data[4]))
2194             eth_test->flags |= ETH_TEST_FL_FAILED;
2195
2196         if (if_running)
2197             /* indicate we're in test mode */
2198             ixgbe_close(netdev);
2199         else
2200             ixgbe_reset(adapter);
2201
2202         e_info(hw, "register testing starting\n");
2203         if (ixgbe_reg_test(adapter, &data[0]))
2204             eth_test->flags |= ETH_TEST_FL_FAILED;
2205
2206         ixgbe_reset(adapter);
2207         e_info(hw, "eeprom testing starting\n");
2208         if (ixgbe_eeprom_test(adapter, &data[1]))
2209             eth_test->flags |= ETH_TEST_FL_FAILED;
2210
2211         ixgbe_reset(adapter);
2212         e_info(hw, "interrupt testing starting\n");
2213         if (ixgbe_intr_test(adapter, &data[2]))
2214             eth_test->flags |= ETH_TEST_FL_FAILED;
2215
2216         /* If SRIOV or VMDq is enabled then skip MAC
2217          * loopback diagnostic. */
2218         if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED |
2219                       IXGBE_FLAG_VMDQ_ENABLED)) {
2220             e_info(hw, "Skip MAC loopback diagnostic in VT mode\n");
2221             data[3] = 0;
2222             goto skip_loopback;
2223         }
2224
2225         ixgbe_reset(adapter);
2226         e_info(hw, "loopback testing starting\n");
2227         if (ixgbe_loopback_test(adapter, &data[3]))
2228             eth_test->flags |= ETH_TEST_FL_FAILED;
2229
2230 skip_loopback:
2231         ixgbe_reset(adapter);
2232
2233         /* clear testing bit and return adapter to previous state */
2234         clear_bit(__IXGBE_TESTING, &adapter->state);
2235         if (if_running)
2236             ixgbe_open(netdev);
2237         else if (hw->mac.ops.disable_tx_laser)
2238             hw->mac.ops.disable_tx_laser(hw);
2239     } else {
2240         e_info(hw, "online testing starting\n");
2241
2242         /* Online tests */
2243         if (ixgbe_link_test(adapter, &data[4]))
2244             eth_test->flags |= ETH_TEST_FL_FAILED;
2245
2246         /* Offline tests aren't run; pass by default */
2247         data[0] = 0;
2248         data[1] = 0;
2249         data[2] = 0;
2250         data[3] = 0;
2251
2252         clear_bit(__IXGBE_TESTING, &adapter->state);
2253     }
2254 }
2255
2256 static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
2257                    struct ethtool_wolinfo *wol)
2258 {
2259     struct ixgbe_hw *hw = &adapter->hw;
2260     int retval = 0;
2261
2262     /* WOL not supported for all devices */
2263     if (!ixgbe_wol_supported(adapter, hw->device_id,
2264                  hw->subsystem_device_id)) {
2265         retval = 1;
2266         wol->supported = 0;
2267     }
2268
2269     return retval;
2270 }
2271
2272 static void ixgbe_get_wol(struct net_device *netdev,
2273               struct ethtool_wolinfo *wol)
2274 {
2275     struct ixgbe_adapter *adapter = netdev_priv(netdev);
2276
2277     wol->supported = WAKE_UCAST | WAKE_MCAST |
2278              WAKE_BCAST | WAKE_MAGIC;
2279     wol->wolopts = 0;
2280
2281     if (ixgbe_wol_exclusion(adapter, wol) ||
2282         !device_can_wakeup(&adapter->pdev->dev))
2283         return;
2284
2285     if (adapter->wol & IXGBE_WUFC_EX)
2286         wol->wolopts |= WAKE_UCAST;
2287     if (adapter->wol & IXGBE_WUFC_MC)
2288         wol->wolopts |= WAKE_MCAST;
2289     if (adapter->wol & IXGBE_WUFC_BC)
2290         wol->wolopts |= WAKE_BCAST;
2291     if (adapter->wol & IXGBE_WUFC_MAG)
2292         wol->wolopts |= WAKE_MAGIC;
2293 }
2294
2295 static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2296 {
2297     struct ixgbe_adapter *adapter = netdev_priv(netdev);
2298
2299     if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE |
2300                 WAKE_FILTER))
2301         return -EOPNOTSUPP;
2302
2303     if (ixgbe_wol_exclusion(adapter, wol))
2304         return wol->wolopts ? -EOPNOTSUPP : 0;
2305
2306     adapter->wol = 0;
2307
2308     if (wol->wolopts & WAKE_UCAST)
2309         adapter->wol |= IXGBE_WUFC_EX;
2310     if (wol->wolopts & WAKE_MCAST)
2311         adapter->wol |= IXGBE_WUFC_MC;
2312     if (wol->wolopts & WAKE_BCAST)
2313         adapter->wol |= IXGBE_WUFC_BC;
2314     if (wol->wolopts & WAKE_MAGIC)
2315         adapter->wol |= IXGBE_WUFC_MAG;
2316
2317     device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
2318
2319     return 0;
2320 }
2321
2322 static int ixgbe_nway_reset(struct net_device *netdev)
2323 {
2324     struct ixgbe_adapter *adapter = netdev_priv(netdev);
2325
2326     if (netif_running(netdev))
2327         ixgbe_reinit_locked(adapter);
2328
2329     return 0;
2330 }
2331
2332 static int ixgbe_set_phys_id(struct net_device *netdev,
2333                  enum ethtool_phys_id_state state)
2334 {
2335     struct ixgbe_adapter *adapter = netdev_priv(netdev);
2336     struct ixgbe_hw *hw = &adapter->hw;
2337
2338     if (!hw->mac.ops.led_on || !hw->mac.ops.led_off)
2339         return -EOPNOTSUPP;
2340
2341     switch (state) {
2342     case ETHTOOL_ID_ACTIVE:
2343         adapter->led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
2344         return 2;
2345
2346     case ETHTOOL_ID_ON:
2347         hw->mac.ops.led_on(hw, hw->mac.led_link_act);
2348         break;
2349
2350     case ETHTOOL_ID_OFF:
2351         hw->mac.ops.led_off(hw, hw->mac.led_link_act);
2352         break;
2353
2354     case ETHTOOL_ID_INACTIVE:
2355         /* Restore LED settings */
2356         IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, adapter->led_reg);
2357         break;
2358     }
2359
2360     return 0;
2361 }
2362
2363 static int ixgbe_get_coalesce(struct net_device *netdev,
2364                   struct ethtool_coalesce *ec,
2365                   struct kernel_ethtool_coalesce *kernel_coal,
2366                   struct netlink_ext_ack *extack)
2367 {
2368     struct ixgbe_adapter *adapter = netdev_priv(netdev);
2369
2370     /* only valid if in constant ITR mode */
2371     if (adapter->rx_itr_setting <= 1)
2372         ec->rx_coalesce_usecs = adapter->rx_itr_setting;
2373     else
2374         ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2;
2375
2376     /* if in mixed tx/rx queues per vector mode, report only rx settings */
2377     if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count)
2378         return 0;
2379
2380     /* only valid if in constant ITR mode */
2381     if (adapter->tx_itr_setting <= 1)
2382         ec->tx_coalesce_usecs = adapter->tx_itr_setting;
2383     else
2384         ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2;
2385
2386     return 0;
2387 }
2388
2389 /*
2390  * this function must be called before setting the new value of
2391  * rx_itr_setting
2392  */
2393 static bool ixgbe_update_rsc(struct ixgbe_adapter *adapter)
2394 {
2395     struct net_device *netdev = adapter->netdev;
2396
2397     /* nothing to do if LRO or RSC are not enabled */
2398     if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) ||
2399         !(netdev->features & NETIF_F_LRO))
2400         return false;
2401
2402     /* check the feature flag value and enable RSC if necessary */
2403     if (adapter->rx_itr_setting == 1 ||
2404         adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
2405         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
2406             adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
2407             e_info(probe, "rx-usecs value high enough to re-enable RSC\n");
2408             return true;
2409         }
2410     /* if interrupt rate is too high then disable RSC */
2411     } else if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
2412         adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
2413         e_info(probe, "rx-usecs set too low, disabling RSC\n");
2414         return true;
2415     }
2416     return false;
2417 }
2418
2419 static int ixgbe_set_coalesce(struct net_device *netdev,
2420                   struct ethtool_coalesce *ec,
2421                   struct kernel_ethtool_coalesce *kernel_coal,
2422                   struct netlink_ext_ack *extack)
2423 {
2424     struct ixgbe_adapter *adapter = netdev_priv(netdev);
2425     struct ixgbe_q_vector *q_vector;
2426     int i;
2427     u16 tx_itr_param, rx_itr_param, tx_itr_prev;
2428     bool need_reset = false;
2429
2430     if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count) {
2431         /* reject Tx specific changes in case of mixed RxTx vectors */
2432         if (ec->tx_coalesce_usecs)
2433             return -EINVAL;
2434         tx_itr_prev = adapter->rx_itr_setting;
2435     } else {
2436         tx_itr_prev = adapter->tx_itr_setting;
2437     }
2438
2439     if ((ec->rx_coalesce_usecs > (IXGBE_MAX_EITR >> 2)) ||
2440         (ec->tx_coalesce_usecs > (IXGBE_MAX_EITR >> 2)))
2441         return -EINVAL;
2442
2443     if (ec->rx_coalesce_usecs > 1)
2444         adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2;
2445     else
2446         adapter->rx_itr_setting = ec->rx_coalesce_usecs;
2447
2448     if (adapter->rx_itr_setting == 1)
2449         rx_itr_param = IXGBE_20K_ITR;
2450     else
2451         rx_itr_param = adapter->rx_itr_setting;
2452
2453     if (ec->tx_coalesce_usecs > 1)
2454         adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2;
2455     else
2456         adapter->tx_itr_setting = ec->tx_coalesce_usecs;
2457
2458     if (adapter->tx_itr_setting == 1)
2459         tx_itr_param = IXGBE_12K_ITR;
2460     else
2461         tx_itr_param = adapter->tx_itr_setting;
2462
2463     /* mixed Rx/Tx */
2464     if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count)
2465         adapter->tx_itr_setting = adapter->rx_itr_setting;
2466
2467     /* detect ITR changes that require update of TXDCTL.WTHRESH */
2468     if ((adapter->tx_itr_setting != 1) &&
2469         (adapter->tx_itr_setting < IXGBE_100K_ITR)) {
2470         if ((tx_itr_prev == 1) ||
2471             (tx_itr_prev >= IXGBE_100K_ITR))
2472             need_reset = true;
2473     } else {
2474         if ((tx_itr_prev != 1) &&
2475             (tx_itr_prev < IXGBE_100K_ITR))
2476             need_reset = true;
2477     }
2478
2479     /* check the old value and enable RSC if necessary */
2480     need_reset |= ixgbe_update_rsc(adapter);
2481
2482     for (i = 0; i < adapter->num_q_vectors; i++) {
2483         q_vector = adapter->q_vector[i];
2484         if (q_vector->tx.count && !q_vector->rx.count)
2485             /* tx only */
2486             q_vector->itr = tx_itr_param;
2487         else
2488             /* rx only or mixed */
2489             q_vector->itr = rx_itr_param;
2490         ixgbe_write_eitr(q_vector);
2491     }
2492
2493     /*
2494      * do reset here at the end to make sure EITR==0 case is handled
2495      * correctly w.r.t stopping tx, and changing TXDCTL.WTHRESH settings
2496      * also locks in RSC enable/disable which requires reset
2497      */
2498     if (need_reset)
2499         ixgbe_do_reset(netdev);
2500
2501     return 0;
2502 }
2503
2504 static int ixgbe_get_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2505                     struct ethtool_rxnfc *cmd)
2506 {
2507     union ixgbe_atr_input *mask = &adapter->fdir_mask;
2508     struct ethtool_rx_flow_spec *fsp =
2509         (struct ethtool_rx_flow_spec *)&cmd->fs;
2510     struct hlist_node *node2;
2511     struct ixgbe_fdir_filter *rule = NULL;
2512
2513     /* report total rule count */
2514     cmd->data = (1024 << adapter->fdir_pballoc) - 2;
2515
2516     hlist_for_each_entry_safe(rule, node2,
2517                   &adapter->fdir_filter_list, fdir_node) {
2518         if (fsp->location <= rule->sw_idx)
2519             break;
2520     }
2521
2522     if (!rule || fsp->location != rule->sw_idx)
2523         return -EINVAL;
2524
2525     /* fill out the flow spec entry */
2526
2527     /* set flow type field */
2528     switch (rule->filter.formatted.flow_type) {
2529     case IXGBE_ATR_FLOW_TYPE_TCPV4:
2530         fsp->flow_type = TCP_V4_FLOW;
2531         break;
2532     case IXGBE_ATR_FLOW_TYPE_UDPV4:
2533         fsp->flow_type = UDP_V4_FLOW;
2534         break;
2535     case IXGBE_ATR_FLOW_TYPE_SCTPV4:
2536         fsp->flow_type = SCTP_V4_FLOW;
2537         break;
2538     case IXGBE_ATR_FLOW_TYPE_IPV4:
2539         fsp->flow_type = IP_USER_FLOW;
2540         fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4;
2541         fsp->h_u.usr_ip4_spec.proto = 0;
2542         fsp->m_u.usr_ip4_spec.proto = 0;
2543         break;
2544     default:
2545         return -EINVAL;
2546     }
2547
2548     fsp->h_u.tcp_ip4_spec.psrc = rule->filter.formatted.src_port;
2549     fsp->m_u.tcp_ip4_spec.psrc = mask->formatted.src_port;
2550     fsp->h_u.tcp_ip4_spec.pdst = rule->filter.formatted.dst_port;
2551     fsp->m_u.tcp_ip4_spec.pdst = mask->formatted.dst_port;
2552     fsp->h_u.tcp_ip4_spec.ip4src = rule->filter.formatted.src_ip[0];
2553     fsp->m_u.tcp_ip4_spec.ip4src = mask->formatted.src_ip[0];
2554     fsp->h_u.tcp_ip4_spec.ip4dst = rule->filter.formatted.dst_ip[0];
2555     fsp->m_u.tcp_ip4_spec.ip4dst = mask->formatted.dst_ip[0];
2556     fsp->h_ext.vlan_tci = rule->filter.formatted.vlan_id;
2557     fsp->m_ext.vlan_tci = mask->formatted.vlan_id;
2558     fsp->h_ext.vlan_etype = rule->filter.formatted.flex_bytes;
2559     fsp->m_ext.vlan_etype = mask->formatted.flex_bytes;
2560     fsp->h_ext.data[1] = htonl(rule->filter.formatted.vm_pool);
2561     fsp->m_ext.data[1] = htonl(mask->formatted.vm_pool);
2562     fsp->flow_type |= FLOW_EXT;
2563
2564     /* record action */
2565     if (rule->action == IXGBE_FDIR_DROP_QUEUE)
2566         fsp->ring_cookie = RX_CLS_FLOW_DISC;
2567     else
2568         fsp->ring_cookie = rule->action;
2569
2570     return 0;
2571 }
2572
2573 static int ixgbe_get_ethtool_fdir_all(struct ixgbe_adapter *adapter,
2574                       struct ethtool_rxnfc *cmd,
2575                       u32 *rule_locs)
2576 {
2577     struct hlist_node *node2;
2578     struct ixgbe_fdir_filter *rule;
2579     int cnt = 0;
2580
2581     /* report total rule count */
2582     cmd->data = (1024 << adapter->fdir_pballoc) - 2;
2583
2584     hlist_for_each_entry_safe(rule, node2,
2585                   &adapter->fdir_filter_list, fdir_node) {
2586         if (cnt == cmd->rule_cnt)
2587             return -EMSGSIZE;
2588         rule_locs[cnt] = rule->sw_idx;
2589         cnt++;
2590     }
2591
2592     cmd->rule_cnt = cnt;
2593
2594     return 0;
2595 }
2596
2597 static int ixgbe_get_rss_hash_opts(struct ixgbe_adapter *adapter,
2598                    struct ethtool_rxnfc *cmd)
2599 {
2600     cmd->data = 0;
2601
2602     /* Report default options for RSS on ixgbe */
2603     switch (cmd->flow_type) {
2604     case TCP_V4_FLOW:
2605         cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2606         fallthrough;
2607     case UDP_V4_FLOW:
2608         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
2609             cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2610         fallthrough;
2611     case SCTP_V4_FLOW:
2612     case AH_ESP_V4_FLOW:
2613     case AH_V4_FLOW:
2614     case ESP_V4_FLOW:
2615     case IPV4_FLOW:
2616         cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2617         break;
2618     case TCP_V6_FLOW:
2619         cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2620         fallthrough;
2621     case UDP_V6_FLOW:
2622         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2623             cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2624         fallthrough;
2625     case SCTP_V6_FLOW:
2626     case AH_ESP_V6_FLOW:
2627     case AH_V6_FLOW:
2628     case ESP_V6_FLOW:
2629     case IPV6_FLOW:
2630         cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2631         break;
2632     default:
2633         return -EINVAL;
2634     }
2635
2636     return 0;
2637 }
2638
2639 static int ixgbe_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
2640                u32 *rule_locs)
2641 {
2642     struct ixgbe_adapter *adapter = netdev_priv(dev);
2643     int ret = -EOPNOTSUPP;
2644
2645     switch (cmd->cmd) {
2646     case ETHTOOL_GRXRINGS:
2647         cmd->data = adapter->num_rx_queues;
2648         ret = 0;
2649         break;
2650     case ETHTOOL_GRXCLSRLCNT:
2651         cmd->rule_cnt = adapter->fdir_filter_count;
2652         ret = 0;
2653         break;
2654     case ETHTOOL_GRXCLSRULE:
2655         ret = ixgbe_get_ethtool_fdir_entry(adapter, cmd);
2656         break;
2657     case ETHTOOL_GRXCLSRLALL:
2658         ret = ixgbe_get_ethtool_fdir_all(adapter, cmd, rule_locs);
2659         break;
2660     case ETHTOOL_GRXFH:
2661         ret = ixgbe_get_rss_hash_opts(adapter, cmd);
2662         break;
2663     default:
2664         break;
2665     }
2666
2667     return ret;
2668 }
2669
2670 int ixgbe_update_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2671                     struct ixgbe_fdir_filter *input,
2672                     u16 sw_idx)
2673 {
2674     struct ixgbe_hw *hw = &adapter->hw;
2675     struct hlist_node *node2;
2676     struct ixgbe_fdir_filter *rule, *parent;
2677     int err = -EINVAL;
2678
2679     parent = NULL;
2680     rule = NULL;
2681
2682     hlist_for_each_entry_safe(rule, node2,
2683                   &adapter->fdir_filter_list, fdir_node) {
2684         /* hash found, or no matching entry */
2685         if (rule->sw_idx >= sw_idx)
2686             break;
2687         parent = rule;
2688     }
2689
2690     /* if there is an old rule occupying our place remove it */
2691     if (rule && (rule->sw_idx == sw_idx)) {
2692         if (!input || (rule->filter.formatted.bkt_hash !=
2693                    input->filter.formatted.bkt_hash)) {
2694             err = ixgbe_fdir_erase_perfect_filter_82599(hw,
2695                                 &rule->filter,
2696                                 sw_idx);
2697         }
2698
2699         hlist_del(&rule->fdir_node);
2700         kfree(rule);
2701         adapter->fdir_filter_count--;
2702     }
2703
2704     /*
2705      * If no input this was a delete, err should be 0 if a rule was
2706      * successfully found and removed from the list else -EINVAL
2707      */
2708     if (!input)
2709         return err;
2710
2711     /* initialize node and set software index */
2712     INIT_HLIST_NODE(&input->fdir_node);
2713
2714     /* add filter to the list */
2715     if (parent)
2716         hlist_add_behind(&input->fdir_node, &parent->fdir_node);
2717     else
2718         hlist_add_head(&input->fdir_node,
2719                    &adapter->fdir_filter_list);
2720
2721     /* update counts */
2722     adapter->fdir_filter_count++;
2723
2724     return 0;
2725 }
2726
2727 static int ixgbe_flowspec_to_flow_type(struct ethtool_rx_flow_spec *fsp,
2728                        u8 *flow_type)
2729 {
2730     switch (fsp->flow_type & ~FLOW_EXT) {
2731     case TCP_V4_FLOW:
2732         *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
2733         break;
2734     case UDP_V4_FLOW:
2735         *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4;
2736         break;
2737     case SCTP_V4_FLOW:
2738         *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4;
2739         break;
2740     case IP_USER_FLOW:
2741         switch (fsp->h_u.usr_ip4_spec.proto) {
2742         case IPPROTO_TCP:
2743             *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
2744             break;
2745         case IPPROTO_UDP:
2746             *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4;
2747             break;
2748         case IPPROTO_SCTP:
2749             *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4;
2750             break;
2751         case 0:
2752             if (!fsp->m_u.usr_ip4_spec.proto) {
2753                 *flow_type = IXGBE_ATR_FLOW_TYPE_IPV4;
2754                 break;
2755             }
2756             fallthrough;
2757         default:
2758             return 0;
2759         }
2760         break;
2761     default:
2762         return 0;
2763     }
2764
2765     return 1;
2766 }
2767
2768 static int ixgbe_add_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2769                     struct ethtool_rxnfc *cmd)
2770 {
2771     struct ethtool_rx_flow_spec *fsp =
2772         (struct ethtool_rx_flow_spec *)&cmd->fs;
2773     struct ixgbe_hw *hw = &adapter->hw;
2774     struct ixgbe_fdir_filter *input;
2775     union ixgbe_atr_input mask;
2776     u8 queue;
2777     int err;
2778
2779     if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
2780         return -EOPNOTSUPP;
2781
2782     /* ring_cookie is a masked into a set of queues and ixgbe pools or
2783      * we use the drop index.
2784      */
2785     if (fsp->ring_cookie == RX_CLS_FLOW_DISC) {
2786         queue = IXGBE_FDIR_DROP_QUEUE;
2787     } else {
2788         u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie);
2789         u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie);
2790
2791         if (!vf && (ring >= adapter->num_rx_queues))
2792             return -EINVAL;
2793         else if (vf &&
2794              ((vf > adapter->num_vfs) ||
2795                ring >= adapter->num_rx_queues_per_pool))
2796             return -EINVAL;
2797
2798         /* Map the ring onto the absolute queue index */
2799         if (!vf)
2800             queue = adapter->rx_ring[ring]->reg_idx;
2801         else
2802             queue = ((vf - 1) *
2803                 adapter->num_rx_queues_per_pool) + ring;
2804     }
2805
2806     /* Don't allow indexes to exist outside of available space */
2807     if (fsp->location >= ((1024 << adapter->fdir_pballoc) - 2)) {
2808         e_err(drv, "Location out of range\n");
2809         return -EINVAL;
2810     }
2811
2812     input = kzalloc(sizeof(*input), GFP_ATOMIC);
2813     if (!input)
2814         return -ENOMEM;
2815
2816     memset(&mask, 0, sizeof(union ixgbe_atr_input));
2817
2818     /* set SW index */
2819     input->sw_idx = fsp->location;
2820
2821     /* record flow type */
2822     if (!ixgbe_flowspec_to_flow_type(fsp,
2823                      &input->filter.formatted.flow_type)) {
2824         e_err(drv, "Unrecognized flow type\n");
2825         goto err_out;
2826     }
2827
2828     mask.formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
2829                    IXGBE_ATR_L4TYPE_MASK;
2830
2831     if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
2832         mask.formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
2833
2834     /* Copy input into formatted structures */
2835     input->filter.formatted.src_ip[0] = fsp->h_u.tcp_ip4_spec.ip4src;
2836     mask.formatted.src_ip[0] = fsp->m_u.tcp_ip4_spec.ip4src;
2837     input->filter.formatted.dst_ip[0] = fsp->h_u.tcp_ip4_spec.ip4dst;
2838     mask.formatted.dst_ip[0] = fsp->m_u.tcp_ip4_spec.ip4dst;
2839     input->filter.formatted.src_port = fsp->h_u.tcp_ip4_spec.psrc;
2840     mask.formatted.src_port = fsp->m_u.tcp_ip4_spec.psrc;
2841     input->filter.formatted.dst_port = fsp->h_u.tcp_ip4_spec.pdst;
2842     mask.formatted.dst_port = fsp->m_u.tcp_ip4_spec.pdst;
2843
2844     if (fsp->flow_type & FLOW_EXT) {
2845         input->filter.formatted.vm_pool =
2846                 (unsigned char)ntohl(fsp->h_ext.data[1]);
2847         mask.formatted.vm_pool =
2848                 (unsigned char)ntohl(fsp->m_ext.data[1]);
2849         input->filter.formatted.vlan_id = fsp->h_ext.vlan_tci;
2850         mask.formatted.vlan_id = fsp->m_ext.vlan_tci;
2851         input->filter.formatted.flex_bytes =
2852                         fsp->h_ext.vlan_etype;
2853         mask.formatted.flex_bytes = fsp->m_ext.vlan_etype;
2854     }
2855
2856     /* determine if we need to drop or route the packet */
2857     if (fsp->ring_cookie == RX_CLS_FLOW_DISC)
2858         input->action = IXGBE_FDIR_DROP_QUEUE;
2859     else
2860         input->action = fsp->ring_cookie;
2861
2862     spin_lock(&adapter->fdir_perfect_lock);
2863
2864     if (hlist_empty(&adapter->fdir_filter_list)) {
2865         /* save mask and program input mask into HW */
2866         memcpy(&adapter->fdir_mask, &mask, sizeof(mask));
2867         err = ixgbe_fdir_set_input_mask_82599(hw, &mask);
2868         if (err) {
2869             e_err(drv, "Error writing mask\n");
2870             goto err_out_w_lock;
2871         }
2872     } else if (memcmp(&adapter->fdir_mask, &mask, sizeof(mask))) {
2873         e_err(drv, "Only one mask supported per port\n");
2874         goto err_out_w_lock;
2875     }
2876
2877     /* apply mask and compute/store hash */
2878     ixgbe_atr_compute_perfect_hash_82599(&input->filter, &mask);
2879
2880     /* program filters to filter memory */
2881     err = ixgbe_fdir_write_perfect_filter_82599(hw,
2882                 &input->filter, input->sw_idx, queue);
2883     if (err)
2884         goto err_out_w_lock;
2885
2886     ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
2887
2888     spin_unlock(&adapter->fdir_perfect_lock);
2889
2890     return err;
2891 err_out_w_lock:
2892     spin_unlock(&adapter->fdir_perfect_lock);
2893 err_out:
2894     kfree(input);
2895     return -EINVAL;
2896 }
2897
2898 static int ixgbe_del_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2899                     struct ethtool_rxnfc *cmd)
2900 {
2901     struct ethtool_rx_flow_spec *fsp =
2902         (struct ethtool_rx_flow_spec *)&cmd->fs;
2903     int err;
2904
2905     spin_lock(&adapter->fdir_perfect_lock);
2906     err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, fsp->location);
2907     spin_unlock(&adapter->fdir_perfect_lock);
2908
2909     return err;
2910 }
2911
2912 #define UDP_RSS_FLAGS (IXGBE_FLAG2_RSS_FIELD_IPV4_UDP | \
2913                IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2914 static int ixgbe_set_rss_hash_opt(struct ixgbe_adapter *adapter,
2915                   struct ethtool_rxnfc *nfc)
2916 {
2917     u32 flags2 = adapter->flags2;
2918
2919     /*
2920      * RSS does not support anything other than hashing
2921      * to queues on src and dst IPs and ports
2922      */
2923     if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
2924               RXH_L4_B_0_1 | RXH_L4_B_2_3))
2925         return -EINVAL;
2926
2927     switch (nfc->flow_type) {
2928     case TCP_V4_FLOW:
2929     case TCP_V6_FLOW:
2930         if (!(nfc->data & RXH_IP_SRC) ||
2931             !(nfc->data & RXH_IP_DST) ||
2932             !(nfc->data & RXH_L4_B_0_1) ||
2933             !(nfc->data & RXH_L4_B_2_3))
2934             return -EINVAL;
2935         break;
2936     case UDP_V4_FLOW:
2937         if (!(nfc->data & RXH_IP_SRC) ||
2938             !(nfc->data & RXH_IP_DST))
2939             return -EINVAL;
2940         switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2941         case 0:
2942             flags2 &= ~IXGBE_FLAG2_RSS_FIELD_IPV4_UDP;
2943             break;
2944         case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2945             flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV4_UDP;
2946             break;
2947         default:
2948             return -EINVAL;
2949         }
2950         break;
2951     case UDP_V6_FLOW:
2952         if (!(nfc->data & RXH_IP_SRC) ||
2953             !(nfc->data & RXH_IP_DST))
2954             return -EINVAL;
2955         switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2956         case 0:
2957             flags2 &= ~IXGBE_FLAG2_RSS_FIELD_IPV6_UDP;
2958             break;
2959         case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2960             flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV6_UDP;
2961             break;
2962         default:
2963             return -EINVAL;
2964         }
2965         break;
2966     case AH_ESP_V4_FLOW:
2967     case AH_V4_FLOW:
2968     case ESP_V4_FLOW:
2969     case SCTP_V4_FLOW:
2970     case AH_ESP_V6_FLOW:
2971     case AH_V6_FLOW:
2972     case ESP_V6_FLOW:
2973     case SCTP_V6_FLOW:
2974         if (!(nfc->data & RXH_IP_SRC) ||
2975             !(nfc->data & RXH_IP_DST) ||
2976             (nfc->data & RXH_L4_B_0_1) ||
2977             (nfc->data & RXH_L4_B_2_3))
2978             return -EINVAL;
2979         break;
2980     default:
2981         return -EINVAL;
2982     }
2983
2984     /* if we changed something we need to update flags */
2985     if (flags2 != adapter->flags2) {
2986         struct ixgbe_hw *hw = &adapter->hw;
2987         u32 mrqc;
2988         unsigned int pf_pool = adapter->num_vfs;
2989
2990         if ((hw->mac.type >= ixgbe_mac_X550) &&
2991             (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
2992             mrqc = IXGBE_READ_REG(hw, IXGBE_PFVFMRQC(pf_pool));
2993         else
2994             mrqc = IXGBE_READ_REG(hw, IXGBE_MRQC);
2995
2996         if ((flags2 & UDP_RSS_FLAGS) &&
2997             !(adapter->flags2 & UDP_RSS_FLAGS))
2998             e_warn(drv, "enabling UDP RSS: fragmented packets may arrive out of order to the stack above\n");
2999
3000         adapter->flags2 = flags2;
3001
3002         /* Perform hash on these packet types */
3003         mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4
3004               | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
3005               | IXGBE_MRQC_RSS_FIELD_IPV6
3006               | IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3007
3008         mrqc &= ~(IXGBE_MRQC_RSS_FIELD_IPV4_UDP |
3009               IXGBE_MRQC_RSS_FIELD_IPV6_UDP);
3010
3011         if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3012             mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3013
3014         if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3015             mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3016
3017         if ((hw->mac.type >= ixgbe_mac_X550) &&
3018             (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3019             IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), mrqc);
3020         else
3021             IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3022     }
3023
3024     return 0;
3025 }
3026
3027 static int ixgbe_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
3028 {
3029     struct ixgbe_adapter *adapter = netdev_priv(dev);
3030     int ret = -EOPNOTSUPP;
3031
3032     switch (cmd->cmd) {
3033     case ETHTOOL_SRXCLSRLINS:
3034         ret = ixgbe_add_ethtool_fdir_entry(adapter, cmd);
3035         break;
3036     case ETHTOOL_SRXCLSRLDEL:
3037         ret = ixgbe_del_ethtool_fdir_entry(adapter, cmd);
3038         break;
3039     case ETHTOOL_SRXFH:
3040         ret = ixgbe_set_rss_hash_opt(adapter, cmd);
3041         break;
3042     default:
3043         break;
3044     }
3045
3046     return ret;
3047 }
3048
3049 static int ixgbe_rss_indir_tbl_max(struct ixgbe_adapter *adapter)
3050 {
3051     if (adapter->hw.mac.type < ixgbe_mac_X550)
3052         return 16;
3053     else
3054         return 64;
3055 }
3056
3057 static u32 ixgbe_get_rxfh_key_size(struct net_device *netdev)
3058 {
3059     return IXGBE_RSS_KEY_SIZE;
3060 }
3061
3062 static u32 ixgbe_rss_indir_size(struct net_device *netdev)
3063 {
3064     struct ixgbe_adapter *adapter = netdev_priv(netdev);
3065
3066     return ixgbe_rss_indir_tbl_entries(adapter);
3067 }
3068
3069 static void ixgbe_get_reta(struct ixgbe_adapter *adapter, u32 *indir)
3070 {
3071     int i, reta_size = ixgbe_rss_indir_tbl_entries(adapter);
3072     u16 rss_m = adapter->ring_feature[RING_F_RSS].mask;
3073
3074     if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3075         rss_m = adapter->ring_feature[RING_F_RSS].indices - 1;
3076
3077     for (i = 0; i < reta_size; i++)
3078         indir[i] = adapter->rss_indir_tbl[i] & rss_m;
3079 }
3080
3081 static int ixgbe_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
3082               u8 *hfunc)
3083 {
3084     struct ixgbe_adapter *adapter = netdev_priv(netdev);
3085
3086     if (hfunc)
3087         *hfunc = ETH_RSS_HASH_TOP;
3088
3089     if (indir)
3090         ixgbe_get_reta(adapter, indir);
3091
3092     if (key)
3093         memcpy(key, adapter->rss_key, ixgbe_get_rxfh_key_size(netdev));
3094
3095     return 0;
3096 }
3097
3098 static int ixgbe_set_rxfh(struct net_device *netdev, const u32 *indir,
3099               const u8 *key, const u8 hfunc)
3100 {
3101     struct ixgbe_adapter *adapter = netdev_priv(netdev);
3102     int i;
3103     u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3104
3105     if (hfunc)
3106         return -EINVAL;
3107
3108     /* Fill out the redirection table */
3109     if (indir) {
3110         int max_queues = min_t(int, adapter->num_rx_queues,
3111                        ixgbe_rss_indir_tbl_max(adapter));
3112
3113         /*Allow at least 2 queues w/ SR-IOV.*/
3114         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
3115             (max_queues < 2))
3116             max_queues = 2;
3117
3118         /* Verify user input. */
3119         for (i = 0; i < reta_entries; i++)
3120             if (indir[i] >= max_queues)
3121                 return -EINVAL;
3122
3123         for (i = 0; i < reta_entries; i++)
3124             adapter->rss_indir_tbl[i] = indir[i];
3125
3126         ixgbe_store_reta(adapter);
3127     }
3128
3129     /* Fill out the rss hash key */
3130     if (key) {
3131         memcpy(adapter->rss_key, key, ixgbe_get_rxfh_key_size(netdev));
3132         ixgbe_store_key(adapter);
3133     }
3134
3135     return 0;
3136 }
3137
3138 static int ixgbe_get_ts_info(struct net_device *dev,
3139                  struct ethtool_ts_info *info)
3140 {
3141     struct ixgbe_adapter *adapter = netdev_priv(dev);
3142
3143     /* we always support timestamping disabled */
3144     info->rx_filters = BIT(HWTSTAMP_FILTER_NONE);
3145
3146     switch (adapter->hw.mac.type) {
3147     case ixgbe_mac_X550:
3148     case ixgbe_mac_X550EM_x:
3149     case ixgbe_mac_x550em_a:
3150         info->rx_filters |= BIT(HWTSTAMP_FILTER_ALL);
3151         break;
3152     case ixgbe_mac_X540:
3153     case ixgbe_mac_82599EB:
3154         info->rx_filters |=
3155             BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
3156             BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
3157             BIT(HWTSTAMP_FILTER_PTP_V2_EVENT);
3158         break;
3159     default:
3160         return ethtool_op_get_ts_info(dev, info);
3161     }
3162
3163     info->so_timestamping =
3164         SOF_TIMESTAMPING_TX_SOFTWARE |
3165         SOF_TIMESTAMPING_RX_SOFTWARE |
3166         SOF_TIMESTAMPING_SOFTWARE |
3167         SOF_TIMESTAMPING_TX_HARDWARE |
3168         SOF_TIMESTAMPING_RX_HARDWARE |
3169         SOF_TIMESTAMPING_RAW_HARDWARE;
3170
3171     if (adapter->ptp_clock)
3172         info->phc_index = ptp_clock_index(adapter->ptp_clock);
3173     else
3174         info->phc_index = -1;
3175
3176     info->tx_types =
3177         BIT(HWTSTAMP_TX_OFF) |
3178         BIT(HWTSTAMP_TX_ON);
3179
3180     return 0;
3181 }
3182
3183 static unsigned int ixgbe_max_channels(struct ixgbe_adapter *adapter)
3184 {
3185     unsigned int max_combined;
3186     u8 tcs = adapter->hw_tcs;
3187
3188     if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3189         /* We only support one q_vector without MSI-X */
3190         max_combined = 1;
3191     } else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3192         /* Limit value based on the queue mask */
3193         max_combined = adapter->ring_feature[RING_F_RSS].mask + 1;
3194     } else if (tcs > 1) {
3195         /* For DCB report channels per traffic class */
3196         if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3197             /* 8 TC w/ 4 queues per TC */
3198             max_combined = 4;
3199         } else if (tcs > 4) {
3200             /* 8 TC w/ 8 queues per TC */
3201             max_combined = 8;
3202         } else {
3203             /* 4 TC w/ 16 queues per TC */
3204             max_combined = 16;
3205         }
3206     } else if (adapter->atr_sample_rate) {
3207         /* support up to 64 queues with ATR */
3208         max_combined = IXGBE_MAX_FDIR_INDICES;
3209     } else {
3210         /* support up to 16 queues with RSS */
3211         max_combined = ixgbe_max_rss_indices(adapter);
3212     }
3213
3214     return min_t(int, max_combined, num_online_cpus());
3215 }
3216
3217 static void ixgbe_get_channels(struct net_device *dev,
3218                    struct ethtool_channels *ch)
3219 {
3220     struct ixgbe_adapter *adapter = netdev_priv(dev);
3221
3222     /* report maximum channels */
3223     ch->max_combined = ixgbe_max_channels(adapter);
3224
3225     /* report info for other vector */
3226     if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3227         ch->max_other = NON_Q_VECTORS;
3228         ch->other_count = NON_Q_VECTORS;
3229     }
3230
3231     /* record RSS queues */
3232     ch->combined_count = adapter->ring_feature[RING_F_RSS].indices;
3233
3234     /* nothing else to report if RSS is disabled */
3235     if (ch->combined_count == 1)
3236         return;
3237
3238     /* we do not support ATR queueing if SR-IOV is enabled */
3239     if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3240         return;
3241
3242     /* same thing goes for being DCB enabled */
3243     if (adapter->hw_tcs > 1)
3244         return;
3245
3246     /* if ATR is disabled we can exit */
3247     if (!adapter->atr_sample_rate)
3248         return;
3249
3250     /* report flow director queues as maximum channels */
3251     ch->combined_count = adapter->ring_feature[RING_F_FDIR].indices;
3252 }
3253
3254 static int ixgbe_set_channels(struct net_device *dev,
3255                   struct ethtool_channels *ch)
3256 {
3257     struct ixgbe_adapter *adapter = netdev_priv(dev);
3258     unsigned int count = ch->combined_count;
3259     u8 max_rss_indices = ixgbe_max_rss_indices(adapter);
3260
3261     /* verify they are not requesting separate vectors */
3262     if (!count || ch->rx_count || ch->tx_count)
3263         return -EINVAL;
3264
3265     /* verify other_count has not changed */
3266     if (ch->other_count != NON_Q_VECTORS)
3267         return -EINVAL;
3268
3269     /* verify the number of channels does not exceed hardware limits */
3270     if (count > ixgbe_max_channels(adapter))
3271         return -EINVAL;
3272
3273     /* update feature limits from largest to smallest supported values */
3274     adapter->ring_feature[RING_F_FDIR].limit = count;
3275
3276     /* cap RSS limit */
3277     if (count > max_rss_indices)
3278         count = max_rss_indices;
3279     adapter->ring_feature[RING_F_RSS].limit = count;
3280
3281 #ifdef IXGBE_FCOE
3282     /* cap FCoE limit at 8 */
3283     if (count > IXGBE_FCRETA_SIZE)
3284         count = IXGBE_FCRETA_SIZE;
3285     adapter->ring_feature[RING_F_FCOE].limit = count;
3286
3287 #endif
3288     /* use setup TC to update any traffic class queue mapping */
3289     return ixgbe_setup_tc(dev, adapter->hw_tcs);
3290 }
3291
3292 static int ixgbe_get_module_info(struct net_device *dev,
3293                        struct ethtool_modinfo *modinfo)
3294 {
3295     struct ixgbe_adapter *adapter = netdev_priv(dev);
3296     struct ixgbe_hw *hw = &adapter->hw;
3297     s32 status;
3298     u8 sff8472_rev, addr_mode;
3299     bool page_swap = false;
3300
3301     if (hw->phy.type == ixgbe_phy_fw)
3302         return -ENXIO;
3303
3304     /* Check whether we support SFF-8472 or not */
3305     status = hw->phy.ops.read_i2c_eeprom(hw,
3306                          IXGBE_SFF_SFF_8472_COMP,
3307                          &sff8472_rev);
3308     if (status)
3309         return -EIO;
3310
3311     /* addressing mode is not supported */
3312     status = hw->phy.ops.read_i2c_eeprom(hw,
3313                          IXGBE_SFF_SFF_8472_SWAP,
3314                          &addr_mode);
3315     if (status)
3316         return -EIO;
3317
3318     if (addr_mode & IXGBE_SFF_ADDRESSING_MODE) {
3319         e_err(drv, "Address change required to access page 0xA2, but not supported. Please report the module type to the driver maintainers.\n");
3320         page_swap = true;
3321     }
3322
3323     if (sff8472_rev == IXGBE_SFF_SFF_8472_UNSUP || page_swap ||
3324         !(addr_mode & IXGBE_SFF_DDM_IMPLEMENTED)) {
3325         /* We have a SFP, but it does not support SFF-8472 */
3326         modinfo->type = ETH_MODULE_SFF_8079;
3327         modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
3328     } else {
3329         /* We have a SFP which supports a revision of SFF-8472. */
3330         modinfo->type = ETH_MODULE_SFF_8472;
3331         modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
3332     }
3333
3334     return 0;
3335 }
3336
3337 static int ixgbe_get_module_eeprom(struct net_device *dev,
3338                      struct ethtool_eeprom *ee,
3339                      u8 *data)
3340 {
3341     struct ixgbe_adapter *adapter = netdev_priv(dev);
3342     struct ixgbe_hw *hw = &adapter->hw;
3343     s32 status = IXGBE_ERR_PHY_ADDR_INVALID;
3344     u8 databyte = 0xFF;
3345     int i = 0;
3346
3347     if (ee->len == 0)
3348         return -EINVAL;
3349
3350     if (hw->phy.type == ixgbe_phy_fw)
3351         return -ENXIO;
3352
3353     for (i = ee->offset; i < ee->offset + ee->len; i++) {
3354         /* I2C reads can take long time */
3355         if (test_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
3356             return -EBUSY;
3357
3358         if (i < ETH_MODULE_SFF_8079_LEN)
3359             status = hw->phy.ops.read_i2c_eeprom(hw, i, &databyte);
3360         else
3361             status = hw->phy.ops.read_i2c_sff8472(hw, i, &databyte);
3362
3363         if (status)
3364             return -EIO;
3365
3366         data[i - ee->offset] = databyte;
3367     }
3368
3369     return 0;
3370 }
3371
3372 static const struct {
3373     ixgbe_link_speed mac_speed;
3374     u32 supported;
3375 } ixgbe_ls_map[] = {
3376     { IXGBE_LINK_SPEED_10_FULL, SUPPORTED_10baseT_Full },
3377     { IXGBE_LINK_SPEED_100_FULL, SUPPORTED_100baseT_Full },
3378     { IXGBE_LINK_SPEED_1GB_FULL, SUPPORTED_1000baseT_Full },
3379     { IXGBE_LINK_SPEED_2_5GB_FULL, SUPPORTED_2500baseX_Full },
3380     { IXGBE_LINK_SPEED_10GB_FULL, SUPPORTED_10000baseT_Full },
3381 };
3382
3383 static const struct {
3384     u32 lp_advertised;
3385     u32 mac_speed;
3386 } ixgbe_lp_map[] = {
3387     { FW_PHY_ACT_UD_2_100M_TX_EEE, SUPPORTED_100baseT_Full },
3388     { FW_PHY_ACT_UD_2_1G_T_EEE, SUPPORTED_1000baseT_Full },
3389     { FW_PHY_ACT_UD_2_10G_T_EEE, SUPPORTED_10000baseT_Full },
3390     { FW_PHY_ACT_UD_2_1G_KX_EEE, SUPPORTED_1000baseKX_Full },
3391     { FW_PHY_ACT_UD_2_10G_KX4_EEE, SUPPORTED_10000baseKX4_Full },
3392     { FW_PHY_ACT_UD_2_10G_KR_EEE, SUPPORTED_10000baseKR_Full},
3393 };
3394
3395 static int
3396 ixgbe_get_eee_fw(struct ixgbe_adapter *adapter, struct ethtool_eee *edata)
3397 {
3398     u32 info[FW_PHY_ACT_DATA_COUNT] = { 0 };
3399     struct ixgbe_hw *hw = &adapter->hw;
3400     s32 rc;
3401     u16 i;
3402
3403     rc = ixgbe_fw_phy_activity(hw, FW_PHY_ACT_UD_2, &info);
3404     if (rc)
3405         return rc;
3406
3407     edata->lp_advertised = 0;
3408     for (i = 0; i < ARRAY_SIZE(ixgbe_lp_map); ++i) {
3409         if (info[0] & ixgbe_lp_map[i].lp_advertised)
3410             edata->lp_advertised |= ixgbe_lp_map[i].mac_speed;
3411     }
3412
3413     edata->supported = 0;
3414     for (i = 0; i < ARRAY_SIZE(ixgbe_ls_map); ++i) {
3415         if (hw->phy.eee_speeds_supported & ixgbe_ls_map[i].mac_speed)
3416             edata->supported |= ixgbe_ls_map[i].supported;
3417     }
3418
3419     edata->advertised = 0;
3420     for (i = 0; i < ARRAY_SIZE(ixgbe_ls_map); ++i) {
3421         if (hw->phy.eee_speeds_advertised & ixgbe_ls_map[i].mac_speed)
3422             edata->advertised |= ixgbe_ls_map[i].supported;
3423     }
3424
3425     edata->eee_enabled = !!edata->advertised;
3426     edata->tx_lpi_enabled = edata->eee_enabled;
3427     if (edata->advertised & edata->lp_advertised)
3428         edata->eee_active = true;
3429
3430     return 0;
3431 }
3432
3433 static int ixgbe_get_eee(struct net_device *netdev, struct ethtool_eee *edata)
3434 {
3435     struct ixgbe_adapter *adapter = netdev_priv(netdev);
3436     struct ixgbe_hw *hw = &adapter->hw;
3437
3438     if (!(adapter->flags2 & IXGBE_FLAG2_EEE_CAPABLE))
3439         return -EOPNOTSUPP;
3440
3441     if (hw->phy.eee_speeds_supported && hw->phy.type == ixgbe_phy_fw)
3442         return ixgbe_get_eee_fw(adapter, edata);
3443
3444     return -EOPNOTSUPP;
3445 }
3446
3447 static int ixgbe_set_eee(struct net_device *netdev, struct ethtool_eee *edata)
3448 {
3449     struct ixgbe_adapter *adapter = netdev_priv(netdev);
3450     struct ixgbe_hw *hw = &adapter->hw;
3451     struct ethtool_eee eee_data;
3452     s32 ret_val;
3453
3454     if (!(adapter->flags2 & IXGBE_FLAG2_EEE_CAPABLE))
3455         return -EOPNOTSUPP;
3456
3457     memset(&eee_data, 0, sizeof(struct ethtool_eee));
3458
3459     ret_val = ixgbe_get_eee(netdev, &eee_data);
3460     if (ret_val)
3461         return ret_val;
3462
3463     if (eee_data.eee_enabled && !edata->eee_enabled) {
3464         if (eee_data.tx_lpi_enabled != edata->tx_lpi_enabled) {
3465             e_err(drv, "Setting EEE tx-lpi is not supported\n");
3466             return -EINVAL;
3467         }
3468
3469         if (eee_data.tx_lpi_timer != edata->tx_lpi_timer) {
3470             e_err(drv,
3471                   "Setting EEE Tx LPI timer is not supported\n");
3472             return -EINVAL;
3473         }
3474
3475         if (eee_data.advertised != edata->advertised) {
3476             e_err(drv,
3477                   "Setting EEE advertised speeds is not supported\n");
3478             return -EINVAL;
3479         }
3480     }
3481
3482     if (eee_data.eee_enabled != edata->eee_enabled) {
3483         if (edata->eee_enabled) {
3484             adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED;
3485             hw->phy.eee_speeds_advertised =
3486                            hw->phy.eee_speeds_supported;
3487         } else {
3488             adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED;
3489             hw->phy.eee_speeds_advertised = 0;
3490         }
3491
3492         /* reset link */
3493         if (netif_running(netdev))
3494             ixgbe_reinit_locked(adapter);
3495         else
3496             ixgbe_reset(adapter);
3497     }
3498
3499     return 0;
3500 }
3501
3502 static u32 ixgbe_get_priv_flags(struct net_device *netdev)
3503 {
3504     struct ixgbe_adapter *adapter = netdev_priv(netdev);
3505     u32 priv_flags = 0;
3506
3507     if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY)
3508         priv_flags |= IXGBE_PRIV_FLAGS_LEGACY_RX;
3509
3510     if (adapter->flags2 & IXGBE_FLAG2_VF_IPSEC_ENABLED)
3511         priv_flags |= IXGBE_PRIV_FLAGS_VF_IPSEC_EN;
3512
3513     if (adapter->flags2 & IXGBE_FLAG2_AUTO_DISABLE_VF)
3514         priv_flags |= IXGBE_PRIV_FLAGS_AUTO_DISABLE_VF;
3515
3516     return priv_flags;
3517 }
3518
3519 static int ixgbe_set_priv_flags(struct net_device *netdev, u32 priv_flags)
3520 {
3521     struct ixgbe_adapter *adapter = netdev_priv(netdev);
3522     unsigned int flags2 = adapter->flags2;
3523     unsigned int i;
3524
3525     flags2 &= ~IXGBE_FLAG2_RX_LEGACY;
3526     if (priv_flags & IXGBE_PRIV_FLAGS_LEGACY_RX)
3527         flags2 |= IXGBE_FLAG2_RX_LEGACY;
3528
3529     flags2 &= ~IXGBE_FLAG2_VF_IPSEC_ENABLED;
3530     if (priv_flags & IXGBE_PRIV_FLAGS_VF_IPSEC_EN)
3531         flags2 |= IXGBE_FLAG2_VF_IPSEC_ENABLED;
3532
3533     flags2 &= ~IXGBE_FLAG2_AUTO_DISABLE_VF;
3534     if (priv_flags & IXGBE_PRIV_FLAGS_AUTO_DISABLE_VF) {
3535         if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
3536             /* Reset primary abort counter */
3537             for (i = 0; i < adapter->num_vfs; i++)
3538                 adapter->vfinfo[i].primary_abort_count = 0;
3539
3540             flags2 |= IXGBE_FLAG2_AUTO_DISABLE_VF;
3541         } else {
3542             e_info(probe,
3543                    "Cannot set private flags: Operation not supported\n");
3544             return -EOPNOTSUPP;
3545         }
3546     }
3547
3548     if (flags2 != adapter->flags2) {
3549         adapter->flags2 = flags2;
3550
3551         /* reset interface to repopulate queues */
3552         if (netif_running(netdev))
3553             ixgbe_reinit_locked(adapter);
3554     }
3555
3556     return 0;
3557 }
3558
3559 static const struct ethtool_ops ixgbe_ethtool_ops = {
3560     .supported_coalesce_params = ETHTOOL_COALESCE_USECS,
3561     .get_drvinfo            = ixgbe_get_drvinfo,
3562     .get_regs_len           = ixgbe_get_regs_len,
3563     .get_regs               = ixgbe_get_regs,
3564     .get_wol                = ixgbe_get_wol,
3565     .set_wol                = ixgbe_set_wol,
3566     .nway_reset             = ixgbe_nway_reset,
3567     .get_link               = ethtool_op_get_link,
3568     .get_eeprom_len         = ixgbe_get_eeprom_len,
3569     .get_eeprom             = ixgbe_get_eeprom,
3570     .set_eeprom             = ixgbe_set_eeprom,
3571     .get_ringparam          = ixgbe_get_ringparam,
3572     .set_ringparam          = ixgbe_set_ringparam,
3573     .get_pause_stats    = ixgbe_get_pause_stats,
3574     .get_pauseparam         = ixgbe_get_pauseparam,
3575     .set_pauseparam         = ixgbe_set_pauseparam,
3576     .get_msglevel           = ixgbe_get_msglevel,
3577     .set_msglevel           = ixgbe_set_msglevel,
3578     .self_test              = ixgbe_diag_test,
3579     .get_strings            = ixgbe_get_strings,
3580     .set_phys_id            = ixgbe_set_phys_id,
3581     .get_sset_count         = ixgbe_get_sset_count,
3582     .get_ethtool_stats      = ixgbe_get_ethtool_stats,
3583     .get_coalesce           = ixgbe_get_coalesce,
3584     .set_coalesce           = ixgbe_set_coalesce,
3585     .get_rxnfc      = ixgbe_get_rxnfc,
3586     .set_rxnfc      = ixgbe_set_rxnfc,
3587     .get_rxfh_indir_size    = ixgbe_rss_indir_size,
3588     .get_rxfh_key_size  = ixgbe_get_rxfh_key_size,
3589     .get_rxfh       = ixgbe_get_rxfh,
3590     .set_rxfh       = ixgbe_set_rxfh,
3591     .get_eee        = ixgbe_get_eee,
3592     .set_eee        = ixgbe_set_eee,
3593     .get_channels       = ixgbe_get_channels,
3594     .set_channels       = ixgbe_set_channels,
3595     .get_priv_flags     = ixgbe_get_priv_flags,
3596     .set_priv_flags     = ixgbe_set_priv_flags,
3597     .get_ts_info        = ixgbe_get_ts_info,
3598     .get_module_info    = ixgbe_get_module_info,
3599     .get_module_eeprom  = ixgbe_get_module_eeprom,
3600     .get_link_ksettings     = ixgbe_get_link_ksettings,
3601     .set_link_ksettings     = ixgbe_set_link_ksettings,
3602 };
3603
3604 void ixgbe_set_ethtool_ops(struct net_device *netdev)
3605 {
3606     netdev->ethtool_ops = &ixgbe_ethtool_ops;
3607 }