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0002
0003
0004 #ifndef _IXGBE_COMMON_H_
0005 #define _IXGBE_COMMON_H_
0006
0007 #include "ixgbe_type.h"
0008 #include "ixgbe.h"
0009
0010 u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw);
0011 s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw);
0012 s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw);
0013 s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw);
0014 s32 ixgbe_start_hw_gen2(struct ixgbe_hw *hw);
0015 s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw);
0016 s32 ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num,
0017 u32 pba_num_size);
0018 s32 ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, u8 *mac_addr);
0019 enum ixgbe_bus_width ixgbe_convert_bus_width(u16 link_status);
0020 enum ixgbe_bus_speed ixgbe_convert_bus_speed(u16 link_status);
0021 s32 ixgbe_get_bus_info_generic(struct ixgbe_hw *hw);
0022 void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw);
0023 s32 ixgbe_stop_adapter_generic(struct ixgbe_hw *hw);
0024
0025 s32 ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index);
0026 s32 ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index);
0027 s32 ixgbe_init_led_link_act_generic(struct ixgbe_hw *hw);
0028
0029 s32 ixgbe_init_eeprom_params_generic(struct ixgbe_hw *hw);
0030 s32 ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 data);
0031 s32 ixgbe_write_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
0032 u16 words, u16 *data);
0033 s32 ixgbe_read_eerd_generic(struct ixgbe_hw *hw, u16 offset, u16 *data);
0034 s32 ixgbe_read_eerd_buffer_generic(struct ixgbe_hw *hw, u16 offset,
0035 u16 words, u16 *data);
0036 s32 ixgbe_write_eewr_generic(struct ixgbe_hw *hw, u16 offset, u16 data);
0037 s32 ixgbe_write_eewr_buffer_generic(struct ixgbe_hw *hw, u16 offset,
0038 u16 words, u16 *data);
0039 s32 ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
0040 u16 *data);
0041 s32 ixgbe_read_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
0042 u16 words, u16 *data);
0043 s32 ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw);
0044 s32 ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw,
0045 u16 *checksum_val);
0046 s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw);
0047
0048 s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
0049 u32 enable_addr);
0050 s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index);
0051 s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw);
0052 s32 ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw,
0053 struct net_device *netdev);
0054 s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw);
0055 s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw);
0056 s32 ixgbe_disable_rx_buff_generic(struct ixgbe_hw *hw);
0057 s32 ixgbe_enable_rx_buff_generic(struct ixgbe_hw *hw);
0058 s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval);
0059 s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw);
0060 s32 ixgbe_setup_fc_generic(struct ixgbe_hw *);
0061 bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw);
0062 void ixgbe_fc_autoneg(struct ixgbe_hw *hw);
0063
0064 s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u32 mask);
0065 void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u32 mask);
0066 s32 ixgbe_get_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr);
0067 s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
0068 s32 ixgbe_set_vmdq_san_mac_generic(struct ixgbe_hw *hw, u32 vmdq);
0069 s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
0070 s32 ixgbe_init_uta_tables_generic(struct ixgbe_hw *hw);
0071 s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan,
0072 u32 vind, bool vlan_on, bool vlvf_bypass);
0073 s32 ixgbe_clear_vfta_generic(struct ixgbe_hw *hw);
0074 s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw,
0075 ixgbe_link_speed *speed,
0076 bool *link_up, bool link_up_wait_to_complete);
0077 s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix,
0078 u16 *wwpn_prefix);
0079
0080 s32 prot_autoc_read_generic(struct ixgbe_hw *hw, bool *, u32 *reg_val);
0081 s32 prot_autoc_write_generic(struct ixgbe_hw *hw, u32 reg_val, bool locked);
0082
0083 s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index);
0084 s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index);
0085 void ixgbe_set_mac_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf);
0086 void ixgbe_set_vlan_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf);
0087 s32 ixgbe_get_device_caps_generic(struct ixgbe_hw *hw, u16 *device_caps);
0088 s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min,
0089 u8 build, u8 ver, u16 len, const char *str);
0090 u8 ixgbe_calculate_checksum(u8 *buffer, u32 length);
0091 s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, void *, u32 length,
0092 u32 timeout, bool return_data);
0093 s32 ixgbe_hic_unlocked(struct ixgbe_hw *hw, u32 *buffer, u32 len, u32 timeout);
0094 s32 ixgbe_fw_phy_activity(struct ixgbe_hw *hw, u16 activity,
0095 u32 (*data)[FW_PHY_ACT_DATA_COUNT]);
0096 void ixgbe_clear_tx_pending(struct ixgbe_hw *hw);
0097 bool ixgbe_mng_present(struct ixgbe_hw *hw);
0098 bool ixgbe_mng_enabled(struct ixgbe_hw *hw);
0099
0100 void ixgbe_set_rxpba_generic(struct ixgbe_hw *hw, int num_pb,
0101 u32 headroom, int strategy);
0102
0103 extern const u32 ixgbe_mvals_8259X[IXGBE_MVALS_IDX_LIMIT];
0104
0105 #define IXGBE_I2C_THERMAL_SENSOR_ADDR 0xF8
0106 #define IXGBE_EMC_INTERNAL_DATA 0x00
0107 #define IXGBE_EMC_INTERNAL_THERM_LIMIT 0x20
0108 #define IXGBE_EMC_DIODE1_DATA 0x01
0109 #define IXGBE_EMC_DIODE1_THERM_LIMIT 0x19
0110 #define IXGBE_EMC_DIODE2_DATA 0x23
0111 #define IXGBE_EMC_DIODE2_THERM_LIMIT 0x1A
0112 #define IXGBE_EMC_DIODE3_DATA 0x2A
0113 #define IXGBE_EMC_DIODE3_THERM_LIMIT 0x30
0114
0115 s32 ixgbe_get_thermal_sensor_data_generic(struct ixgbe_hw *hw);
0116 s32 ixgbe_init_thermal_sensor_thresh_generic(struct ixgbe_hw *hw);
0117 void ixgbe_get_etk_id(struct ixgbe_hw *hw,
0118 struct ixgbe_nvm_version *nvm_ver);
0119 void ixgbe_get_oem_prod_version(struct ixgbe_hw *hw,
0120 struct ixgbe_nvm_version *nvm_ver);
0121 void ixgbe_get_orom_version(struct ixgbe_hw *hw,
0122 struct ixgbe_nvm_version *nvm_ver);
0123 void ixgbe_disable_rx_generic(struct ixgbe_hw *hw);
0124 void ixgbe_enable_rx_generic(struct ixgbe_hw *hw);
0125 s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw,
0126 ixgbe_link_speed speed,
0127 bool autoneg_wait_to_complete);
0128 void ixgbe_set_soft_rate_select_speed(struct ixgbe_hw *hw,
0129 ixgbe_link_speed speed);
0130
0131 #define IXGBE_FAILED_READ_RETRIES 5
0132 #define IXGBE_FAILED_READ_REG 0xffffffffU
0133 #define IXGBE_FAILED_READ_CFG_DWORD 0xffffffffU
0134 #define IXGBE_FAILED_READ_CFG_WORD 0xffffU
0135
0136 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg);
0137 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value);
0138
0139 static inline bool ixgbe_removed(void __iomem *addr)
0140 {
0141 return unlikely(!addr);
0142 }
0143
0144 static inline void ixgbe_write_reg(struct ixgbe_hw *hw, u32 reg, u32 value)
0145 {
0146 u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr);
0147
0148 if (ixgbe_removed(reg_addr))
0149 return;
0150 writel(value, reg_addr + reg);
0151 }
0152 #define IXGBE_WRITE_REG(a, reg, value) ixgbe_write_reg((a), (reg), (value))
0153
0154 #ifndef writeq
0155 #define writeq writeq
0156 static inline void writeq(u64 val, void __iomem *addr)
0157 {
0158 writel((u32)val, addr);
0159 writel((u32)(val >> 32), addr + 4);
0160 }
0161 #endif
0162
0163 static inline void ixgbe_write_reg64(struct ixgbe_hw *hw, u32 reg, u64 value)
0164 {
0165 u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr);
0166
0167 if (ixgbe_removed(reg_addr))
0168 return;
0169 writeq(value, reg_addr + reg);
0170 }
0171 #define IXGBE_WRITE_REG64(a, reg, value) ixgbe_write_reg64((a), (reg), (value))
0172
0173 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg);
0174 #define IXGBE_READ_REG(a, reg) ixgbe_read_reg((a), (reg))
0175
0176 #define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value) \
0177 ixgbe_write_reg((a), (reg) + ((offset) << 2), (value))
0178
0179 #define IXGBE_READ_REG_ARRAY(a, reg, offset) \
0180 ixgbe_read_reg((a), (reg) + ((offset) << 2))
0181
0182 #define IXGBE_WRITE_FLUSH(a) ixgbe_read_reg((a), IXGBE_STATUS)
0183
0184 #define ixgbe_hw_to_netdev(hw) (((struct ixgbe_adapter *)(hw)->back)->netdev)
0185
0186 #define hw_dbg(hw, format, arg...) \
0187 netdev_dbg(ixgbe_hw_to_netdev(hw), format, ## arg)
0188 #define hw_err(hw, format, arg...) \
0189 netdev_err(ixgbe_hw_to_netdev(hw), format, ## arg)
0190 #define e_dev_info(format, arg...) \
0191 dev_info(&adapter->pdev->dev, format, ## arg)
0192 #define e_dev_warn(format, arg...) \
0193 dev_warn(&adapter->pdev->dev, format, ## arg)
0194 #define e_dev_err(format, arg...) \
0195 dev_err(&adapter->pdev->dev, format, ## arg)
0196 #define e_dev_notice(format, arg...) \
0197 dev_notice(&adapter->pdev->dev, format, ## arg)
0198 #define e_info(msglvl, format, arg...) \
0199 netif_info(adapter, msglvl, adapter->netdev, format, ## arg)
0200 #define e_err(msglvl, format, arg...) \
0201 netif_err(adapter, msglvl, adapter->netdev, format, ## arg)
0202 #define e_warn(msglvl, format, arg...) \
0203 netif_warn(adapter, msglvl, adapter->netdev, format, ## arg)
0204 #define e_crit(msglvl, format, arg...) \
0205 netif_crit(adapter, msglvl, adapter->netdev, format, ## arg)
0206 #endif
