0001
0002
0003
0004 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
0005
0006 #include "ixgb.h"
0007
0008
0009
0010
0011
0012 #define IXGB_MAX_NIC 8
0013
0014 #define OPTION_UNSET -1
0015 #define OPTION_DISABLED 0
0016 #define OPTION_ENABLED 1
0017
0018
0019
0020
0021
0022
0023 #define IXGB_PARAM_INIT { [0 ... IXGB_MAX_NIC] = OPTION_UNSET }
0024 #define IXGB_PARAM(X, desc) \
0025 static int X[IXGB_MAX_NIC+1] \
0026 = IXGB_PARAM_INIT; \
0027 static unsigned int num_##X = 0; \
0028 module_param_array_named(X, X, int, &num_##X, 0); \
0029 MODULE_PARM_DESC(X, desc);
0030
0031
0032
0033
0034
0035
0036
0037
0038 IXGB_PARAM(TxDescriptors, "Number of transmit descriptors");
0039
0040
0041
0042
0043
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0045
0046
0047 IXGB_PARAM(RxDescriptors, "Number of receive descriptors");
0048
0049
0050
0051
0052
0053
0054
0055
0056
0057
0058
0059
0060 IXGB_PARAM(FlowControl, "Flow Control setting");
0061
0062
0063
0064
0065
0066
0067
0068
0069
0070
0071
0072 IXGB_PARAM(XsumRX, "Disable or enable Receive Checksum offload");
0073
0074
0075
0076
0077
0078
0079
0080
0081 IXGB_PARAM(TxIntDelay, "Transmit Interrupt Delay");
0082
0083
0084
0085
0086
0087
0088
0089
0090 IXGB_PARAM(RxIntDelay, "Receive Interrupt Delay");
0091
0092
0093
0094
0095
0096
0097
0098
0099
0100 IXGB_PARAM(RxFCHighThresh, "Receive Flow Control High Threshold");
0101
0102
0103
0104
0105
0106
0107
0108
0109
0110
0111 IXGB_PARAM(RxFCLowThresh, "Receive Flow Control Low Threshold");
0112
0113
0114
0115
0116
0117
0118
0119
0120
0121 IXGB_PARAM(FCReqTimeout, "Flow Control Request Timeout");
0122
0123
0124
0125
0126
0127
0128
0129
0130
0131
0132
0133 IXGB_PARAM(IntDelayEnable, "Transmit Interrupt Delay Enable");
0134
0135
0136 #define DEFAULT_TIDV 32
0137 #define MAX_TIDV 0xFFFF
0138 #define MIN_TIDV 0
0139
0140 #define DEFAULT_RDTR 72
0141 #define MAX_RDTR 0xFFFF
0142 #define MIN_RDTR 0
0143
0144 #define DEFAULT_FCRTL 0x28000
0145 #define DEFAULT_FCRTH 0x30000
0146 #define MIN_FCRTL 0
0147 #define MAX_FCRTL 0x3FFE8
0148 #define MIN_FCRTH 8
0149 #define MAX_FCRTH 0x3FFF0
0150
0151 #define MIN_FCPAUSE 1
0152 #define MAX_FCPAUSE 0xffff
0153 #define DEFAULT_FCPAUSE 0xFFFF
0154
0155 struct ixgb_option {
0156 enum { enable_option, range_option, list_option } type;
0157 const char *name;
0158 const char *err;
0159 int def;
0160 union {
0161 struct {
0162 int min;
0163 int max;
0164 } r;
0165 struct {
0166 int nr;
0167 const struct ixgb_opt_list {
0168 int i;
0169 const char *str;
0170 } *p;
0171 } l;
0172 } arg;
0173 };
0174
0175 static int
0176 ixgb_validate_option(unsigned int *value, const struct ixgb_option *opt)
0177 {
0178 if (*value == OPTION_UNSET) {
0179 *value = opt->def;
0180 return 0;
0181 }
0182
0183 switch (opt->type) {
0184 case enable_option:
0185 switch (*value) {
0186 case OPTION_ENABLED:
0187 pr_info("%s Enabled\n", opt->name);
0188 return 0;
0189 case OPTION_DISABLED:
0190 pr_info("%s Disabled\n", opt->name);
0191 return 0;
0192 }
0193 break;
0194 case range_option:
0195 if (*value >= opt->arg.r.min && *value <= opt->arg.r.max) {
0196 pr_info("%s set to %i\n", opt->name, *value);
0197 return 0;
0198 }
0199 break;
0200 case list_option: {
0201 int i;
0202 const struct ixgb_opt_list *ent;
0203
0204 for (i = 0; i < opt->arg.l.nr; i++) {
0205 ent = &opt->arg.l.p[i];
0206 if (*value == ent->i) {
0207 if (ent->str[0] != '\0')
0208 pr_info("%s\n", ent->str);
0209 return 0;
0210 }
0211 }
0212 }
0213 break;
0214 default:
0215 BUG();
0216 }
0217
0218 pr_info("Invalid %s specified (%i) %s\n", opt->name, *value, opt->err);
0219 *value = opt->def;
0220 return -1;
0221 }
0222
0223
0224
0225
0226
0227
0228
0229
0230
0231
0232
0233 void
0234 ixgb_check_options(struct ixgb_adapter *adapter)
0235 {
0236 int bd = adapter->bd_number;
0237 if (bd >= IXGB_MAX_NIC) {
0238 pr_notice("Warning: no configuration for board #%i\n", bd);
0239 pr_notice("Using defaults for all values\n");
0240 }
0241
0242 {
0243 static const struct ixgb_option opt = {
0244 .type = range_option,
0245 .name = "Transmit Descriptors",
0246 .err = "using default of " __MODULE_STRING(DEFAULT_TXD),
0247 .def = DEFAULT_TXD,
0248 .arg = { .r = { .min = MIN_TXD,
0249 .max = MAX_TXD}}
0250 };
0251 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
0252
0253 if (num_TxDescriptors > bd) {
0254 tx_ring->count = TxDescriptors[bd];
0255 ixgb_validate_option(&tx_ring->count, &opt);
0256 } else {
0257 tx_ring->count = opt.def;
0258 }
0259 tx_ring->count = ALIGN(tx_ring->count, IXGB_REQ_TX_DESCRIPTOR_MULTIPLE);
0260 }
0261 {
0262 static const struct ixgb_option opt = {
0263 .type = range_option,
0264 .name = "Receive Descriptors",
0265 .err = "using default of " __MODULE_STRING(DEFAULT_RXD),
0266 .def = DEFAULT_RXD,
0267 .arg = { .r = { .min = MIN_RXD,
0268 .max = MAX_RXD}}
0269 };
0270 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
0271
0272 if (num_RxDescriptors > bd) {
0273 rx_ring->count = RxDescriptors[bd];
0274 ixgb_validate_option(&rx_ring->count, &opt);
0275 } else {
0276 rx_ring->count = opt.def;
0277 }
0278 rx_ring->count = ALIGN(rx_ring->count, IXGB_REQ_RX_DESCRIPTOR_MULTIPLE);
0279 }
0280 {
0281 static const struct ixgb_option opt = {
0282 .type = enable_option,
0283 .name = "Receive Checksum Offload",
0284 .err = "defaulting to Enabled",
0285 .def = OPTION_ENABLED
0286 };
0287
0288 if (num_XsumRX > bd) {
0289 unsigned int rx_csum = XsumRX[bd];
0290 ixgb_validate_option(&rx_csum, &opt);
0291 adapter->rx_csum = rx_csum;
0292 } else {
0293 adapter->rx_csum = opt.def;
0294 }
0295 }
0296 {
0297
0298 static const struct ixgb_opt_list fc_list[] = {
0299 { ixgb_fc_none, "Flow Control Disabled" },
0300 { ixgb_fc_rx_pause, "Flow Control Receive Only" },
0301 { ixgb_fc_tx_pause, "Flow Control Transmit Only" },
0302 { ixgb_fc_full, "Flow Control Enabled" },
0303 { ixgb_fc_default, "Flow Control Hardware Default" }
0304 };
0305
0306 static const struct ixgb_option opt = {
0307 .type = list_option,
0308 .name = "Flow Control",
0309 .err = "reading default settings from EEPROM",
0310 .def = ixgb_fc_tx_pause,
0311 .arg = { .l = { .nr = ARRAY_SIZE(fc_list),
0312 .p = fc_list }}
0313 };
0314
0315 if (num_FlowControl > bd) {
0316 unsigned int fc = FlowControl[bd];
0317 ixgb_validate_option(&fc, &opt);
0318 adapter->hw.fc.type = fc;
0319 } else {
0320 adapter->hw.fc.type = opt.def;
0321 }
0322 }
0323 {
0324 static const struct ixgb_option opt = {
0325 .type = range_option,
0326 .name = "Rx Flow Control High Threshold",
0327 .err = "using default of " __MODULE_STRING(DEFAULT_FCRTH),
0328 .def = DEFAULT_FCRTH,
0329 .arg = { .r = { .min = MIN_FCRTH,
0330 .max = MAX_FCRTH}}
0331 };
0332
0333 if (num_RxFCHighThresh > bd) {
0334 adapter->hw.fc.high_water = RxFCHighThresh[bd];
0335 ixgb_validate_option(&adapter->hw.fc.high_water, &opt);
0336 } else {
0337 adapter->hw.fc.high_water = opt.def;
0338 }
0339 if (!(adapter->hw.fc.type & ixgb_fc_tx_pause) )
0340 pr_info("Ignoring RxFCHighThresh when no RxFC\n");
0341 }
0342 {
0343 static const struct ixgb_option opt = {
0344 .type = range_option,
0345 .name = "Rx Flow Control Low Threshold",
0346 .err = "using default of " __MODULE_STRING(DEFAULT_FCRTL),
0347 .def = DEFAULT_FCRTL,
0348 .arg = { .r = { .min = MIN_FCRTL,
0349 .max = MAX_FCRTL}}
0350 };
0351
0352 if (num_RxFCLowThresh > bd) {
0353 adapter->hw.fc.low_water = RxFCLowThresh[bd];
0354 ixgb_validate_option(&adapter->hw.fc.low_water, &opt);
0355 } else {
0356 adapter->hw.fc.low_water = opt.def;
0357 }
0358 if (!(adapter->hw.fc.type & ixgb_fc_tx_pause) )
0359 pr_info("Ignoring RxFCLowThresh when no RxFC\n");
0360 }
0361 {
0362 static const struct ixgb_option opt = {
0363 .type = range_option,
0364 .name = "Flow Control Pause Time Request",
0365 .err = "using default of "__MODULE_STRING(DEFAULT_FCPAUSE),
0366 .def = DEFAULT_FCPAUSE,
0367 .arg = { .r = { .min = MIN_FCPAUSE,
0368 .max = MAX_FCPAUSE}}
0369 };
0370
0371 if (num_FCReqTimeout > bd) {
0372 unsigned int pause_time = FCReqTimeout[bd];
0373 ixgb_validate_option(&pause_time, &opt);
0374 adapter->hw.fc.pause_time = pause_time;
0375 } else {
0376 adapter->hw.fc.pause_time = opt.def;
0377 }
0378 if (!(adapter->hw.fc.type & ixgb_fc_tx_pause) )
0379 pr_info("Ignoring FCReqTimeout when no RxFC\n");
0380 }
0381
0382 if (adapter->hw.fc.type & ixgb_fc_tx_pause) {
0383
0384 if (adapter->hw.fc.high_water < (adapter->hw.fc.low_water + 8)) {
0385
0386 pr_info("RxFCHighThresh must be >= (RxFCLowThresh + 8), Using Defaults\n");
0387 adapter->hw.fc.high_water = DEFAULT_FCRTH;
0388 adapter->hw.fc.low_water = DEFAULT_FCRTL;
0389 }
0390 }
0391 {
0392 static const struct ixgb_option opt = {
0393 .type = range_option,
0394 .name = "Receive Interrupt Delay",
0395 .err = "using default of " __MODULE_STRING(DEFAULT_RDTR),
0396 .def = DEFAULT_RDTR,
0397 .arg = { .r = { .min = MIN_RDTR,
0398 .max = MAX_RDTR}}
0399 };
0400
0401 if (num_RxIntDelay > bd) {
0402 adapter->rx_int_delay = RxIntDelay[bd];
0403 ixgb_validate_option(&adapter->rx_int_delay, &opt);
0404 } else {
0405 adapter->rx_int_delay = opt.def;
0406 }
0407 }
0408 {
0409 static const struct ixgb_option opt = {
0410 .type = range_option,
0411 .name = "Transmit Interrupt Delay",
0412 .err = "using default of " __MODULE_STRING(DEFAULT_TIDV),
0413 .def = DEFAULT_TIDV,
0414 .arg = { .r = { .min = MIN_TIDV,
0415 .max = MAX_TIDV}}
0416 };
0417
0418 if (num_TxIntDelay > bd) {
0419 adapter->tx_int_delay = TxIntDelay[bd];
0420 ixgb_validate_option(&adapter->tx_int_delay, &opt);
0421 } else {
0422 adapter->tx_int_delay = opt.def;
0423 }
0424 }
0425
0426 {
0427 static const struct ixgb_option opt = {
0428 .type = enable_option,
0429 .name = "Tx Interrupt Delay Enable",
0430 .err = "defaulting to Enabled",
0431 .def = OPTION_ENABLED
0432 };
0433
0434 if (num_IntDelayEnable > bd) {
0435 unsigned int ide = IntDelayEnable[bd];
0436 ixgb_validate_option(&ide, &opt);
0437 adapter->tx_int_delay_enable = ide;
0438 } else {
0439 adapter->tx_int_delay_enable = opt.def;
0440 }
0441 }
0442 }