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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /* Copyright(c) 1999 - 2008 Intel Corporation. */
0003 
0004 #ifndef _IXGB_EE_H_
0005 #define _IXGB_EE_H_
0006 
0007 #define IXGB_EEPROM_SIZE    64  /* Size in words */
0008 
0009 /* EEPROM Commands */
0010 #define EEPROM_READ_OPCODE  0x6 /* EEPROM read opcode */
0011 #define EEPROM_WRITE_OPCODE 0x5 /* EEPROM write opcode */
0012 #define EEPROM_ERASE_OPCODE 0x7 /* EEPROM erase opcode */
0013 #define EEPROM_EWEN_OPCODE  0x13    /* EEPROM erase/write enable */
0014 #define EEPROM_EWDS_OPCODE  0x10    /* EEPROM erase/write disable */
0015 
0016 /* EEPROM MAP (Word Offsets) */
0017 #define EEPROM_IA_1_2_REG        0x0000
0018 #define EEPROM_IA_3_4_REG        0x0001
0019 #define EEPROM_IA_5_6_REG        0x0002
0020 #define EEPROM_COMPATIBILITY_REG 0x0003
0021 #define EEPROM_PBA_1_2_REG       0x0008
0022 #define EEPROM_PBA_3_4_REG       0x0009
0023 #define EEPROM_INIT_CONTROL1_REG 0x000A
0024 #define EEPROM_SUBSYS_ID_REG     0x000B
0025 #define EEPROM_SUBVEND_ID_REG    0x000C
0026 #define EEPROM_DEVICE_ID_REG     0x000D
0027 #define EEPROM_VENDOR_ID_REG     0x000E
0028 #define EEPROM_INIT_CONTROL2_REG 0x000F
0029 #define EEPROM_SWDPINS_REG       0x0020
0030 #define EEPROM_CIRCUIT_CTRL_REG  0x0021
0031 #define EEPROM_D0_D3_POWER_REG   0x0022
0032 #define EEPROM_FLASH_VERSION     0x0032
0033 #define EEPROM_CHECKSUM_REG      0x003F
0034 
0035 /* Mask bits for fields in Word 0x0a of the EEPROM */
0036 
0037 #define EEPROM_ICW1_SIGNATURE_MASK  0xC000
0038 #define EEPROM_ICW1_SIGNATURE_VALID 0x4000
0039 #define EEPROM_ICW1_SIGNATURE_CLEAR 0x0000
0040 
0041 /* For checksumming, the sum of all words in the EEPROM should equal 0xBABA. */
0042 #define EEPROM_SUM 0xBABA
0043 
0044 /* EEPROM Map Sizes (Byte Counts) */
0045 #define PBA_SIZE 4
0046 
0047 /* EEPROM Map defines (WORD OFFSETS)*/
0048 
0049 /* EEPROM structure */
0050 struct ixgb_ee_map_type {
0051     u8 mac_addr[ETH_ALEN];
0052     __le16 compatibility;
0053     __le16 reserved1[4];
0054     __le32 pba_number;
0055     __le16 init_ctrl_reg_1;
0056     __le16 subsystem_id;
0057     __le16 subvendor_id;
0058     __le16 device_id;
0059     __le16 vendor_id;
0060     __le16 init_ctrl_reg_2;
0061     __le16 oem_reserved[16];
0062     __le16 swdpins_reg;
0063     __le16 circuit_ctrl_reg;
0064     u8 d3_power;
0065     u8 d0_power;
0066     __le16 reserved2[28];
0067     __le16 checksum;
0068 };
0069 
0070 /* EEPROM Functions */
0071 u16 ixgb_read_eeprom(struct ixgb_hw *hw, u16 reg);
0072 
0073 bool ixgb_validate_eeprom_checksum(struct ixgb_hw *hw);
0074 
0075 void ixgb_update_eeprom_checksum(struct ixgb_hw *hw);
0076 
0077 void ixgb_write_eeprom(struct ixgb_hw *hw, u16 reg, u16 data);
0078 
0079 #endif              /* IXGB_EE_H */