0001
0002
0003
0004 #include "ice.h"
0005 #include "ice_vf_lib_private.h"
0006 #include "ice_base.h"
0007 #include "ice_lib.h"
0008 #include "ice_fltr.h"
0009 #include "ice_dcb_lib.h"
0010 #include "ice_flow.h"
0011 #include "ice_eswitch.h"
0012 #include "ice_virtchnl_allowlist.h"
0013 #include "ice_flex_pipe.h"
0014 #include "ice_vf_vsi_vlan_ops.h"
0015 #include "ice_vlan.h"
0016
0017
0018
0019
0020
0021
0022
0023
0024 static void ice_free_vf_entries(struct ice_pf *pf)
0025 {
0026 struct ice_vfs *vfs = &pf->vfs;
0027 struct hlist_node *tmp;
0028 struct ice_vf *vf;
0029 unsigned int bkt;
0030
0031
0032
0033
0034
0035 lockdep_assert_held(&vfs->table_lock);
0036
0037 hash_for_each_safe(vfs->table, bkt, tmp, vf, entry) {
0038 hash_del_rcu(&vf->entry);
0039 ice_put_vf(vf);
0040 }
0041 }
0042
0043
0044
0045
0046
0047 static void ice_vf_vsi_release(struct ice_vf *vf)
0048 {
0049 struct ice_vsi *vsi = ice_get_vf_vsi(vf);
0050
0051 if (WARN_ON(!vsi))
0052 return;
0053
0054 ice_vsi_release(vsi);
0055 ice_vf_invalidate_vsi(vf);
0056 }
0057
0058
0059
0060
0061
0062 static void ice_free_vf_res(struct ice_vf *vf)
0063 {
0064 struct ice_pf *pf = vf->pf;
0065 int i, last_vector_idx;
0066
0067
0068
0069
0070 clear_bit(ICE_VF_STATE_INIT, vf->vf_states);
0071 ice_vf_fdir_exit(vf);
0072
0073 if (vf->ctrl_vsi_idx != ICE_NO_VSI)
0074 ice_vf_ctrl_vsi_release(vf);
0075
0076
0077 if (vf->lan_vsi_idx != ICE_NO_VSI) {
0078 ice_vf_vsi_release(vf);
0079 vf->num_mac = 0;
0080 }
0081
0082 last_vector_idx = vf->first_vector_idx + pf->vfs.num_msix_per - 1;
0083
0084
0085 memset(&vf->mdd_tx_events, 0, sizeof(vf->mdd_tx_events));
0086 memset(&vf->mdd_rx_events, 0, sizeof(vf->mdd_rx_events));
0087
0088
0089 for (i = vf->first_vector_idx; i <= last_vector_idx; i++) {
0090 wr32(&pf->hw, GLINT_DYN_CTL(i), GLINT_DYN_CTL_CLEARPBA_M);
0091 ice_flush(&pf->hw);
0092 }
0093
0094 clear_bit(ICE_VF_STATE_MC_PROMISC, vf->vf_states);
0095 clear_bit(ICE_VF_STATE_UC_PROMISC, vf->vf_states);
0096 }
0097
0098
0099
0100
0101
0102 static void ice_dis_vf_mappings(struct ice_vf *vf)
0103 {
0104 struct ice_pf *pf = vf->pf;
0105 struct ice_vsi *vsi;
0106 struct device *dev;
0107 int first, last, v;
0108 struct ice_hw *hw;
0109
0110 hw = &pf->hw;
0111 vsi = ice_get_vf_vsi(vf);
0112 if (WARN_ON(!vsi))
0113 return;
0114
0115 dev = ice_pf_to_dev(pf);
0116 wr32(hw, VPINT_ALLOC(vf->vf_id), 0);
0117 wr32(hw, VPINT_ALLOC_PCI(vf->vf_id), 0);
0118
0119 first = vf->first_vector_idx;
0120 last = first + pf->vfs.num_msix_per - 1;
0121 for (v = first; v <= last; v++) {
0122 u32 reg;
0123
0124 reg = (((1 << GLINT_VECT2FUNC_IS_PF_S) &
0125 GLINT_VECT2FUNC_IS_PF_M) |
0126 ((hw->pf_id << GLINT_VECT2FUNC_PF_NUM_S) &
0127 GLINT_VECT2FUNC_PF_NUM_M));
0128 wr32(hw, GLINT_VECT2FUNC(v), reg);
0129 }
0130
0131 if (vsi->tx_mapping_mode == ICE_VSI_MAP_CONTIG)
0132 wr32(hw, VPLAN_TX_QBASE(vf->vf_id), 0);
0133 else
0134 dev_err(dev, "Scattered mode for VF Tx queues is not yet implemented\n");
0135
0136 if (vsi->rx_mapping_mode == ICE_VSI_MAP_CONTIG)
0137 wr32(hw, VPLAN_RX_QBASE(vf->vf_id), 0);
0138 else
0139 dev_err(dev, "Scattered mode for VF Rx queues is not yet implemented\n");
0140 }
0141
0142
0143
0144
0145
0146
0147
0148
0149
0150
0151 static int ice_sriov_free_msix_res(struct ice_pf *pf)
0152 {
0153 struct ice_res_tracker *res;
0154
0155 if (!pf)
0156 return -EINVAL;
0157
0158 res = pf->irq_tracker;
0159 if (!res)
0160 return -EINVAL;
0161
0162
0163 WARN_ON(pf->sriov_base_vector < res->num_entries);
0164
0165 pf->sriov_base_vector = 0;
0166
0167 return 0;
0168 }
0169
0170
0171
0172
0173
0174 void ice_free_vfs(struct ice_pf *pf)
0175 {
0176 struct device *dev = ice_pf_to_dev(pf);
0177 struct ice_vfs *vfs = &pf->vfs;
0178 struct ice_hw *hw = &pf->hw;
0179 struct ice_vf *vf;
0180 unsigned int bkt;
0181
0182 if (!ice_has_vfs(pf))
0183 return;
0184
0185 while (test_and_set_bit(ICE_VF_DIS, pf->state))
0186 usleep_range(1000, 2000);
0187
0188
0189
0190
0191
0192 if (!pci_vfs_assigned(pf->pdev))
0193 pci_disable_sriov(pf->pdev);
0194 else
0195 dev_warn(dev, "VFs are assigned - not disabling SR-IOV\n");
0196
0197 mutex_lock(&vfs->table_lock);
0198
0199 ice_eswitch_release(pf);
0200
0201 ice_for_each_vf(pf, bkt, vf) {
0202 mutex_lock(&vf->cfg_lock);
0203
0204 ice_dis_vf_qs(vf);
0205
0206 if (test_bit(ICE_VF_STATE_INIT, vf->vf_states)) {
0207
0208 ice_dis_vf_mappings(vf);
0209 set_bit(ICE_VF_STATE_DIS, vf->vf_states);
0210 ice_free_vf_res(vf);
0211 }
0212
0213 if (!pci_vfs_assigned(pf->pdev)) {
0214 u32 reg_idx, bit_idx;
0215
0216 reg_idx = (hw->func_caps.vf_base_id + vf->vf_id) / 32;
0217 bit_idx = (hw->func_caps.vf_base_id + vf->vf_id) % 32;
0218 wr32(hw, GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
0219 }
0220
0221
0222 if (ice_mbx_clear_malvf(&hw->mbx_snapshot, pf->vfs.malvfs,
0223 ICE_MAX_SRIOV_VFS, vf->vf_id))
0224 dev_dbg(dev, "failed to clear malicious VF state for VF %u\n",
0225 vf->vf_id);
0226
0227 mutex_unlock(&vf->cfg_lock);
0228 }
0229
0230 if (ice_sriov_free_msix_res(pf))
0231 dev_err(dev, "Failed to free MSIX resources used by SR-IOV\n");
0232
0233 vfs->num_qps_per = 0;
0234 ice_free_vf_entries(pf);
0235
0236 mutex_unlock(&vfs->table_lock);
0237
0238 clear_bit(ICE_VF_DIS, pf->state);
0239 clear_bit(ICE_FLAG_SRIOV_ENA, pf->flags);
0240 }
0241
0242
0243
0244
0245
0246
0247
0248
0249 static struct ice_vsi *ice_vf_vsi_setup(struct ice_vf *vf)
0250 {
0251 struct ice_port_info *pi = ice_vf_get_port_info(vf);
0252 struct ice_pf *pf = vf->pf;
0253 struct ice_vsi *vsi;
0254
0255 vsi = ice_vsi_setup(pf, pi, ICE_VSI_VF, vf, NULL);
0256
0257 if (!vsi) {
0258 dev_err(ice_pf_to_dev(pf), "Failed to create VF VSI\n");
0259 ice_vf_invalidate_vsi(vf);
0260 return NULL;
0261 }
0262
0263 vf->lan_vsi_idx = vsi->idx;
0264 vf->lan_vsi_num = vsi->vsi_num;
0265
0266 return vsi;
0267 }
0268
0269
0270
0271
0272
0273
0274
0275
0276
0277
0278
0279
0280
0281 static int ice_calc_vf_first_vector_idx(struct ice_pf *pf, struct ice_vf *vf)
0282 {
0283 return pf->sriov_base_vector + vf->vf_id * pf->vfs.num_msix_per;
0284 }
0285
0286
0287
0288
0289
0290
0291
0292
0293
0294 static void ice_ena_vf_msix_mappings(struct ice_vf *vf)
0295 {
0296 int device_based_first_msix, device_based_last_msix;
0297 int pf_based_first_msix, pf_based_last_msix, v;
0298 struct ice_pf *pf = vf->pf;
0299 int device_based_vf_id;
0300 struct ice_hw *hw;
0301 u32 reg;
0302
0303 hw = &pf->hw;
0304 pf_based_first_msix = vf->first_vector_idx;
0305 pf_based_last_msix = (pf_based_first_msix + pf->vfs.num_msix_per) - 1;
0306
0307 device_based_first_msix = pf_based_first_msix +
0308 pf->hw.func_caps.common_cap.msix_vector_first_id;
0309 device_based_last_msix =
0310 (device_based_first_msix + pf->vfs.num_msix_per) - 1;
0311 device_based_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
0312
0313 reg = (((device_based_first_msix << VPINT_ALLOC_FIRST_S) &
0314 VPINT_ALLOC_FIRST_M) |
0315 ((device_based_last_msix << VPINT_ALLOC_LAST_S) &
0316 VPINT_ALLOC_LAST_M) | VPINT_ALLOC_VALID_M);
0317 wr32(hw, VPINT_ALLOC(vf->vf_id), reg);
0318
0319 reg = (((device_based_first_msix << VPINT_ALLOC_PCI_FIRST_S)
0320 & VPINT_ALLOC_PCI_FIRST_M) |
0321 ((device_based_last_msix << VPINT_ALLOC_PCI_LAST_S) &
0322 VPINT_ALLOC_PCI_LAST_M) | VPINT_ALLOC_PCI_VALID_M);
0323 wr32(hw, VPINT_ALLOC_PCI(vf->vf_id), reg);
0324
0325
0326 for (v = pf_based_first_msix; v <= pf_based_last_msix; v++) {
0327 reg = (((device_based_vf_id << GLINT_VECT2FUNC_VF_NUM_S) &
0328 GLINT_VECT2FUNC_VF_NUM_M) |
0329 ((hw->pf_id << GLINT_VECT2FUNC_PF_NUM_S) &
0330 GLINT_VECT2FUNC_PF_NUM_M));
0331 wr32(hw, GLINT_VECT2FUNC(v), reg);
0332 }
0333
0334
0335 wr32(hw, VPINT_MBX_CTL(device_based_vf_id), VPINT_MBX_CTL_CAUSE_ENA_M);
0336 }
0337
0338
0339
0340
0341
0342
0343
0344 static void ice_ena_vf_q_mappings(struct ice_vf *vf, u16 max_txq, u16 max_rxq)
0345 {
0346 struct device *dev = ice_pf_to_dev(vf->pf);
0347 struct ice_vsi *vsi = ice_get_vf_vsi(vf);
0348 struct ice_hw *hw = &vf->pf->hw;
0349 u32 reg;
0350
0351 if (WARN_ON(!vsi))
0352 return;
0353
0354
0355 wr32(hw, VPLAN_TXQ_MAPENA(vf->vf_id), VPLAN_TXQ_MAPENA_TX_ENA_M);
0356
0357
0358 if (vsi->tx_mapping_mode == ICE_VSI_MAP_CONTIG) {
0359
0360
0361
0362
0363 reg = (((vsi->txq_map[0] << VPLAN_TX_QBASE_VFFIRSTQ_S) &
0364 VPLAN_TX_QBASE_VFFIRSTQ_M) |
0365 (((max_txq - 1) << VPLAN_TX_QBASE_VFNUMQ_S) &
0366 VPLAN_TX_QBASE_VFNUMQ_M));
0367 wr32(hw, VPLAN_TX_QBASE(vf->vf_id), reg);
0368 } else {
0369 dev_err(dev, "Scattered mode for VF Tx queues is not yet implemented\n");
0370 }
0371
0372
0373 wr32(hw, VPLAN_RXQ_MAPENA(vf->vf_id), VPLAN_RXQ_MAPENA_RX_ENA_M);
0374
0375
0376 if (vsi->rx_mapping_mode == ICE_VSI_MAP_CONTIG) {
0377
0378
0379
0380
0381 reg = (((vsi->rxq_map[0] << VPLAN_RX_QBASE_VFFIRSTQ_S) &
0382 VPLAN_RX_QBASE_VFFIRSTQ_M) |
0383 (((max_rxq - 1) << VPLAN_RX_QBASE_VFNUMQ_S) &
0384 VPLAN_RX_QBASE_VFNUMQ_M));
0385 wr32(hw, VPLAN_RX_QBASE(vf->vf_id), reg);
0386 } else {
0387 dev_err(dev, "Scattered mode for VF Rx queues is not yet implemented\n");
0388 }
0389 }
0390
0391
0392
0393
0394
0395 static void ice_ena_vf_mappings(struct ice_vf *vf)
0396 {
0397 struct ice_vsi *vsi = ice_get_vf_vsi(vf);
0398
0399 if (WARN_ON(!vsi))
0400 return;
0401
0402 ice_ena_vf_msix_mappings(vf);
0403 ice_ena_vf_q_mappings(vf, vsi->alloc_txq, vsi->alloc_rxq);
0404 }
0405
0406
0407
0408
0409
0410
0411 int ice_calc_vf_reg_idx(struct ice_vf *vf, struct ice_q_vector *q_vector)
0412 {
0413 struct ice_pf *pf;
0414
0415 if (!vf || !q_vector)
0416 return -EINVAL;
0417
0418 pf = vf->pf;
0419
0420
0421 return pf->sriov_base_vector + pf->vfs.num_msix_per * vf->vf_id +
0422 q_vector->v_idx + 1;
0423 }
0424
0425
0426
0427
0428
0429
0430
0431
0432
0433
0434 static int ice_get_max_valid_res_idx(struct ice_res_tracker *res)
0435 {
0436 int i;
0437
0438 if (!res)
0439 return -EINVAL;
0440
0441 for (i = res->num_entries - 1; i >= 0; i--)
0442 if (res->list[i] & ICE_RES_VALID_BIT)
0443 return i;
0444
0445 return 0;
0446 }
0447
0448
0449
0450
0451
0452
0453
0454
0455
0456
0457
0458
0459
0460
0461
0462
0463 static int ice_sriov_set_msix_res(struct ice_pf *pf, u16 num_msix_needed)
0464 {
0465 u16 total_vectors = pf->hw.func_caps.common_cap.num_msix_vectors;
0466 int vectors_used = pf->irq_tracker->num_entries;
0467 int sriov_base_vector;
0468
0469 sriov_base_vector = total_vectors - num_msix_needed;
0470
0471
0472
0473
0474 if (sriov_base_vector < vectors_used)
0475 return -EINVAL;
0476
0477 pf->sriov_base_vector = sriov_base_vector;
0478
0479 return 0;
0480 }
0481
0482
0483
0484
0485
0486
0487
0488
0489
0490
0491
0492
0493
0494
0495
0496
0497
0498
0499
0500
0501
0502
0503
0504 static int ice_set_per_vf_res(struct ice_pf *pf, u16 num_vfs)
0505 {
0506 int max_valid_res_idx = ice_get_max_valid_res_idx(pf->irq_tracker);
0507 u16 num_msix_per_vf, num_txq, num_rxq, avail_qs;
0508 int msix_avail_per_vf, msix_avail_for_sriov;
0509 struct device *dev = ice_pf_to_dev(pf);
0510 int err;
0511
0512 lockdep_assert_held(&pf->vfs.table_lock);
0513
0514 if (!num_vfs)
0515 return -EINVAL;
0516
0517 if (max_valid_res_idx < 0)
0518 return -ENOSPC;
0519
0520
0521 msix_avail_for_sriov = pf->hw.func_caps.common_cap.num_msix_vectors -
0522 pf->irq_tracker->num_entries;
0523 msix_avail_per_vf = msix_avail_for_sriov / num_vfs;
0524 if (msix_avail_per_vf >= ICE_NUM_VF_MSIX_MED) {
0525 num_msix_per_vf = ICE_NUM_VF_MSIX_MED;
0526 } else if (msix_avail_per_vf >= ICE_NUM_VF_MSIX_SMALL) {
0527 num_msix_per_vf = ICE_NUM_VF_MSIX_SMALL;
0528 } else if (msix_avail_per_vf >= ICE_NUM_VF_MSIX_MULTIQ_MIN) {
0529 num_msix_per_vf = ICE_NUM_VF_MSIX_MULTIQ_MIN;
0530 } else if (msix_avail_per_vf >= ICE_MIN_INTR_PER_VF) {
0531 num_msix_per_vf = ICE_MIN_INTR_PER_VF;
0532 } else {
0533 dev_err(dev, "Only %d MSI-X interrupts available for SR-IOV. Not enough to support minimum of %d MSI-X interrupts per VF for %d VFs\n",
0534 msix_avail_for_sriov, ICE_MIN_INTR_PER_VF,
0535 num_vfs);
0536 return -ENOSPC;
0537 }
0538
0539 num_txq = min_t(u16, num_msix_per_vf - ICE_NONQ_VECS_VF,
0540 ICE_MAX_RSS_QS_PER_VF);
0541 avail_qs = ice_get_avail_txq_count(pf) / num_vfs;
0542 if (!avail_qs)
0543 num_txq = 0;
0544 else if (num_txq > avail_qs)
0545 num_txq = rounddown_pow_of_two(avail_qs);
0546
0547 num_rxq = min_t(u16, num_msix_per_vf - ICE_NONQ_VECS_VF,
0548 ICE_MAX_RSS_QS_PER_VF);
0549 avail_qs = ice_get_avail_rxq_count(pf) / num_vfs;
0550 if (!avail_qs)
0551 num_rxq = 0;
0552 else if (num_rxq > avail_qs)
0553 num_rxq = rounddown_pow_of_two(avail_qs);
0554
0555 if (num_txq < ICE_MIN_QS_PER_VF || num_rxq < ICE_MIN_QS_PER_VF) {
0556 dev_err(dev, "Not enough queues to support minimum of %d queue pairs per VF for %d VFs\n",
0557 ICE_MIN_QS_PER_VF, num_vfs);
0558 return -ENOSPC;
0559 }
0560
0561 err = ice_sriov_set_msix_res(pf, num_msix_per_vf * num_vfs);
0562 if (err) {
0563 dev_err(dev, "Unable to set MSI-X resources for %d VFs, err %d\n",
0564 num_vfs, err);
0565 return err;
0566 }
0567
0568
0569 pf->vfs.num_qps_per = min_t(int, num_txq, num_rxq);
0570 pf->vfs.num_msix_per = num_msix_per_vf;
0571 dev_info(dev, "Enabling %d VFs with %d vectors and %d queues per VF\n",
0572 num_vfs, pf->vfs.num_msix_per, pf->vfs.num_qps_per);
0573
0574 return 0;
0575 }
0576
0577
0578
0579
0580
0581
0582
0583
0584 static int ice_init_vf_vsi_res(struct ice_vf *vf)
0585 {
0586 struct ice_vsi_vlan_ops *vlan_ops;
0587 struct ice_pf *pf = vf->pf;
0588 u8 broadcast[ETH_ALEN];
0589 struct ice_vsi *vsi;
0590 struct device *dev;
0591 int err;
0592
0593 vf->first_vector_idx = ice_calc_vf_first_vector_idx(pf, vf);
0594
0595 dev = ice_pf_to_dev(pf);
0596 vsi = ice_vf_vsi_setup(vf);
0597 if (!vsi)
0598 return -ENOMEM;
0599
0600 err = ice_vsi_add_vlan_zero(vsi);
0601 if (err) {
0602 dev_warn(dev, "Failed to add VLAN 0 filter for VF %d\n",
0603 vf->vf_id);
0604 goto release_vsi;
0605 }
0606
0607 vlan_ops = ice_get_compat_vsi_vlan_ops(vsi);
0608 err = vlan_ops->ena_rx_filtering(vsi);
0609 if (err) {
0610 dev_warn(dev, "Failed to enable Rx VLAN filtering for VF %d\n",
0611 vf->vf_id);
0612 goto release_vsi;
0613 }
0614
0615 eth_broadcast_addr(broadcast);
0616 err = ice_fltr_add_mac(vsi, broadcast, ICE_FWD_TO_VSI);
0617 if (err) {
0618 dev_err(dev, "Failed to add broadcast MAC filter for VF %d, error %d\n",
0619 vf->vf_id, err);
0620 goto release_vsi;
0621 }
0622
0623 err = ice_vsi_apply_spoofchk(vsi, vf->spoofchk);
0624 if (err) {
0625 dev_warn(dev, "Failed to initialize spoofchk setting for VF %d\n",
0626 vf->vf_id);
0627 goto release_vsi;
0628 }
0629
0630 vf->num_mac = 1;
0631
0632 return 0;
0633
0634 release_vsi:
0635 ice_vf_vsi_release(vf);
0636 return err;
0637 }
0638
0639
0640
0641
0642
0643 static int ice_start_vfs(struct ice_pf *pf)
0644 {
0645 struct ice_hw *hw = &pf->hw;
0646 unsigned int bkt, it_cnt;
0647 struct ice_vf *vf;
0648 int retval;
0649
0650 lockdep_assert_held(&pf->vfs.table_lock);
0651
0652 it_cnt = 0;
0653 ice_for_each_vf(pf, bkt, vf) {
0654 vf->vf_ops->clear_reset_trigger(vf);
0655
0656 retval = ice_init_vf_vsi_res(vf);
0657 if (retval) {
0658 dev_err(ice_pf_to_dev(pf), "Failed to initialize VSI resources for VF %d, error %d\n",
0659 vf->vf_id, retval);
0660 goto teardown;
0661 }
0662
0663 set_bit(ICE_VF_STATE_INIT, vf->vf_states);
0664 ice_ena_vf_mappings(vf);
0665 wr32(hw, VFGEN_RSTAT(vf->vf_id), VIRTCHNL_VFR_VFACTIVE);
0666 it_cnt++;
0667 }
0668
0669 ice_flush(hw);
0670 return 0;
0671
0672 teardown:
0673 ice_for_each_vf(pf, bkt, vf) {
0674 if (it_cnt == 0)
0675 break;
0676
0677 ice_dis_vf_mappings(vf);
0678 ice_vf_vsi_release(vf);
0679 it_cnt--;
0680 }
0681
0682 return retval;
0683 }
0684
0685
0686
0687
0688
0689
0690
0691
0692 static void ice_sriov_free_vf(struct ice_vf *vf)
0693 {
0694 mutex_destroy(&vf->cfg_lock);
0695
0696 kfree_rcu(vf, rcu);
0697 }
0698
0699
0700
0701
0702
0703 static void ice_sriov_clear_mbx_register(struct ice_vf *vf)
0704 {
0705 struct ice_pf *pf = vf->pf;
0706
0707 wr32(&pf->hw, VF_MBX_ARQLEN(vf->vf_id), 0);
0708 wr32(&pf->hw, VF_MBX_ATQLEN(vf->vf_id), 0);
0709 }
0710
0711
0712
0713
0714
0715
0716
0717
0718 static void ice_sriov_trigger_reset_register(struct ice_vf *vf, bool is_vflr)
0719 {
0720 struct ice_pf *pf = vf->pf;
0721 u32 reg, reg_idx, bit_idx;
0722 unsigned int vf_abs_id, i;
0723 struct device *dev;
0724 struct ice_hw *hw;
0725
0726 dev = ice_pf_to_dev(pf);
0727 hw = &pf->hw;
0728 vf_abs_id = vf->vf_id + hw->func_caps.vf_base_id;
0729
0730
0731
0732
0733
0734 if (!is_vflr) {
0735 reg = rd32(hw, VPGEN_VFRTRIG(vf->vf_id));
0736 reg |= VPGEN_VFRTRIG_VFSWR_M;
0737 wr32(hw, VPGEN_VFRTRIG(vf->vf_id), reg);
0738 }
0739
0740
0741 reg_idx = (vf_abs_id) / 32;
0742 bit_idx = (vf_abs_id) % 32;
0743 wr32(hw, GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
0744 ice_flush(hw);
0745
0746 wr32(hw, PF_PCI_CIAA,
0747 VF_DEVICE_STATUS | (vf_abs_id << PF_PCI_CIAA_VF_NUM_S));
0748 for (i = 0; i < ICE_PCI_CIAD_WAIT_COUNT; i++) {
0749 reg = rd32(hw, PF_PCI_CIAD);
0750
0751 if ((reg & VF_TRANS_PENDING_M) == 0)
0752 break;
0753
0754 dev_err(dev, "VF %u PCI transactions stuck\n", vf->vf_id);
0755 udelay(ICE_PCI_CIAD_WAIT_DELAY_US);
0756 }
0757 }
0758
0759
0760
0761
0762
0763
0764
0765 static bool ice_sriov_poll_reset_status(struct ice_vf *vf)
0766 {
0767 struct ice_pf *pf = vf->pf;
0768 unsigned int i;
0769 u32 reg;
0770
0771 for (i = 0; i < 10; i++) {
0772
0773
0774
0775
0776 reg = rd32(&pf->hw, VPGEN_VFRSTAT(vf->vf_id));
0777 if (reg & VPGEN_VFRSTAT_VFRD_M)
0778 return true;
0779
0780
0781 usleep_range(10, 20);
0782 }
0783 return false;
0784 }
0785
0786
0787
0788
0789
0790 static void ice_sriov_clear_reset_trigger(struct ice_vf *vf)
0791 {
0792 struct ice_hw *hw = &vf->pf->hw;
0793 u32 reg;
0794
0795 reg = rd32(hw, VPGEN_VFRTRIG(vf->vf_id));
0796 reg &= ~VPGEN_VFRTRIG_VFSWR_M;
0797 wr32(hw, VPGEN_VFRTRIG(vf->vf_id), reg);
0798 ice_flush(hw);
0799 }
0800
0801
0802
0803
0804
0805
0806
0807
0808 static int ice_sriov_vsi_rebuild(struct ice_vf *vf)
0809 {
0810 struct ice_pf *pf = vf->pf;
0811
0812 ice_vf_vsi_release(vf);
0813 if (!ice_vf_vsi_setup(vf)) {
0814 dev_err(ice_pf_to_dev(pf),
0815 "Failed to release and setup the VF%u's VSI\n",
0816 vf->vf_id);
0817 return -ENOMEM;
0818 }
0819
0820 return 0;
0821 }
0822
0823
0824
0825
0826
0827 static void ice_sriov_post_vsi_rebuild(struct ice_vf *vf)
0828 {
0829 ice_vf_rebuild_host_cfg(vf);
0830 ice_vf_set_initialized(vf);
0831 ice_ena_vf_mappings(vf);
0832 wr32(&vf->pf->hw, VFGEN_RSTAT(vf->vf_id), VIRTCHNL_VFR_VFACTIVE);
0833 }
0834
0835 static const struct ice_vf_ops ice_sriov_vf_ops = {
0836 .reset_type = ICE_VF_RESET,
0837 .free = ice_sriov_free_vf,
0838 .clear_mbx_register = ice_sriov_clear_mbx_register,
0839 .trigger_reset_register = ice_sriov_trigger_reset_register,
0840 .poll_reset_status = ice_sriov_poll_reset_status,
0841 .clear_reset_trigger = ice_sriov_clear_reset_trigger,
0842 .vsi_rebuild = ice_sriov_vsi_rebuild,
0843 .post_vsi_rebuild = ice_sriov_post_vsi_rebuild,
0844 };
0845
0846
0847
0848
0849
0850
0851
0852
0853
0854
0855
0856
0857
0858
0859 static int ice_create_vf_entries(struct ice_pf *pf, u16 num_vfs)
0860 {
0861 struct ice_vfs *vfs = &pf->vfs;
0862 struct ice_vf *vf;
0863 u16 vf_id;
0864 int err;
0865
0866 lockdep_assert_held(&vfs->table_lock);
0867
0868 for (vf_id = 0; vf_id < num_vfs; vf_id++) {
0869 vf = kzalloc(sizeof(*vf), GFP_KERNEL);
0870 if (!vf) {
0871 err = -ENOMEM;
0872 goto err_free_entries;
0873 }
0874 kref_init(&vf->refcnt);
0875
0876 vf->pf = pf;
0877 vf->vf_id = vf_id;
0878
0879
0880 vf->vf_ops = &ice_sriov_vf_ops;
0881
0882 vf->vf_sw_id = pf->first_sw;
0883
0884 vf->spoofchk = true;
0885 vf->num_vf_qs = pf->vfs.num_qps_per;
0886 ice_vc_set_default_allowlist(vf);
0887
0888
0889
0890
0891 ice_vf_ctrl_invalidate_vsi(vf);
0892 ice_vf_fdir_init(vf);
0893
0894 ice_virtchnl_set_dflt_ops(vf);
0895
0896 mutex_init(&vf->cfg_lock);
0897
0898 hash_add_rcu(vfs->table, &vf->entry, vf_id);
0899 }
0900
0901 return 0;
0902
0903 err_free_entries:
0904 ice_free_vf_entries(pf);
0905 return err;
0906 }
0907
0908
0909
0910
0911
0912
0913 static int ice_ena_vfs(struct ice_pf *pf, u16 num_vfs)
0914 {
0915 struct device *dev = ice_pf_to_dev(pf);
0916 struct ice_hw *hw = &pf->hw;
0917 int ret;
0918
0919
0920 wr32(hw, GLINT_DYN_CTL(pf->oicr_idx),
0921 ICE_ITR_NONE << GLINT_DYN_CTL_ITR_INDX_S);
0922 set_bit(ICE_OICR_INTR_DIS, pf->state);
0923 ice_flush(hw);
0924
0925 ret = pci_enable_sriov(pf->pdev, num_vfs);
0926 if (ret)
0927 goto err_unroll_intr;
0928
0929 mutex_lock(&pf->vfs.table_lock);
0930
0931 ret = ice_set_per_vf_res(pf, num_vfs);
0932 if (ret) {
0933 dev_err(dev, "Not enough resources for %d VFs, err %d. Try with fewer number of VFs\n",
0934 num_vfs, ret);
0935 goto err_unroll_sriov;
0936 }
0937
0938 ret = ice_create_vf_entries(pf, num_vfs);
0939 if (ret) {
0940 dev_err(dev, "Failed to allocate VF entries for %d VFs\n",
0941 num_vfs);
0942 goto err_unroll_sriov;
0943 }
0944
0945 ret = ice_start_vfs(pf);
0946 if (ret) {
0947 dev_err(dev, "Failed to start %d VFs, err %d\n", num_vfs, ret);
0948 ret = -EAGAIN;
0949 goto err_unroll_vf_entries;
0950 }
0951
0952 clear_bit(ICE_VF_DIS, pf->state);
0953
0954 ret = ice_eswitch_configure(pf);
0955 if (ret) {
0956 dev_err(dev, "Failed to configure eswitch, err %d\n", ret);
0957 goto err_unroll_sriov;
0958 }
0959
0960
0961 if (test_and_clear_bit(ICE_OICR_INTR_DIS, pf->state))
0962 ice_irq_dynamic_ena(hw, NULL, NULL);
0963
0964 mutex_unlock(&pf->vfs.table_lock);
0965
0966 return 0;
0967
0968 err_unroll_vf_entries:
0969 ice_free_vf_entries(pf);
0970 err_unroll_sriov:
0971 mutex_unlock(&pf->vfs.table_lock);
0972 pci_disable_sriov(pf->pdev);
0973 err_unroll_intr:
0974
0975 ice_irq_dynamic_ena(hw, NULL, NULL);
0976 clear_bit(ICE_OICR_INTR_DIS, pf->state);
0977 return ret;
0978 }
0979
0980
0981
0982
0983
0984
0985
0986
0987 static int ice_pci_sriov_ena(struct ice_pf *pf, int num_vfs)
0988 {
0989 int pre_existing_vfs = pci_num_vf(pf->pdev);
0990 struct device *dev = ice_pf_to_dev(pf);
0991 int err;
0992
0993 if (pre_existing_vfs && pre_existing_vfs != num_vfs)
0994 ice_free_vfs(pf);
0995 else if (pre_existing_vfs && pre_existing_vfs == num_vfs)
0996 return 0;
0997
0998 if (num_vfs > pf->vfs.num_supported) {
0999 dev_err(dev, "Can't enable %d VFs, max VFs supported is %d\n",
1000 num_vfs, pf->vfs.num_supported);
1001 return -EOPNOTSUPP;
1002 }
1003
1004 dev_info(dev, "Enabling %d VFs\n", num_vfs);
1005 err = ice_ena_vfs(pf, num_vfs);
1006 if (err) {
1007 dev_err(dev, "Failed to enable SR-IOV: %d\n", err);
1008 return err;
1009 }
1010
1011 set_bit(ICE_FLAG_SRIOV_ENA, pf->flags);
1012 return 0;
1013 }
1014
1015
1016
1017
1018
1019 static int ice_check_sriov_allowed(struct ice_pf *pf)
1020 {
1021 struct device *dev = ice_pf_to_dev(pf);
1022
1023 if (!test_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags)) {
1024 dev_err(dev, "This device is not capable of SR-IOV\n");
1025 return -EOPNOTSUPP;
1026 }
1027
1028 if (ice_is_safe_mode(pf)) {
1029 dev_err(dev, "SR-IOV cannot be configured - Device is in Safe Mode\n");
1030 return -EOPNOTSUPP;
1031 }
1032
1033 if (!ice_pf_state_is_nominal(pf)) {
1034 dev_err(dev, "Cannot enable SR-IOV, device not ready\n");
1035 return -EBUSY;
1036 }
1037
1038 return 0;
1039 }
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050 int ice_sriov_configure(struct pci_dev *pdev, int num_vfs)
1051 {
1052 struct ice_pf *pf = pci_get_drvdata(pdev);
1053 struct device *dev = ice_pf_to_dev(pf);
1054 int err;
1055
1056 err = ice_check_sriov_allowed(pf);
1057 if (err)
1058 return err;
1059
1060 if (!num_vfs) {
1061 if (!pci_vfs_assigned(pdev)) {
1062 ice_free_vfs(pf);
1063 ice_mbx_deinit_snapshot(&pf->hw);
1064 if (pf->lag)
1065 ice_enable_lag(pf->lag);
1066 return 0;
1067 }
1068
1069 dev_err(dev, "can't free VFs because some are assigned to VMs.\n");
1070 return -EBUSY;
1071 }
1072
1073 err = ice_mbx_init_snapshot(&pf->hw, num_vfs);
1074 if (err)
1075 return err;
1076
1077 err = ice_pci_sriov_ena(pf, num_vfs);
1078 if (err) {
1079 ice_mbx_deinit_snapshot(&pf->hw);
1080 return err;
1081 }
1082
1083 if (pf->lag)
1084 ice_disable_lag(pf->lag);
1085 return num_vfs;
1086 }
1087
1088
1089
1090
1091
1092
1093
1094
1095 void ice_process_vflr_event(struct ice_pf *pf)
1096 {
1097 struct ice_hw *hw = &pf->hw;
1098 struct ice_vf *vf;
1099 unsigned int bkt;
1100 u32 reg;
1101
1102 if (!test_and_clear_bit(ICE_VFLR_EVENT_PENDING, pf->state) ||
1103 !ice_has_vfs(pf))
1104 return;
1105
1106 mutex_lock(&pf->vfs.table_lock);
1107 ice_for_each_vf(pf, bkt, vf) {
1108 u32 reg_idx, bit_idx;
1109
1110 reg_idx = (hw->func_caps.vf_base_id + vf->vf_id) / 32;
1111 bit_idx = (hw->func_caps.vf_base_id + vf->vf_id) % 32;
1112
1113 reg = rd32(hw, GLGEN_VFLRSTAT(reg_idx));
1114 if (reg & BIT(bit_idx))
1115
1116 ice_reset_vf(vf, ICE_VF_RESET_VFLR | ICE_VF_RESET_LOCK);
1117 }
1118 mutex_unlock(&pf->vfs.table_lock);
1119 }
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133 static struct ice_vf *ice_get_vf_from_pfq(struct ice_pf *pf, u16 pfq)
1134 {
1135 struct ice_vf *vf;
1136 unsigned int bkt;
1137
1138 rcu_read_lock();
1139 ice_for_each_vf_rcu(pf, bkt, vf) {
1140 struct ice_vsi *vsi;
1141 u16 rxq_idx;
1142
1143 vsi = ice_get_vf_vsi(vf);
1144 if (!vsi)
1145 continue;
1146
1147 ice_for_each_rxq(vsi, rxq_idx)
1148 if (vsi->rxq_map[rxq_idx] == pfq) {
1149 struct ice_vf *found;
1150
1151 if (kref_get_unless_zero(&vf->refcnt))
1152 found = vf;
1153 else
1154 found = NULL;
1155 rcu_read_unlock();
1156 return found;
1157 }
1158 }
1159 rcu_read_unlock();
1160
1161 return NULL;
1162 }
1163
1164
1165
1166
1167
1168
1169 static u32 ice_globalq_to_pfq(struct ice_pf *pf, u32 globalq)
1170 {
1171 return globalq - pf->hw.func_caps.common_cap.rxq_first_id;
1172 }
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183 void
1184 ice_vf_lan_overflow_event(struct ice_pf *pf, struct ice_rq_event_info *event)
1185 {
1186 u32 gldcb_rtctq, queue;
1187 struct ice_vf *vf;
1188
1189 gldcb_rtctq = le32_to_cpu(event->desc.params.lan_overflow.prtdcb_ruptq);
1190 dev_dbg(ice_pf_to_dev(pf), "GLDCB_RTCTQ: 0x%08x\n", gldcb_rtctq);
1191
1192
1193 queue = (gldcb_rtctq & GLDCB_RTCTQ_RXQNUM_M) >>
1194 GLDCB_RTCTQ_RXQNUM_S;
1195
1196 vf = ice_get_vf_from_pfq(pf, ice_globalq_to_pfq(pf, queue));
1197 if (!vf)
1198 return;
1199
1200 ice_reset_vf(vf, ICE_VF_RESET_NOTIFY | ICE_VF_RESET_LOCK);
1201 ice_put_vf(vf);
1202 }
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212 int ice_set_vf_spoofchk(struct net_device *netdev, int vf_id, bool ena)
1213 {
1214 struct ice_netdev_priv *np = netdev_priv(netdev);
1215 struct ice_pf *pf = np->vsi->back;
1216 struct ice_vsi *vf_vsi;
1217 struct device *dev;
1218 struct ice_vf *vf;
1219 int ret;
1220
1221 dev = ice_pf_to_dev(pf);
1222
1223 vf = ice_get_vf_by_id(pf, vf_id);
1224 if (!vf)
1225 return -EINVAL;
1226
1227 ret = ice_check_vf_ready_for_cfg(vf);
1228 if (ret)
1229 goto out_put_vf;
1230
1231 vf_vsi = ice_get_vf_vsi(vf);
1232 if (!vf_vsi) {
1233 netdev_err(netdev, "VSI %d for VF %d is null\n",
1234 vf->lan_vsi_idx, vf->vf_id);
1235 ret = -EINVAL;
1236 goto out_put_vf;
1237 }
1238
1239 if (vf_vsi->type != ICE_VSI_VF) {
1240 netdev_err(netdev, "Type %d of VSI %d for VF %d is no ICE_VSI_VF\n",
1241 vf_vsi->type, vf_vsi->vsi_num, vf->vf_id);
1242 ret = -ENODEV;
1243 goto out_put_vf;
1244 }
1245
1246 if (ena == vf->spoofchk) {
1247 dev_dbg(dev, "VF spoofchk already %s\n", ena ? "ON" : "OFF");
1248 ret = 0;
1249 goto out_put_vf;
1250 }
1251
1252 ret = ice_vsi_apply_spoofchk(vf_vsi, ena);
1253 if (ret)
1254 dev_err(dev, "Failed to set spoofchk %s for VF %d VSI %d\n error %d\n",
1255 ena ? "ON" : "OFF", vf->vf_id, vf_vsi->vsi_num, ret);
1256 else
1257 vf->spoofchk = ena;
1258
1259 out_put_vf:
1260 ice_put_vf(vf);
1261 return ret;
1262 }
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272 int
1273 ice_get_vf_cfg(struct net_device *netdev, int vf_id, struct ifla_vf_info *ivi)
1274 {
1275 struct ice_pf *pf = ice_netdev_to_pf(netdev);
1276 struct ice_vf *vf;
1277 int ret;
1278
1279 vf = ice_get_vf_by_id(pf, vf_id);
1280 if (!vf)
1281 return -EINVAL;
1282
1283 ret = ice_check_vf_ready_for_cfg(vf);
1284 if (ret)
1285 goto out_put_vf;
1286
1287 ivi->vf = vf_id;
1288 ether_addr_copy(ivi->mac, vf->hw_lan_addr.addr);
1289
1290
1291 ivi->vlan = ice_vf_get_port_vlan_id(vf);
1292 ivi->qos = ice_vf_get_port_vlan_prio(vf);
1293 if (ice_vf_is_port_vlan_ena(vf))
1294 ivi->vlan_proto = cpu_to_be16(ice_vf_get_port_vlan_tpid(vf));
1295
1296 ivi->trusted = vf->trusted;
1297 ivi->spoofchk = vf->spoofchk;
1298 if (!vf->link_forced)
1299 ivi->linkstate = IFLA_VF_LINK_STATE_AUTO;
1300 else if (vf->link_up)
1301 ivi->linkstate = IFLA_VF_LINK_STATE_ENABLE;
1302 else
1303 ivi->linkstate = IFLA_VF_LINK_STATE_DISABLE;
1304 ivi->max_tx_rate = vf->max_tx_rate;
1305 ivi->min_tx_rate = vf->min_tx_rate;
1306
1307 out_put_vf:
1308 ice_put_vf(vf);
1309 return ret;
1310 }
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320 int ice_set_vf_mac(struct net_device *netdev, int vf_id, u8 *mac)
1321 {
1322 struct ice_pf *pf = ice_netdev_to_pf(netdev);
1323 struct ice_vf *vf;
1324 int ret;
1325
1326 if (is_multicast_ether_addr(mac)) {
1327 netdev_err(netdev, "%pM not a valid unicast address\n", mac);
1328 return -EINVAL;
1329 }
1330
1331 vf = ice_get_vf_by_id(pf, vf_id);
1332 if (!vf)
1333 return -EINVAL;
1334
1335
1336 if (ether_addr_equal(vf->dev_lan_addr.addr, mac) &&
1337 ether_addr_equal(vf->hw_lan_addr.addr, mac)) {
1338 ret = 0;
1339 goto out_put_vf;
1340 }
1341
1342 ret = ice_check_vf_ready_for_cfg(vf);
1343 if (ret)
1344 goto out_put_vf;
1345
1346 mutex_lock(&vf->cfg_lock);
1347
1348
1349
1350
1351 ether_addr_copy(vf->dev_lan_addr.addr, mac);
1352 ether_addr_copy(vf->hw_lan_addr.addr, mac);
1353 if (is_zero_ether_addr(mac)) {
1354
1355 vf->pf_set_mac = false;
1356 netdev_info(netdev, "Removing MAC on VF %d. VF driver will be reinitialized\n",
1357 vf->vf_id);
1358 } else {
1359
1360 vf->pf_set_mac = true;
1361 netdev_info(netdev, "Setting MAC %pM on VF %d. VF driver will be reinitialized\n",
1362 mac, vf_id);
1363 }
1364
1365 ice_reset_vf(vf, ICE_VF_RESET_NOTIFY);
1366 mutex_unlock(&vf->cfg_lock);
1367
1368 out_put_vf:
1369 ice_put_vf(vf);
1370 return ret;
1371 }
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381 int ice_set_vf_trust(struct net_device *netdev, int vf_id, bool trusted)
1382 {
1383 struct ice_pf *pf = ice_netdev_to_pf(netdev);
1384 struct ice_vf *vf;
1385 int ret;
1386
1387 if (ice_is_eswitch_mode_switchdev(pf)) {
1388 dev_info(ice_pf_to_dev(pf), "Trusted VF is forbidden in switchdev mode\n");
1389 return -EOPNOTSUPP;
1390 }
1391
1392 vf = ice_get_vf_by_id(pf, vf_id);
1393 if (!vf)
1394 return -EINVAL;
1395
1396 ret = ice_check_vf_ready_for_cfg(vf);
1397 if (ret)
1398 goto out_put_vf;
1399
1400
1401 if (trusted == vf->trusted) {
1402 ret = 0;
1403 goto out_put_vf;
1404 }
1405
1406 mutex_lock(&vf->cfg_lock);
1407
1408 vf->trusted = trusted;
1409 ice_reset_vf(vf, ICE_VF_RESET_NOTIFY);
1410 dev_info(ice_pf_to_dev(pf), "VF %u is now %strusted\n",
1411 vf_id, trusted ? "" : "un");
1412
1413 mutex_unlock(&vf->cfg_lock);
1414
1415 out_put_vf:
1416 ice_put_vf(vf);
1417 return ret;
1418 }
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428 int ice_set_vf_link_state(struct net_device *netdev, int vf_id, int link_state)
1429 {
1430 struct ice_pf *pf = ice_netdev_to_pf(netdev);
1431 struct ice_vf *vf;
1432 int ret;
1433
1434 vf = ice_get_vf_by_id(pf, vf_id);
1435 if (!vf)
1436 return -EINVAL;
1437
1438 ret = ice_check_vf_ready_for_cfg(vf);
1439 if (ret)
1440 goto out_put_vf;
1441
1442 switch (link_state) {
1443 case IFLA_VF_LINK_STATE_AUTO:
1444 vf->link_forced = false;
1445 break;
1446 case IFLA_VF_LINK_STATE_ENABLE:
1447 vf->link_forced = true;
1448 vf->link_up = true;
1449 break;
1450 case IFLA_VF_LINK_STATE_DISABLE:
1451 vf->link_forced = true;
1452 vf->link_up = false;
1453 break;
1454 default:
1455 ret = -EINVAL;
1456 goto out_put_vf;
1457 }
1458
1459 ice_vc_notify_vf_link_state(vf);
1460
1461 out_put_vf:
1462 ice_put_vf(vf);
1463 return ret;
1464 }
1465
1466
1467
1468
1469
1470 static int ice_calc_all_vfs_min_tx_rate(struct ice_pf *pf)
1471 {
1472 struct ice_vf *vf;
1473 unsigned int bkt;
1474 int rate = 0;
1475
1476 rcu_read_lock();
1477 ice_for_each_vf_rcu(pf, bkt, vf)
1478 rate += vf->min_tx_rate;
1479 rcu_read_unlock();
1480
1481 return rate;
1482 }
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496 static bool
1497 ice_min_tx_rate_oversubscribed(struct ice_vf *vf, int min_tx_rate)
1498 {
1499 struct ice_vsi *vsi = ice_get_vf_vsi(vf);
1500 int all_vfs_min_tx_rate;
1501 int link_speed_mbps;
1502
1503 if (WARN_ON(!vsi))
1504 return false;
1505
1506 link_speed_mbps = ice_get_link_speed_mbps(vsi);
1507 all_vfs_min_tx_rate = ice_calc_all_vfs_min_tx_rate(vf->pf);
1508
1509
1510 all_vfs_min_tx_rate -= vf->min_tx_rate;
1511
1512 if (all_vfs_min_tx_rate + min_tx_rate > link_speed_mbps) {
1513 dev_err(ice_pf_to_dev(vf->pf), "min_tx_rate of %d Mbps on VF %u would cause oversubscription of %d Mbps based on the current link speed %d Mbps\n",
1514 min_tx_rate, vf->vf_id,
1515 all_vfs_min_tx_rate + min_tx_rate - link_speed_mbps,
1516 link_speed_mbps);
1517 return true;
1518 }
1519
1520 return false;
1521 }
1522
1523
1524
1525
1526
1527
1528
1529
1530 int
1531 ice_set_vf_bw(struct net_device *netdev, int vf_id, int min_tx_rate,
1532 int max_tx_rate)
1533 {
1534 struct ice_pf *pf = ice_netdev_to_pf(netdev);
1535 struct ice_vsi *vsi;
1536 struct device *dev;
1537 struct ice_vf *vf;
1538 int ret;
1539
1540 dev = ice_pf_to_dev(pf);
1541
1542 vf = ice_get_vf_by_id(pf, vf_id);
1543 if (!vf)
1544 return -EINVAL;
1545
1546 ret = ice_check_vf_ready_for_cfg(vf);
1547 if (ret)
1548 goto out_put_vf;
1549
1550 vsi = ice_get_vf_vsi(vf);
1551 if (!vsi) {
1552 ret = -EINVAL;
1553 goto out_put_vf;
1554 }
1555
1556 if (min_tx_rate && ice_is_dcb_active(pf)) {
1557 dev_err(dev, "DCB on PF is currently enabled. VF min Tx rate limiting not allowed on this PF.\n");
1558 ret = -EOPNOTSUPP;
1559 goto out_put_vf;
1560 }
1561
1562 if (ice_min_tx_rate_oversubscribed(vf, min_tx_rate)) {
1563 ret = -EINVAL;
1564 goto out_put_vf;
1565 }
1566
1567 if (vf->min_tx_rate != (unsigned int)min_tx_rate) {
1568 ret = ice_set_min_bw_limit(vsi, (u64)min_tx_rate * 1000);
1569 if (ret) {
1570 dev_err(dev, "Unable to set min-tx-rate for VF %d\n",
1571 vf->vf_id);
1572 goto out_put_vf;
1573 }
1574
1575 vf->min_tx_rate = min_tx_rate;
1576 }
1577
1578 if (vf->max_tx_rate != (unsigned int)max_tx_rate) {
1579 ret = ice_set_max_bw_limit(vsi, (u64)max_tx_rate * 1000);
1580 if (ret) {
1581 dev_err(dev, "Unable to set max-tx-rate for VF %d\n",
1582 vf->vf_id);
1583 goto out_put_vf;
1584 }
1585
1586 vf->max_tx_rate = max_tx_rate;
1587 }
1588
1589 out_put_vf:
1590 ice_put_vf(vf);
1591 return ret;
1592 }
1593
1594
1595
1596
1597
1598
1599
1600 int ice_get_vf_stats(struct net_device *netdev, int vf_id,
1601 struct ifla_vf_stats *vf_stats)
1602 {
1603 struct ice_pf *pf = ice_netdev_to_pf(netdev);
1604 struct ice_eth_stats *stats;
1605 struct ice_vsi *vsi;
1606 struct ice_vf *vf;
1607 int ret;
1608
1609 vf = ice_get_vf_by_id(pf, vf_id);
1610 if (!vf)
1611 return -EINVAL;
1612
1613 ret = ice_check_vf_ready_for_cfg(vf);
1614 if (ret)
1615 goto out_put_vf;
1616
1617 vsi = ice_get_vf_vsi(vf);
1618 if (!vsi) {
1619 ret = -EINVAL;
1620 goto out_put_vf;
1621 }
1622
1623 ice_update_eth_stats(vsi);
1624 stats = &vsi->eth_stats;
1625
1626 memset(vf_stats, 0, sizeof(*vf_stats));
1627
1628 vf_stats->rx_packets = stats->rx_unicast + stats->rx_broadcast +
1629 stats->rx_multicast;
1630 vf_stats->tx_packets = stats->tx_unicast + stats->tx_broadcast +
1631 stats->tx_multicast;
1632 vf_stats->rx_bytes = stats->rx_bytes;
1633 vf_stats->tx_bytes = stats->tx_bytes;
1634 vf_stats->broadcast = stats->rx_broadcast;
1635 vf_stats->multicast = stats->rx_multicast;
1636 vf_stats->rx_dropped = stats->rx_discards;
1637 vf_stats->tx_dropped = stats->tx_discards;
1638
1639 out_put_vf:
1640 ice_put_vf(vf);
1641 return ret;
1642 }
1643
1644
1645
1646
1647
1648
1649
1650
1651
1652
1653 static bool
1654 ice_is_supported_port_vlan_proto(struct ice_hw *hw, u16 vlan_proto)
1655 {
1656 bool is_supported = false;
1657
1658 switch (vlan_proto) {
1659 case ETH_P_8021Q:
1660 is_supported = true;
1661 break;
1662 case ETH_P_8021AD:
1663 if (ice_is_dvm_ena(hw))
1664 is_supported = true;
1665 break;
1666 }
1667
1668 return is_supported;
1669 }
1670
1671
1672
1673
1674
1675
1676
1677
1678
1679
1680
1681 int
1682 ice_set_vf_port_vlan(struct net_device *netdev, int vf_id, u16 vlan_id, u8 qos,
1683 __be16 vlan_proto)
1684 {
1685 struct ice_pf *pf = ice_netdev_to_pf(netdev);
1686 u16 local_vlan_proto = ntohs(vlan_proto);
1687 struct device *dev;
1688 struct ice_vf *vf;
1689 int ret;
1690
1691 dev = ice_pf_to_dev(pf);
1692
1693 if (vlan_id >= VLAN_N_VID || qos > 7) {
1694 dev_err(dev, "Invalid Port VLAN parameters for VF %d, ID %d, QoS %d\n",
1695 vf_id, vlan_id, qos);
1696 return -EINVAL;
1697 }
1698
1699 if (!ice_is_supported_port_vlan_proto(&pf->hw, local_vlan_proto)) {
1700 dev_err(dev, "VF VLAN protocol 0x%04x is not supported\n",
1701 local_vlan_proto);
1702 return -EPROTONOSUPPORT;
1703 }
1704
1705 vf = ice_get_vf_by_id(pf, vf_id);
1706 if (!vf)
1707 return -EINVAL;
1708
1709 ret = ice_check_vf_ready_for_cfg(vf);
1710 if (ret)
1711 goto out_put_vf;
1712
1713 if (ice_vf_get_port_vlan_prio(vf) == qos &&
1714 ice_vf_get_port_vlan_tpid(vf) == local_vlan_proto &&
1715 ice_vf_get_port_vlan_id(vf) == vlan_id) {
1716
1717 dev_dbg(dev, "Duplicate port VLAN %u, QoS %u, TPID 0x%04x request\n",
1718 vlan_id, qos, local_vlan_proto);
1719 ret = 0;
1720 goto out_put_vf;
1721 }
1722
1723 mutex_lock(&vf->cfg_lock);
1724
1725 vf->port_vlan_info = ICE_VLAN(local_vlan_proto, vlan_id, qos);
1726 if (ice_vf_is_port_vlan_ena(vf))
1727 dev_info(dev, "Setting VLAN %u, QoS %u, TPID 0x%04x on VF %d\n",
1728 vlan_id, qos, local_vlan_proto, vf_id);
1729 else
1730 dev_info(dev, "Clearing port VLAN on VF %d\n", vf_id);
1731
1732 ice_reset_vf(vf, ICE_VF_RESET_NOTIFY);
1733 mutex_unlock(&vf->cfg_lock);
1734
1735 out_put_vf:
1736 ice_put_vf(vf);
1737 return ret;
1738 }
1739
1740
1741
1742
1743
1744 void ice_print_vf_rx_mdd_event(struct ice_vf *vf)
1745 {
1746 struct ice_pf *pf = vf->pf;
1747 struct device *dev;
1748
1749 dev = ice_pf_to_dev(pf);
1750
1751 dev_info(dev, "%d Rx Malicious Driver Detection events detected on PF %d VF %d MAC %pM. mdd-auto-reset-vfs=%s\n",
1752 vf->mdd_rx_events.count, pf->hw.pf_id, vf->vf_id,
1753 vf->dev_lan_addr.addr,
1754 test_bit(ICE_FLAG_MDD_AUTO_RESET_VF, pf->flags)
1755 ? "on" : "off");
1756 }
1757
1758
1759
1760
1761
1762
1763
1764 void ice_print_vfs_mdd_events(struct ice_pf *pf)
1765 {
1766 struct device *dev = ice_pf_to_dev(pf);
1767 struct ice_hw *hw = &pf->hw;
1768 struct ice_vf *vf;
1769 unsigned int bkt;
1770
1771
1772 if (!test_and_clear_bit(ICE_MDD_VF_PRINT_PENDING, pf->state))
1773 return;
1774
1775
1776 if (time_is_after_jiffies(pf->vfs.last_printed_mdd_jiffies + HZ * 1))
1777 return;
1778
1779 pf->vfs.last_printed_mdd_jiffies = jiffies;
1780
1781 mutex_lock(&pf->vfs.table_lock);
1782 ice_for_each_vf(pf, bkt, vf) {
1783
1784 if (vf->mdd_rx_events.count != vf->mdd_rx_events.last_printed) {
1785 vf->mdd_rx_events.last_printed =
1786 vf->mdd_rx_events.count;
1787 ice_print_vf_rx_mdd_event(vf);
1788 }
1789
1790
1791 if (vf->mdd_tx_events.count != vf->mdd_tx_events.last_printed) {
1792 vf->mdd_tx_events.last_printed =
1793 vf->mdd_tx_events.count;
1794
1795 dev_info(dev, "%d Tx Malicious Driver Detection events detected on PF %d VF %d MAC %pM.\n",
1796 vf->mdd_tx_events.count, hw->pf_id, vf->vf_id,
1797 vf->dev_lan_addr.addr);
1798 }
1799 }
1800 mutex_unlock(&pf->vfs.table_lock);
1801 }
1802
1803
1804
1805
1806
1807
1808
1809
1810 void ice_restore_all_vfs_msi_state(struct pci_dev *pdev)
1811 {
1812 u16 vf_id;
1813 int pos;
1814
1815 if (!pci_num_vf(pdev))
1816 return;
1817
1818 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
1819 if (pos) {
1820 struct pci_dev *vfdev;
1821
1822 pci_read_config_word(pdev, pos + PCI_SRIOV_VF_DID,
1823 &vf_id);
1824 vfdev = pci_get_device(pdev->vendor, vf_id, NULL);
1825 while (vfdev) {
1826 if (vfdev->is_virtfn && vfdev->physfn == pdev)
1827 pci_restore_msi_state(vfdev);
1828 vfdev = pci_get_device(pdev->vendor, vf_id,
1829 vfdev);
1830 }
1831 }
1832 }
1833
1834
1835
1836
1837
1838
1839
1840
1841 bool
1842 ice_is_malicious_vf(struct ice_pf *pf, struct ice_rq_event_info *event,
1843 u16 num_msg_proc, u16 num_msg_pending)
1844 {
1845 s16 vf_id = le16_to_cpu(event->desc.retval);
1846 struct device *dev = ice_pf_to_dev(pf);
1847 struct ice_mbx_data mbxdata;
1848 bool malvf = false;
1849 struct ice_vf *vf;
1850 int status;
1851
1852 vf = ice_get_vf_by_id(pf, vf_id);
1853 if (!vf)
1854 return false;
1855
1856 if (test_bit(ICE_VF_STATE_DIS, vf->vf_states))
1857 goto out_put_vf;
1858
1859 mbxdata.num_msg_proc = num_msg_proc;
1860 mbxdata.num_pending_arq = num_msg_pending;
1861 mbxdata.max_num_msgs_mbx = pf->hw.mailboxq.num_rq_entries;
1862 #define ICE_MBX_OVERFLOW_WATERMARK 64
1863 mbxdata.async_watermark_val = ICE_MBX_OVERFLOW_WATERMARK;
1864
1865
1866 status = ice_mbx_vf_state_handler(&pf->hw, &mbxdata, vf_id, &malvf);
1867 if (status)
1868 goto out_put_vf;
1869
1870 if (malvf) {
1871 bool report_vf = false;
1872
1873
1874
1875
1876 status = ice_mbx_report_malvf(&pf->hw, pf->vfs.malvfs,
1877 ICE_MAX_SRIOV_VFS, vf_id,
1878 &report_vf);
1879 if (status)
1880 dev_dbg(dev, "Error reporting malicious VF\n");
1881
1882 if (report_vf) {
1883 struct ice_vsi *pf_vsi = ice_get_main_vsi(pf);
1884
1885 if (pf_vsi)
1886 dev_warn(dev, "VF MAC %pM on PF MAC %pM is generating asynchronous messages and may be overflowing the PF message queue. Please see the Adapter User Guide for more information\n",
1887 &vf->dev_lan_addr.addr[0],
1888 pf_vsi->netdev->dev_addr);
1889 }
1890 }
1891
1892 out_put_vf:
1893 ice_put_vf(vf);
1894 return malvf;
1895 }