intel/ice/ice_sbq_cmd.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /* Copyright (C) 2021, Intel Corporation. */
0003
0004 #ifndef _ICE_SBQ_CMD_H_
0005 #define _ICE_SBQ_CMD_H_
0006
0007 /* This header file defines the Sideband Queue commands, error codes and
0008  * descriptor format. It is shared between Firmware and Software.
0009  */
0010
0011 /* Sideband Queue command structure and opcodes */
0012 enum ice_sbq_opc {
0013     /* Sideband Queue commands */
0014     ice_sbq_opc_neigh_dev_req           = 0x0C00,
0015     ice_sbq_opc_neigh_dev_ev            = 0x0C01
0016 };
0017
0018 /* Sideband Queue descriptor. Indirect command
0019  * and non posted
0020  */
0021 struct ice_sbq_cmd_desc {
0022     __le16 flags;
0023     __le16 opcode;
0024     __le16 datalen;
0025     __le16 cmd_retval;
0026
0027     /* Opaque message data */
0028     __le32 cookie_high;
0029     __le32 cookie_low;
0030
0031     union {
0032         __le16 cmd_len;
0033         __le16 cmpl_len;
0034     } param0;
0035
0036     u8 reserved[6];
0037     __le32 addr_high;
0038     __le32 addr_low;
0039 };
0040
0041 struct ice_sbq_evt_desc {
0042     __le16 flags;
0043     __le16 opcode;
0044     __le16 datalen;
0045     __le16 cmd_retval;
0046     u8 data[24];
0047 };
0048
0049 enum ice_sbq_msg_dev {
0050     rmn_0   = 0x02,
0051     rmn_1   = 0x03,
0052     rmn_2   = 0x04,
0053     cgu = 0x06
0054 };
0055
0056 enum ice_sbq_msg_opcode {
0057     ice_sbq_msg_rd  = 0x00,
0058     ice_sbq_msg_wr  = 0x01
0059 };
0060
0061 #define ICE_SBQ_MSG_FLAGS   0x40
0062 #define ICE_SBQ_MSG_SBE_FBE 0x0F
0063
0064 struct ice_sbq_msg_req {
0065     u8 dest_dev;
0066     u8 src_dev;
0067     u8 opcode;
0068     u8 flags;
0069     u8 sbe_fbe;
0070     u8 func_id;
0071     __le16 msg_addr_low;
0072     __le32 msg_addr_high;
0073     __le32 data;
0074 };
0075
0076 struct ice_sbq_msg_cmpl {
0077     u8 dest_dev;
0078     u8 src_dev;
0079     u8 opcode;
0080     u8 flags;
0081     __le32 data;
0082 };
0083
0084 /* Internal struct */
0085 struct ice_sbq_msg_input {
0086     u8 dest_dev;
0087     u8 opcode;
0088     u16 msg_addr_low;
0089     u32 msg_addr_high;
0090     u32 data;
0091 };
0092 #endif /* _ICE_SBQ_CMD_H_ */