intel/ice/ice_ptp.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /* Copyright (C) 2021, Intel Corporation. */
0003
0004 #ifndef _ICE_PTP_H_
0005 #define _ICE_PTP_H_
0006
0007 #include <linux/ptp_clock_kernel.h>
0008 #include <linux/kthread.h>
0009
0010 #include "ice_ptp_hw.h"
0011
0012 enum ice_ptp_pin_e810 {
0013     GPIO_20 = 0,
0014     GPIO_21,
0015     GPIO_22,
0016     GPIO_23,
0017     NUM_PTP_PIN_E810
0018 };
0019
0020 enum ice_ptp_pin_e810t {
0021     GNSS = 0,
0022     SMA1,
0023     UFL1,
0024     SMA2,
0025     UFL2,
0026     NUM_PTP_PINS_E810T
0027 };
0028
0029 struct ice_perout_channel {
0030     bool ena;
0031     u32 gpio_pin;
0032     u64 period;
0033     u64 start_time;
0034 };
0035
0036 /* The ice hardware captures Tx hardware timestamps in the PHY. The timestamp
0037  * is stored in a buffer of registers. Depending on the specific hardware,
0038  * this buffer might be shared across multiple PHY ports.
0039  *
0040  * On transmit of a packet to be timestamped, software is responsible for
0041  * selecting an open index. Hardware makes no attempt to lock or prevent
0042  * re-use of an index for multiple packets.
0043  *
0044  * To handle this, timestamp indexes must be tracked by software to ensure
0045  * that an index is not re-used for multiple transmitted packets. The
0046  * structures and functions declared in this file track the available Tx
0047  * register indexes, as well as provide storage for the SKB pointers.
0048  *
0049  * To allow multiple ports to access the shared register block independently,
0050  * the blocks are split up so that indexes are assigned to each port based on
0051  * hardware logical port number.
0052  *
0053  * The timestamp blocks are handled differently for E810- and E822-based
0054  * devices. In E810 devices, each port has its own block of timestamps, while in
0055  * E822 there is a need to logically break the block of registers into smaller
0056  * chunks based on the port number to avoid collisions.
0057  *
0058  * Example for port 5 in E810:
0059  *  +--------+--------+--------+--------+--------+--------+--------+--------+
0060  *  |register|register|register|register|register|register|register|register|
0061  *  | block  | block  | block  | block  | block  | block  | block  | block  |
0062  *  |  for   |  for   |  for   |  for   |  for   |  for   |  for   |  for   |
0063  *  | port 0 | port 1 | port 2 | port 3 | port 4 | port 5 | port 6 | port 7 |
0064  *  +--------+--------+--------+--------+--------+--------+--------+--------+
0065  *                                               ^^
0066  *                                               ||
0067  *                                               |---  quad offset is always 0
0068  *                                               ---- quad number
0069  *
0070  * Example for port 5 in E822:
0071  * +-----------------------------+-----------------------------+
0072  * |  register block for quad 0  |  register block for quad 1  |
0073  * |+------+------+------+------+|+------+------+------+------+|
0074  * ||port 0|port 1|port 2|port 3|||port 0|port 1|port 2|port 3||
0075  * |+------+------+------+------+|+------+------+------+------+|
0076  * +-----------------------------+-------^---------------------+
0077  *                                ^      |
0078  *                                |      --- quad offset*
0079  *                                ---- quad number
0080  *
0081  *   * PHY port 5 is port 1 in quad 1
0082  *
0083  */
0084
0085 /**
0086  * struct ice_tx_tstamp - Tracking for a single Tx timestamp
0087  * @skb: pointer to the SKB for this timestamp request
0088  * @start: jiffies when the timestamp was first requested
0089  * @cached_tstamp: last read timestamp
0090  *
0091  * This structure tracks a single timestamp request. The SKB pointer is
0092  * provided when initiating a request. The start time is used to ensure that
0093  * we discard old requests that were not fulfilled within a 2 second time
0094  * window.
0095  * Timestamp values in the PHY are read only and do not get cleared except at
0096  * hardware reset or when a new timestamp value is captured. The cached_tstamp
0097  * field is used to detect the case where a new timestamp has not yet been
0098  * captured, ensuring that we avoid sending stale timestamp data to the stack.
0099  */
0100 struct ice_tx_tstamp {
0101     struct sk_buff *skb;
0102     unsigned long start;
0103     u64 cached_tstamp;
0104 };
0105
0106 /**
0107  * struct ice_ptp_tx - Tracking structure for all Tx timestamp requests on a port
0108  * @work: work function to handle processing of Tx timestamps
0109  * @lock: lock to prevent concurrent write to in_use bitmap
0110  * @tstamps: array of len to store outstanding requests
0111  * @in_use: bitmap of len to indicate which slots are in use
0112  * @quad: which quad the timestamps are captured in
0113  * @quad_offset: offset into timestamp block of the quad to get the real index
0114  * @len: length of the tstamps and in_use fields.
0115  * @init: if true, the tracker is initialized;
0116  * @calibrating: if true, the PHY is calibrating the Tx offset. During this
0117  *               window, timestamps are temporarily disabled.
0118  */
0119 struct ice_ptp_tx {
0120     struct kthread_work work;
0121     spinlock_t lock; /* lock protecting in_use bitmap */
0122     struct ice_tx_tstamp *tstamps;
0123     unsigned long *in_use;
0124     u8 quad;
0125     u8 quad_offset;
0126     u8 len;
0127     u8 init;
0128     u8 calibrating;
0129 };
0130
0131 /* Quad and port information for initializing timestamp blocks */
0132 #define INDEX_PER_QUAD          64
0133 #define INDEX_PER_PORT          (INDEX_PER_QUAD / ICE_PORTS_PER_QUAD)
0134
0135 /**
0136  * struct ice_ptp_port - data used to initialize an external port for PTP
0137  *
0138  * This structure contains data indicating whether a single external port is
0139  * ready for PTP functionality. It is used to track the port initialization
0140  * and determine when the port's PHY offset is valid.
0141  *
0142  * @tx: Tx timestamp tracking for this port
0143  * @ov_work: delayed work task for tracking when PHY offset is valid
0144  * @ps_lock: mutex used to protect the overall PTP PHY start procedure
0145  * @link_up: indicates whether the link is up
0146  * @tx_fifo_busy_cnt: number of times the Tx FIFO was busy
0147  * @port_num: the port number this structure represents
0148  */
0149 struct ice_ptp_port {
0150     struct ice_ptp_tx tx;
0151     struct kthread_delayed_work ov_work;
0152     struct mutex ps_lock; /* protects overall PTP PHY start procedure */
0153     bool link_up;
0154     u8 tx_fifo_busy_cnt;
0155     u8 port_num;
0156 };
0157
0158 #define GLTSYN_TGT_H_IDX_MAX        4
0159
0160 /**
0161  * struct ice_ptp - data used for integrating with CONFIG_PTP_1588_CLOCK
0162  * @port: data for the PHY port initialization procedure
0163  * @work: delayed work function for periodic tasks
0164  * @extts_work: work function for handling external Tx timestamps
0165  * @cached_phc_time: a cached copy of the PHC time for timestamp extension
0166  * @ext_ts_chan: the external timestamp channel in use
0167  * @ext_ts_irq: the external timestamp IRQ in use
0168  * @kworker: kwork thread for handling periodic work
0169  * @perout_channels: periodic output data
0170  * @info: structure defining PTP hardware capabilities
0171  * @clock: pointer to registered PTP clock device
0172  * @tstamp_config: hardware timestamping configuration
0173  * @reset_time: kernel time after clock stop on reset
0174  */
0175 struct ice_ptp {
0176     struct ice_ptp_port port;
0177     struct kthread_delayed_work work;
0178     struct kthread_work extts_work;
0179     u64 cached_phc_time;
0180     u8 ext_ts_chan;
0181     u8 ext_ts_irq;
0182     struct kthread_worker *kworker;
0183     struct ice_perout_channel perout_channels[GLTSYN_TGT_H_IDX_MAX];
0184     struct ptp_clock_info info;
0185     struct ptp_clock *clock;
0186     struct hwtstamp_config tstamp_config;
0187     u64 reset_time;
0188 };
0189
0190 #define __ptp_port_to_ptp(p) \
0191     container_of((p), struct ice_ptp, port)
0192 #define ptp_port_to_pf(p) \
0193     container_of(__ptp_port_to_ptp((p)), struct ice_pf, ptp)
0194
0195 #define __ptp_info_to_ptp(i) \
0196     container_of((i), struct ice_ptp, info)
0197 #define ptp_info_to_pf(i) \
0198     container_of(__ptp_info_to_ptp((i)), struct ice_pf, ptp)
0199
0200 #define PFTSYN_SEM_BYTES        4
0201 #define PTP_SHARED_CLK_IDX_VALID    BIT(31)
0202 #define TS_CMD_MASK         0xF
0203 #define SYNC_EXEC_CMD           0x3
0204 #define ICE_PTP_TS_VALID        BIT(0)
0205
0206 #define FIFO_EMPTY          BIT(2)
0207 #define FIFO_OK             0xFF
0208 #define ICE_PTP_FIFO_NUM_CHECKS     5
0209 /* Per-channel register definitions */
0210 #define GLTSYN_AUX_OUT(_chan, _idx) (GLTSYN_AUX_OUT_0(_idx) + ((_chan) * 8))
0211 #define GLTSYN_AUX_IN(_chan, _idx)  (GLTSYN_AUX_IN_0(_idx) + ((_chan) * 8))
0212 #define GLTSYN_CLKO(_chan, _idx)    (GLTSYN_CLKO_0(_idx) + ((_chan) * 8))
0213 #define GLTSYN_TGT_L(_chan, _idx)   (GLTSYN_TGT_L_0(_idx) + ((_chan) * 16))
0214 #define GLTSYN_TGT_H(_chan, _idx)   (GLTSYN_TGT_H_0(_idx) + ((_chan) * 16))
0215 #define GLTSYN_EVNT_L(_chan, _idx)  (GLTSYN_EVNT_L_0(_idx) + ((_chan) * 16))
0216 #define GLTSYN_EVNT_H(_chan, _idx)  (GLTSYN_EVNT_H_0(_idx) + ((_chan) * 16))
0217 #define GLTSYN_EVNT_H_IDX_MAX       3
0218
0219 /* Pin definitions for PTP PPS out */
0220 #define PPS_CLK_GEN_CHAN        3
0221 #define PPS_CLK_SRC_CHAN        2
0222 #define PPS_PIN_INDEX           5
0223 #define TIME_SYNC_PIN_INDEX     4
0224 #define N_EXT_TS_E810           3
0225 #define N_PER_OUT_E810          4
0226 #define N_PER_OUT_E810T         3
0227 #define N_PER_OUT_E810T_NO_SMA      2
0228 #define N_EXT_TS_E810_NO_SMA        2
0229 #define ETH_GLTSYN_ENA(_i)      (0x03000348 + ((_i) * 4))
0230
0231 #if IS_ENABLED(CONFIG_PTP_1588_CLOCK)
0232 struct ice_pf;
0233 int ice_ptp_set_ts_config(struct ice_pf *pf, struct ifreq *ifr);
0234 int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr);
0235 void ice_ptp_cfg_timestamp(struct ice_pf *pf, bool ena);
0236 int ice_get_ptp_clock_index(struct ice_pf *pf);
0237
0238 s8 ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb);
0239 void ice_ptp_process_ts(struct ice_pf *pf);
0240
0241 void
0242 ice_ptp_rx_hwtstamp(struct ice_rx_ring *rx_ring,
0243             union ice_32b_rx_flex_desc *rx_desc, struct sk_buff *skb);
0244 void ice_ptp_reset(struct ice_pf *pf);
0245 void ice_ptp_prepare_for_reset(struct ice_pf *pf);
0246 void ice_ptp_init(struct ice_pf *pf);
0247 void ice_ptp_release(struct ice_pf *pf);
0248 int ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup);
0249 #else /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */
0250 static inline int ice_ptp_set_ts_config(struct ice_pf *pf, struct ifreq *ifr)
0251 {
0252     return -EOPNOTSUPP;
0253 }
0254
0255 static inline int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr)
0256 {
0257     return -EOPNOTSUPP;
0258 }
0259
0260 static inline void ice_ptp_cfg_timestamp(struct ice_pf *pf, bool ena) { }
0261 static inline int ice_get_ptp_clock_index(struct ice_pf *pf)
0262 {
0263     return -1;
0264 }
0265
0266 static inline s8
0267 ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb)
0268 {
0269     return -1;
0270 }
0271
0272 static inline void ice_ptp_process_ts(struct ice_pf *pf) { }
0273 static inline void
0274 ice_ptp_rx_hwtstamp(struct ice_rx_ring *rx_ring,
0275             union ice_32b_rx_flex_desc *rx_desc, struct sk_buff *skb) { }
0276 static inline void ice_ptp_reset(struct ice_pf *pf) { }
0277 static inline void ice_ptp_prepare_for_reset(struct ice_pf *pf) { }
0278 static inline void ice_ptp_init(struct ice_pf *pf) { }
0279 static inline void ice_ptp_release(struct ice_pf *pf) { }
0280 static inline int ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup)
0281 { return 0; }
0282 #endif /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */
0283 #endif /* _ICE_PTP_H_ */