0001
0002
0003
0004 #include <asm/unaligned.h>
0005 #include <linux/uuid.h>
0006 #include <linux/crc32.h>
0007 #include <linux/pldmfw.h>
0008 #include "ice.h"
0009 #include "ice_fw_update.h"
0010
0011 struct ice_fwu_priv {
0012 struct pldmfw context;
0013
0014 struct ice_pf *pf;
0015 struct netlink_ext_ack *extack;
0016
0017
0018 u8 activate_flags;
0019
0020
0021
0022
0023
0024
0025
0026
0027 u8 reset_level;
0028
0029
0030 u8 emp_reset_available;
0031 };
0032
0033
0034
0035
0036
0037
0038
0039
0040
0041
0042
0043
0044
0045
0046
0047 static int
0048 ice_send_package_data(struct pldmfw *context, const u8 *data, u16 length)
0049 {
0050 struct ice_fwu_priv *priv = container_of(context, struct ice_fwu_priv, context);
0051 struct netlink_ext_ack *extack = priv->extack;
0052 struct device *dev = context->dev;
0053 struct ice_pf *pf = priv->pf;
0054 struct ice_hw *hw = &pf->hw;
0055 u8 *package_data;
0056 int status;
0057
0058 dev_dbg(dev, "Sending PLDM record package data to firmware\n");
0059
0060 package_data = kmemdup(data, length, GFP_KERNEL);
0061 if (!package_data)
0062 return -ENOMEM;
0063
0064 status = ice_nvm_set_pkg_data(hw, false, package_data, length, NULL);
0065
0066 kfree(package_data);
0067
0068 if (status) {
0069 dev_err(dev, "Failed to send record package data to firmware, err %d aq_err %s\n",
0070 status, ice_aq_str(hw->adminq.sq_last_status));
0071 NL_SET_ERR_MSG_MOD(extack, "Failed to record package data to firmware");
0072 return -EIO;
0073 }
0074
0075 return 0;
0076 }
0077
0078
0079
0080
0081
0082
0083
0084
0085
0086
0087
0088
0089
0090
0091
0092
0093 static int
0094 ice_check_component_response(struct ice_pf *pf, u16 id, u8 response, u8 code,
0095 struct netlink_ext_ack *extack)
0096 {
0097 struct device *dev = ice_pf_to_dev(pf);
0098 const char *component;
0099
0100 switch (id) {
0101 case NVM_COMP_ID_OROM:
0102 component = "fw.undi";
0103 break;
0104 case NVM_COMP_ID_NVM:
0105 component = "fw.mgmt";
0106 break;
0107 case NVM_COMP_ID_NETLIST:
0108 component = "fw.netlist";
0109 break;
0110 default:
0111 WARN(1, "Unexpected unknown component identifier 0x%02x", id);
0112 return -EINVAL;
0113 }
0114
0115 dev_dbg(dev, "%s: firmware response 0x%x, code 0x%x\n",
0116 component, response, code);
0117
0118 switch (response) {
0119 case ICE_AQ_NVM_PASS_COMP_CAN_BE_UPDATED:
0120
0121 return 0;
0122 case ICE_AQ_NVM_PASS_COMP_CAN_MAY_BE_UPDATEABLE:
0123 dev_warn(dev, "firmware recommends not updating %s, as it may result in a downgrade. continuing anyways\n", component);
0124 return 0;
0125 case ICE_AQ_NVM_PASS_COMP_CAN_NOT_BE_UPDATED:
0126 dev_info(dev, "firmware has rejected updating %s\n", component);
0127 break;
0128 }
0129
0130 switch (code) {
0131 case ICE_AQ_NVM_PASS_COMP_STAMP_IDENTICAL_CODE:
0132 dev_err(dev, "Component comparison stamp for %s is identical to the running image\n",
0133 component);
0134 NL_SET_ERR_MSG_MOD(extack, "Component comparison stamp is identical to running image");
0135 break;
0136 case ICE_AQ_NVM_PASS_COMP_STAMP_LOWER:
0137 dev_err(dev, "Component comparison stamp for %s is lower than the running image\n",
0138 component);
0139 NL_SET_ERR_MSG_MOD(extack, "Component comparison stamp is lower than running image");
0140 break;
0141 case ICE_AQ_NVM_PASS_COMP_INVALID_STAMP_CODE:
0142 dev_err(dev, "Component comparison stamp for %s is invalid\n",
0143 component);
0144 NL_SET_ERR_MSG_MOD(extack, "Component comparison stamp is invalid");
0145 break;
0146 case ICE_AQ_NVM_PASS_COMP_CONFLICT_CODE:
0147 dev_err(dev, "%s conflicts with a previous component table\n",
0148 component);
0149 NL_SET_ERR_MSG_MOD(extack, "Component table conflict occurred");
0150 break;
0151 case ICE_AQ_NVM_PASS_COMP_PRE_REQ_NOT_MET_CODE:
0152 dev_err(dev, "Pre-requisites for component %s have not been met\n",
0153 component);
0154 NL_SET_ERR_MSG_MOD(extack, "Component pre-requisites not met");
0155 break;
0156 case ICE_AQ_NVM_PASS_COMP_NOT_SUPPORTED_CODE:
0157 dev_err(dev, "%s is not a supported component\n",
0158 component);
0159 NL_SET_ERR_MSG_MOD(extack, "Component not supported");
0160 break;
0161 case ICE_AQ_NVM_PASS_COMP_CANNOT_DOWNGRADE_CODE:
0162 dev_err(dev, "Security restrictions prevent %s from being downgraded\n",
0163 component);
0164 NL_SET_ERR_MSG_MOD(extack, "Component cannot be downgraded");
0165 break;
0166 case ICE_AQ_NVM_PASS_COMP_INCOMPLETE_IMAGE_CODE:
0167 dev_err(dev, "Received an incomplete component image for %s\n",
0168 component);
0169 NL_SET_ERR_MSG_MOD(extack, "Incomplete component image");
0170 break;
0171 case ICE_AQ_NVM_PASS_COMP_VER_STR_IDENTICAL_CODE:
0172 dev_err(dev, "Component version for %s is identical to the running image\n",
0173 component);
0174 NL_SET_ERR_MSG_MOD(extack, "Component version is identical to running image");
0175 break;
0176 case ICE_AQ_NVM_PASS_COMP_VER_STR_LOWER_CODE:
0177 dev_err(dev, "Component version for %s is lower than the running image\n",
0178 component);
0179 NL_SET_ERR_MSG_MOD(extack, "Component version is lower than the running image");
0180 break;
0181 default:
0182 dev_err(dev, "Unexpected response code 0x02%x for %s\n",
0183 code, component);
0184 NL_SET_ERR_MSG_MOD(extack, "Received unexpected response code from firmware");
0185 break;
0186 }
0187
0188 return -ECANCELED;
0189 }
0190
0191
0192
0193
0194
0195
0196
0197
0198
0199
0200
0201
0202
0203
0204
0205
0206 static int
0207 ice_send_component_table(struct pldmfw *context, struct pldmfw_component *component,
0208 u8 transfer_flag)
0209 {
0210 struct ice_fwu_priv *priv = container_of(context, struct ice_fwu_priv, context);
0211 struct netlink_ext_ack *extack = priv->extack;
0212 struct ice_aqc_nvm_comp_tbl *comp_tbl;
0213 u8 comp_response, comp_response_code;
0214 struct device *dev = context->dev;
0215 struct ice_pf *pf = priv->pf;
0216 struct ice_hw *hw = &pf->hw;
0217 size_t length;
0218 int status;
0219
0220 switch (component->identifier) {
0221 case NVM_COMP_ID_OROM:
0222 case NVM_COMP_ID_NVM:
0223 case NVM_COMP_ID_NETLIST:
0224 break;
0225 default:
0226 dev_err(dev, "Unable to update due to a firmware component with unknown ID %u\n",
0227 component->identifier);
0228 NL_SET_ERR_MSG_MOD(extack, "Unable to update due to unknown firmware component");
0229 return -EOPNOTSUPP;
0230 }
0231
0232 length = struct_size(comp_tbl, cvs, component->version_len);
0233 comp_tbl = kzalloc(length, GFP_KERNEL);
0234 if (!comp_tbl)
0235 return -ENOMEM;
0236
0237 comp_tbl->comp_class = cpu_to_le16(component->classification);
0238 comp_tbl->comp_id = cpu_to_le16(component->identifier);
0239 comp_tbl->comp_class_idx = FWU_COMP_CLASS_IDX_NOT_USE;
0240 comp_tbl->comp_cmp_stamp = cpu_to_le32(component->comparison_stamp);
0241 comp_tbl->cvs_type = component->version_type;
0242 comp_tbl->cvs_len = component->version_len;
0243 memcpy(comp_tbl->cvs, component->version_string, component->version_len);
0244
0245 dev_dbg(dev, "Sending component table to firmware:\n");
0246
0247 status = ice_nvm_pass_component_tbl(hw, (u8 *)comp_tbl, length,
0248 transfer_flag, &comp_response,
0249 &comp_response_code, NULL);
0250
0251 kfree(comp_tbl);
0252
0253 if (status) {
0254 dev_err(dev, "Failed to transfer component table to firmware, err %d aq_err %s\n",
0255 status, ice_aq_str(hw->adminq.sq_last_status));
0256 NL_SET_ERR_MSG_MOD(extack, "Failed to transfer component table to firmware");
0257 return -EIO;
0258 }
0259
0260 return ice_check_component_response(pf, component->identifier, comp_response,
0261 comp_response_code, extack);
0262 }
0263
0264
0265
0266
0267
0268
0269
0270
0271
0272
0273
0274
0275
0276
0277
0278
0279
0280
0281
0282
0283
0284
0285
0286
0287
0288
0289 static int
0290 ice_write_one_nvm_block(struct ice_pf *pf, u16 module, u32 offset,
0291 u16 block_size, u8 *block, bool last_cmd,
0292 u8 *reset_level, struct netlink_ext_ack *extack)
0293 {
0294 u16 completion_module, completion_retval;
0295 struct device *dev = ice_pf_to_dev(pf);
0296 struct ice_rq_event_info event;
0297 struct ice_hw *hw = &pf->hw;
0298 u32 completion_offset;
0299 int err;
0300
0301 memset(&event, 0, sizeof(event));
0302
0303 dev_dbg(dev, "Writing block of %u bytes for module 0x%02x at offset %u\n",
0304 block_size, module, offset);
0305
0306 err = ice_aq_update_nvm(hw, module, offset, block_size, block,
0307 last_cmd, 0, NULL);
0308 if (err) {
0309 dev_err(dev, "Failed to flash module 0x%02x with block of size %u at offset %u, err %d aq_err %s\n",
0310 module, block_size, offset, err,
0311 ice_aq_str(hw->adminq.sq_last_status));
0312 NL_SET_ERR_MSG_MOD(extack, "Failed to program flash module");
0313 return -EIO;
0314 }
0315
0316
0317
0318
0319
0320
0321
0322 err = ice_aq_wait_for_event(pf, ice_aqc_opc_nvm_write, 15 * HZ, &event);
0323 if (err) {
0324 dev_err(dev, "Timed out while trying to flash module 0x%02x with block of size %u at offset %u, err %d\n",
0325 module, block_size, offset, err);
0326 NL_SET_ERR_MSG_MOD(extack, "Timed out waiting for firmware");
0327 return -EIO;
0328 }
0329
0330 completion_module = le16_to_cpu(event.desc.params.nvm.module_typeid);
0331 completion_retval = le16_to_cpu(event.desc.retval);
0332
0333 completion_offset = le16_to_cpu(event.desc.params.nvm.offset_low);
0334 completion_offset |= event.desc.params.nvm.offset_high << 16;
0335
0336 if (completion_module != module) {
0337 dev_err(dev, "Unexpected module_typeid in write completion: got 0x%x, expected 0x%x\n",
0338 completion_module, module);
0339 NL_SET_ERR_MSG_MOD(extack, "Unexpected firmware response");
0340 return -EIO;
0341 }
0342
0343 if (completion_offset != offset) {
0344 dev_err(dev, "Unexpected offset in write completion: got %u, expected %u\n",
0345 completion_offset, offset);
0346 NL_SET_ERR_MSG_MOD(extack, "Unexpected firmware response");
0347 return -EIO;
0348 }
0349
0350 if (completion_retval) {
0351 dev_err(dev, "Firmware failed to flash module 0x%02x with block of size %u at offset %u, err %s\n",
0352 module, block_size, offset,
0353 ice_aq_str((enum ice_aq_err)completion_retval));
0354 NL_SET_ERR_MSG_MOD(extack, "Firmware failed to program flash module");
0355 return -EIO;
0356 }
0357
0358
0359
0360
0361
0362
0363
0364 if (reset_level && last_cmd && module == ICE_SR_1ST_NVM_BANK_PTR) {
0365 if (hw->dev_caps.common_cap.pcie_reset_avoidance) {
0366 *reset_level = (event.desc.params.nvm.cmd_flags &
0367 ICE_AQC_NVM_RESET_LVL_M);
0368 dev_dbg(dev, "Firmware reported required reset level as %u\n",
0369 *reset_level);
0370 } else {
0371 *reset_level = ICE_AQC_NVM_POR_FLAG;
0372 dev_dbg(dev, "Firmware doesn't support indicating required reset level. Assuming a power cycle is required\n");
0373 }
0374 }
0375
0376 return 0;
0377 }
0378
0379
0380
0381
0382
0383
0384
0385
0386
0387
0388
0389
0390
0391
0392
0393
0394
0395
0396
0397 static int
0398 ice_write_nvm_module(struct ice_pf *pf, u16 module, const char *component,
0399 const u8 *image, u32 length, u8 *reset_level,
0400 struct netlink_ext_ack *extack)
0401 {
0402 struct device *dev = ice_pf_to_dev(pf);
0403 struct devlink *devlink;
0404 u32 offset = 0;
0405 bool last_cmd;
0406 u8 *block;
0407 int err;
0408
0409 dev_dbg(dev, "Beginning write of flash component '%s', module 0x%02x\n", component, module);
0410
0411 devlink = priv_to_devlink(pf);
0412
0413 devlink_flash_update_status_notify(devlink, "Flashing",
0414 component, 0, length);
0415
0416 block = kzalloc(ICE_AQ_MAX_BUF_LEN, GFP_KERNEL);
0417 if (!block)
0418 return -ENOMEM;
0419
0420 do {
0421 u32 block_size;
0422
0423 block_size = min_t(u32, ICE_AQ_MAX_BUF_LEN, length - offset);
0424 last_cmd = !(offset + block_size < length);
0425
0426
0427
0428
0429
0430 memcpy(block, image + offset, block_size);
0431
0432 err = ice_write_one_nvm_block(pf, module, offset, block_size,
0433 block, last_cmd, reset_level,
0434 extack);
0435 if (err)
0436 break;
0437
0438 offset += block_size;
0439
0440 devlink_flash_update_status_notify(devlink, "Flashing",
0441 component, offset, length);
0442 } while (!last_cmd);
0443
0444 dev_dbg(dev, "Completed write of flash component '%s', module 0x%02x\n", component, module);
0445
0446 if (err)
0447 devlink_flash_update_status_notify(devlink, "Flashing failed",
0448 component, length, length);
0449 else
0450 devlink_flash_update_status_notify(devlink, "Flashing done",
0451 component, length, length);
0452
0453 kfree(block);
0454 return err;
0455 }
0456
0457
0458
0459
0460 #define ICE_FW_ERASE_TIMEOUT 300
0461
0462
0463
0464
0465
0466
0467
0468
0469
0470
0471
0472
0473
0474
0475
0476 static int
0477 ice_erase_nvm_module(struct ice_pf *pf, u16 module, const char *component,
0478 struct netlink_ext_ack *extack)
0479 {
0480 u16 completion_module, completion_retval;
0481 struct device *dev = ice_pf_to_dev(pf);
0482 struct ice_rq_event_info event;
0483 struct ice_hw *hw = &pf->hw;
0484 struct devlink *devlink;
0485 int err;
0486
0487 dev_dbg(dev, "Beginning erase of flash component '%s', module 0x%02x\n", component, module);
0488
0489 memset(&event, 0, sizeof(event));
0490
0491 devlink = priv_to_devlink(pf);
0492
0493 devlink_flash_update_timeout_notify(devlink, "Erasing", component, ICE_FW_ERASE_TIMEOUT);
0494
0495 err = ice_aq_erase_nvm(hw, module, NULL);
0496 if (err) {
0497 dev_err(dev, "Failed to erase %s (module 0x%02x), err %d aq_err %s\n",
0498 component, module, err,
0499 ice_aq_str(hw->adminq.sq_last_status));
0500 NL_SET_ERR_MSG_MOD(extack, "Failed to erase flash module");
0501 err = -EIO;
0502 goto out_notify_devlink;
0503 }
0504
0505 err = ice_aq_wait_for_event(pf, ice_aqc_opc_nvm_erase, ICE_FW_ERASE_TIMEOUT * HZ, &event);
0506 if (err) {
0507 dev_err(dev, "Timed out waiting for firmware to respond with erase completion for %s (module 0x%02x), err %d\n",
0508 component, module, err);
0509 NL_SET_ERR_MSG_MOD(extack, "Timed out waiting for firmware");
0510 goto out_notify_devlink;
0511 }
0512
0513 completion_module = le16_to_cpu(event.desc.params.nvm.module_typeid);
0514 completion_retval = le16_to_cpu(event.desc.retval);
0515
0516 if (completion_module != module) {
0517 dev_err(dev, "Unexpected module_typeid in erase completion for %s: got 0x%x, expected 0x%x\n",
0518 component, completion_module, module);
0519 NL_SET_ERR_MSG_MOD(extack, "Unexpected firmware response");
0520 err = -EIO;
0521 goto out_notify_devlink;
0522 }
0523
0524 if (completion_retval) {
0525 dev_err(dev, "Firmware failed to erase %s (module 0x02%x), aq_err %s\n",
0526 component, module,
0527 ice_aq_str((enum ice_aq_err)completion_retval));
0528 NL_SET_ERR_MSG_MOD(extack, "Firmware failed to erase flash");
0529 err = -EIO;
0530 goto out_notify_devlink;
0531 }
0532
0533 dev_dbg(dev, "Completed erase of flash component '%s', module 0x%02x\n", component, module);
0534
0535 out_notify_devlink:
0536 if (err)
0537 devlink_flash_update_status_notify(devlink, "Erasing failed",
0538 component, 0, 0);
0539 else
0540 devlink_flash_update_status_notify(devlink, "Erasing done",
0541 component, 0, 0);
0542
0543 return err;
0544 }
0545
0546
0547
0548
0549
0550
0551
0552
0553
0554
0555
0556
0557
0558 static int
0559 ice_switch_flash_banks(struct ice_pf *pf, u8 activate_flags,
0560 u8 *emp_reset_available, struct netlink_ext_ack *extack)
0561 {
0562 struct device *dev = ice_pf_to_dev(pf);
0563 struct ice_rq_event_info event;
0564 struct ice_hw *hw = &pf->hw;
0565 u16 completion_retval;
0566 u8 response_flags;
0567 int err;
0568
0569 memset(&event, 0, sizeof(event));
0570
0571 err = ice_nvm_write_activate(hw, activate_flags, &response_flags);
0572 if (err) {
0573 dev_err(dev, "Failed to switch active flash banks, err %d aq_err %s\n",
0574 err, ice_aq_str(hw->adminq.sq_last_status));
0575 NL_SET_ERR_MSG_MOD(extack, "Failed to switch active flash banks");
0576 return -EIO;
0577 }
0578
0579
0580
0581
0582
0583 if (emp_reset_available) {
0584 if (hw->dev_caps.common_cap.reset_restrict_support) {
0585 *emp_reset_available = response_flags & ICE_AQC_NVM_EMPR_ENA;
0586 dev_dbg(dev, "Firmware indicated that EMP reset is %s\n",
0587 *emp_reset_available ?
0588 "available" : "not available");
0589 } else {
0590 *emp_reset_available = ICE_AQC_NVM_EMPR_ENA;
0591 dev_dbg(dev, "Firmware does not support restricting EMP reset availability\n");
0592 }
0593 }
0594
0595 err = ice_aq_wait_for_event(pf, ice_aqc_opc_nvm_write_activate, 30 * HZ,
0596 &event);
0597 if (err) {
0598 dev_err(dev, "Timed out waiting for firmware to switch active flash banks, err %d\n",
0599 err);
0600 NL_SET_ERR_MSG_MOD(extack, "Timed out waiting for firmware");
0601 return err;
0602 }
0603
0604 completion_retval = le16_to_cpu(event.desc.retval);
0605 if (completion_retval) {
0606 dev_err(dev, "Firmware failed to switch active flash banks aq_err %s\n",
0607 ice_aq_str((enum ice_aq_err)completion_retval));
0608 NL_SET_ERR_MSG_MOD(extack, "Firmware failed to switch active flash banks");
0609 return -EIO;
0610 }
0611
0612 return 0;
0613 }
0614
0615
0616
0617
0618
0619
0620
0621
0622
0623
0624
0625
0626
0627
0628 static int
0629 ice_flash_component(struct pldmfw *context, struct pldmfw_component *component)
0630 {
0631 struct ice_fwu_priv *priv = container_of(context, struct ice_fwu_priv, context);
0632 struct netlink_ext_ack *extack = priv->extack;
0633 struct ice_pf *pf = priv->pf;
0634 const char *name;
0635 u8 *reset_level;
0636 u16 module;
0637 u8 flag;
0638 int err;
0639
0640 switch (component->identifier) {
0641 case NVM_COMP_ID_OROM:
0642 module = ICE_SR_1ST_OROM_BANK_PTR;
0643 flag = ICE_AQC_NVM_ACTIV_SEL_OROM;
0644 reset_level = NULL;
0645 name = "fw.undi";
0646 break;
0647 case NVM_COMP_ID_NVM:
0648 module = ICE_SR_1ST_NVM_BANK_PTR;
0649 flag = ICE_AQC_NVM_ACTIV_SEL_NVM;
0650 reset_level = &priv->reset_level;
0651 name = "fw.mgmt";
0652 break;
0653 case NVM_COMP_ID_NETLIST:
0654 module = ICE_SR_NETLIST_BANK_PTR;
0655 flag = ICE_AQC_NVM_ACTIV_SEL_NETLIST;
0656 reset_level = NULL;
0657 name = "fw.netlist";
0658 break;
0659 default:
0660
0661
0662
0663 WARN(1, "Unexpected unknown component identifier 0x%02x",
0664 component->identifier);
0665 return -EINVAL;
0666 }
0667
0668
0669 priv->activate_flags |= flag;
0670
0671 err = ice_erase_nvm_module(pf, module, name, extack);
0672 if (err)
0673 return err;
0674
0675 return ice_write_nvm_module(pf, module, name, component->component_data,
0676 component->component_size, reset_level,
0677 extack);
0678 }
0679
0680
0681
0682
0683
0684
0685
0686
0687
0688
0689
0690 static int ice_finalize_update(struct pldmfw *context)
0691 {
0692 struct ice_fwu_priv *priv = container_of(context, struct ice_fwu_priv, context);
0693 struct netlink_ext_ack *extack = priv->extack;
0694 struct ice_pf *pf = priv->pf;
0695 struct devlink *devlink;
0696 int err;
0697
0698
0699 err = ice_switch_flash_banks(pf, priv->activate_flags,
0700 &priv->emp_reset_available, extack);
0701 if (err)
0702 return err;
0703
0704 devlink = priv_to_devlink(pf);
0705
0706
0707
0708
0709 if (priv->reset_level == ICE_AQC_NVM_EMPR_FLAG &&
0710 !priv->emp_reset_available) {
0711 dev_dbg(ice_pf_to_dev(pf), "Firmware indicated EMP reset as sufficient, but EMP reset is disabled\n");
0712 priv->reset_level = ICE_AQC_NVM_PERST_FLAG;
0713 }
0714
0715 switch (priv->reset_level) {
0716 case ICE_AQC_NVM_EMPR_FLAG:
0717 devlink_flash_update_status_notify(devlink,
0718 "Activate new firmware by devlink reload",
0719 NULL, 0, 0);
0720 break;
0721 case ICE_AQC_NVM_PERST_FLAG:
0722 devlink_flash_update_status_notify(devlink,
0723 "Activate new firmware by rebooting the system",
0724 NULL, 0, 0);
0725 break;
0726 case ICE_AQC_NVM_POR_FLAG:
0727 default:
0728 devlink_flash_update_status_notify(devlink,
0729 "Activate new firmware by power cycling the system",
0730 NULL, 0, 0);
0731 break;
0732 }
0733
0734 pf->fw_emp_reset_disabled = !priv->emp_reset_available;
0735
0736 return 0;
0737 }
0738
0739 struct ice_pldm_pci_record_id {
0740 u32 vendor;
0741 u32 device;
0742 u32 subsystem_vendor;
0743 u32 subsystem_device;
0744 };
0745
0746
0747
0748
0749
0750
0751
0752
0753
0754
0755
0756
0757
0758
0759
0760 static bool
0761 ice_op_pci_match_record(struct pldmfw *context, struct pldmfw_record *record)
0762 {
0763 struct pci_dev *pdev = to_pci_dev(context->dev);
0764 struct ice_pldm_pci_record_id id = {
0765 .vendor = PCI_ANY_ID,
0766 .device = PCI_ANY_ID,
0767 .subsystem_vendor = PCI_ANY_ID,
0768 .subsystem_device = PCI_ANY_ID,
0769 };
0770 struct pldmfw_desc_tlv *desc;
0771
0772 list_for_each_entry(desc, &record->descs, entry) {
0773 u16 value;
0774 int *ptr;
0775
0776 switch (desc->type) {
0777 case PLDM_DESC_ID_PCI_VENDOR_ID:
0778 ptr = &id.vendor;
0779 break;
0780 case PLDM_DESC_ID_PCI_DEVICE_ID:
0781 ptr = &id.device;
0782 break;
0783 case PLDM_DESC_ID_PCI_SUBVENDOR_ID:
0784 ptr = &id.subsystem_vendor;
0785 break;
0786 case PLDM_DESC_ID_PCI_SUBDEV_ID:
0787 ptr = &id.subsystem_device;
0788 break;
0789 default:
0790
0791 continue;
0792 }
0793
0794 value = get_unaligned_le16(desc->data);
0795
0796
0797
0798
0799
0800 if (value)
0801 *ptr = value;
0802 else
0803 *ptr = PCI_ANY_ID;
0804 }
0805
0806
0807 if ((id.vendor == PCI_ANY_ID || id.vendor == pdev->vendor) &&
0808 (id.device == PCI_ANY_ID || id.device == pdev->device ||
0809 id.device == ICE_DEV_ID_E822_SI_DFLT) &&
0810 (id.subsystem_vendor == PCI_ANY_ID ||
0811 id.subsystem_vendor == pdev->subsystem_vendor) &&
0812 (id.subsystem_device == PCI_ANY_ID ||
0813 id.subsystem_device == pdev->subsystem_device))
0814 return true;
0815
0816 return false;
0817 }
0818
0819 static const struct pldmfw_ops ice_fwu_ops_e810 = {
0820 .match_record = &pldmfw_op_pci_match_record,
0821 .send_package_data = &ice_send_package_data,
0822 .send_component_table = &ice_send_component_table,
0823 .flash_component = &ice_flash_component,
0824 .finalize_update = &ice_finalize_update,
0825 };
0826
0827 static const struct pldmfw_ops ice_fwu_ops_e822 = {
0828 .match_record = &ice_op_pci_match_record,
0829 .send_package_data = &ice_send_package_data,
0830 .send_component_table = &ice_send_component_table,
0831 .flash_component = &ice_flash_component,
0832 .finalize_update = &ice_finalize_update,
0833 };
0834
0835
0836
0837
0838
0839
0840
0841
0842
0843
0844
0845
0846 int ice_get_pending_updates(struct ice_pf *pf, u8 *pending,
0847 struct netlink_ext_ack *extack)
0848 {
0849 struct device *dev = ice_pf_to_dev(pf);
0850 struct ice_hw_dev_caps *dev_caps;
0851 struct ice_hw *hw = &pf->hw;
0852 int err;
0853
0854 dev_caps = kzalloc(sizeof(*dev_caps), GFP_KERNEL);
0855 if (!dev_caps)
0856 return -ENOMEM;
0857
0858
0859
0860
0861
0862
0863 err = ice_discover_dev_caps(hw, dev_caps);
0864 if (err) {
0865 NL_SET_ERR_MSG_MOD(extack, "Unable to read device capabilities");
0866 kfree(dev_caps);
0867 return err;
0868 }
0869
0870 *pending = 0;
0871
0872 if (dev_caps->common_cap.nvm_update_pending_nvm) {
0873 dev_info(dev, "The fw.mgmt flash component has a pending update\n");
0874 *pending |= ICE_AQC_NVM_ACTIV_SEL_NVM;
0875 }
0876
0877 if (dev_caps->common_cap.nvm_update_pending_orom) {
0878 dev_info(dev, "The fw.undi flash component has a pending update\n");
0879 *pending |= ICE_AQC_NVM_ACTIV_SEL_OROM;
0880 }
0881
0882 if (dev_caps->common_cap.nvm_update_pending_netlist) {
0883 dev_info(dev, "The fw.netlist flash component has a pending update\n");
0884 *pending |= ICE_AQC_NVM_ACTIV_SEL_NETLIST;
0885 }
0886
0887 kfree(dev_caps);
0888
0889 return 0;
0890 }
0891
0892
0893
0894
0895
0896
0897
0898
0899
0900
0901
0902
0903 static int
0904 ice_cancel_pending_update(struct ice_pf *pf, const char *component,
0905 struct netlink_ext_ack *extack)
0906 {
0907 struct devlink *devlink = priv_to_devlink(pf);
0908 struct device *dev = ice_pf_to_dev(pf);
0909 struct ice_hw *hw = &pf->hw;
0910 u8 pending;
0911 int err;
0912
0913 err = ice_get_pending_updates(pf, &pending, extack);
0914 if (err)
0915 return err;
0916
0917
0918
0919
0920 if (component) {
0921 if (strcmp(component, "fw.mgmt") == 0)
0922 pending &= ICE_AQC_NVM_ACTIV_SEL_NVM;
0923 else if (strcmp(component, "fw.undi") == 0)
0924 pending &= ICE_AQC_NVM_ACTIV_SEL_OROM;
0925 else if (strcmp(component, "fw.netlist") == 0)
0926 pending &= ICE_AQC_NVM_ACTIV_SEL_NETLIST;
0927 else
0928 WARN(1, "Unexpected flash component %s", component);
0929 }
0930
0931
0932 if (!pending)
0933 return 0;
0934
0935
0936
0937
0938 devlink_flash_update_status_notify(devlink,
0939 "Canceling previous pending update",
0940 component, 0, 0);
0941
0942 err = ice_acquire_nvm(hw, ICE_RES_WRITE);
0943 if (err) {
0944 dev_err(dev, "Failed to acquire device flash lock, err %d aq_err %s\n",
0945 err, ice_aq_str(hw->adminq.sq_last_status));
0946 NL_SET_ERR_MSG_MOD(extack, "Failed to acquire device flash lock");
0947 return err;
0948 }
0949
0950 pending |= ICE_AQC_NVM_REVERT_LAST_ACTIV;
0951 err = ice_switch_flash_banks(pf, pending, NULL, extack);
0952
0953 ice_release_nvm(hw);
0954
0955
0956
0957
0958 pf->fw_emp_reset_disabled = false;
0959
0960 return err;
0961 }
0962
0963
0964
0965
0966
0967
0968
0969
0970
0971
0972
0973
0974
0975
0976
0977
0978
0979 int ice_devlink_flash_update(struct devlink *devlink,
0980 struct devlink_flash_update_params *params,
0981 struct netlink_ext_ack *extack)
0982 {
0983 struct ice_pf *pf = devlink_priv(devlink);
0984 struct device *dev = ice_pf_to_dev(pf);
0985 struct ice_hw *hw = &pf->hw;
0986 struct ice_fwu_priv priv;
0987 u8 preservation;
0988 int err;
0989
0990 if (!params->overwrite_mask) {
0991
0992 preservation = ICE_AQC_NVM_PRESERVE_ALL;
0993 } else if (params->overwrite_mask == DEVLINK_FLASH_OVERWRITE_SETTINGS) {
0994
0995 preservation = ICE_AQC_NVM_PRESERVE_SELECTED;
0996 } else if (params->overwrite_mask == (DEVLINK_FLASH_OVERWRITE_SETTINGS |
0997 DEVLINK_FLASH_OVERWRITE_IDENTIFIERS)) {
0998
0999 preservation = ICE_AQC_NVM_NO_PRESERVATION;
1000 } else {
1001 NL_SET_ERR_MSG_MOD(extack, "Requested overwrite mask is not supported");
1002 return -EOPNOTSUPP;
1003 }
1004
1005 if (!hw->dev_caps.common_cap.nvm_unified_update) {
1006 NL_SET_ERR_MSG_MOD(extack, "Current firmware does not support unified update");
1007 return -EOPNOTSUPP;
1008 }
1009
1010 memset(&priv, 0, sizeof(priv));
1011
1012
1013 if (hw->mac_type == ICE_MAC_GENERIC)
1014 priv.context.ops = &ice_fwu_ops_e822;
1015 else
1016 priv.context.ops = &ice_fwu_ops_e810;
1017 priv.context.dev = dev;
1018 priv.extack = extack;
1019 priv.pf = pf;
1020 priv.activate_flags = preservation;
1021
1022 devlink_flash_update_status_notify(devlink, "Preparing to flash", NULL, 0, 0);
1023
1024 err = ice_cancel_pending_update(pf, NULL, extack);
1025 if (err)
1026 return err;
1027
1028 err = ice_acquire_nvm(hw, ICE_RES_WRITE);
1029 if (err) {
1030 dev_err(dev, "Failed to acquire device flash lock, err %d aq_err %s\n",
1031 err, ice_aq_str(hw->adminq.sq_last_status));
1032 NL_SET_ERR_MSG_MOD(extack, "Failed to acquire device flash lock");
1033 return err;
1034 }
1035
1036 err = pldmfw_flash_image(&priv.context, params->fw);
1037 if (err == -ENOENT) {
1038 dev_err(dev, "Firmware image has no record matching this device\n");
1039 NL_SET_ERR_MSG_MOD(extack, "Firmware image has no record matching this device");
1040 } else if (err) {
1041
1042
1043
1044
1045 dev_err(dev, "Failed to flash PLDM image, err %d", err);
1046 }
1047
1048 ice_release_nvm(hw);
1049
1050 return err;
1051 }