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0001 // SPDX-License-Identifier: GPL-2.0
0002 /* Copyright(c) 2013 - 2018 Intel Corporation. */
0003 
0004 #include "i40e.h"
0005 #include "i40e_osdep.h"
0006 #include "i40e_register.h"
0007 #include "i40e_type.h"
0008 #include "i40e_hmc.h"
0009 #include "i40e_lan_hmc.h"
0010 #include "i40e_prototype.h"
0011 
0012 /* lan specific interface functions */
0013 
0014 /**
0015  * i40e_align_l2obj_base - aligns base object pointer to 512 bytes
0016  * @offset: base address offset needing alignment
0017  *
0018  * Aligns the layer 2 function private memory so it's 512-byte aligned.
0019  **/
0020 static u64 i40e_align_l2obj_base(u64 offset)
0021 {
0022     u64 aligned_offset = offset;
0023 
0024     if ((offset % I40E_HMC_L2OBJ_BASE_ALIGNMENT) > 0)
0025         aligned_offset += (I40E_HMC_L2OBJ_BASE_ALIGNMENT -
0026                    (offset % I40E_HMC_L2OBJ_BASE_ALIGNMENT));
0027 
0028     return aligned_offset;
0029 }
0030 
0031 /**
0032  * i40e_calculate_l2fpm_size - calculates layer 2 FPM memory size
0033  * @txq_num: number of Tx queues needing backing context
0034  * @rxq_num: number of Rx queues needing backing context
0035  * @fcoe_cntx_num: amount of FCoE statefull contexts needing backing context
0036  * @fcoe_filt_num: number of FCoE filters needing backing context
0037  *
0038  * Calculates the maximum amount of memory for the function required, based
0039  * on the number of resources it must provide context for.
0040  **/
0041 static u64 i40e_calculate_l2fpm_size(u32 txq_num, u32 rxq_num,
0042                   u32 fcoe_cntx_num, u32 fcoe_filt_num)
0043 {
0044     u64 fpm_size = 0;
0045 
0046     fpm_size = txq_num * I40E_HMC_OBJ_SIZE_TXQ;
0047     fpm_size = i40e_align_l2obj_base(fpm_size);
0048 
0049     fpm_size += (rxq_num * I40E_HMC_OBJ_SIZE_RXQ);
0050     fpm_size = i40e_align_l2obj_base(fpm_size);
0051 
0052     fpm_size += (fcoe_cntx_num * I40E_HMC_OBJ_SIZE_FCOE_CNTX);
0053     fpm_size = i40e_align_l2obj_base(fpm_size);
0054 
0055     fpm_size += (fcoe_filt_num * I40E_HMC_OBJ_SIZE_FCOE_FILT);
0056     fpm_size = i40e_align_l2obj_base(fpm_size);
0057 
0058     return fpm_size;
0059 }
0060 
0061 /**
0062  * i40e_init_lan_hmc - initialize i40e_hmc_info struct
0063  * @hw: pointer to the HW structure
0064  * @txq_num: number of Tx queues needing backing context
0065  * @rxq_num: number of Rx queues needing backing context
0066  * @fcoe_cntx_num: amount of FCoE statefull contexts needing backing context
0067  * @fcoe_filt_num: number of FCoE filters needing backing context
0068  *
0069  * This function will be called once per physical function initialization.
0070  * It will fill out the i40e_hmc_obj_info structure for LAN objects based on
0071  * the driver's provided input, as well as information from the HMC itself
0072  * loaded from NVRAM.
0073  *
0074  * Assumptions:
0075  *   - HMC Resource Profile has been selected before calling this function.
0076  **/
0077 i40e_status i40e_init_lan_hmc(struct i40e_hw *hw, u32 txq_num,
0078                     u32 rxq_num, u32 fcoe_cntx_num,
0079                     u32 fcoe_filt_num)
0080 {
0081     struct i40e_hmc_obj_info *obj, *full_obj;
0082     i40e_status ret_code = 0;
0083     u64 l2fpm_size;
0084     u32 size_exp;
0085 
0086     hw->hmc.signature = I40E_HMC_INFO_SIGNATURE;
0087     hw->hmc.hmc_fn_id = hw->pf_id;
0088 
0089     /* allocate memory for hmc_obj */
0090     ret_code = i40e_allocate_virt_mem(hw, &hw->hmc.hmc_obj_virt_mem,
0091             sizeof(struct i40e_hmc_obj_info) * I40E_HMC_LAN_MAX);
0092     if (ret_code)
0093         goto init_lan_hmc_out;
0094     hw->hmc.hmc_obj = (struct i40e_hmc_obj_info *)
0095               hw->hmc.hmc_obj_virt_mem.va;
0096 
0097     /* The full object will be used to create the LAN HMC SD */
0098     full_obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_FULL];
0099     full_obj->max_cnt = 0;
0100     full_obj->cnt = 0;
0101     full_obj->base = 0;
0102     full_obj->size = 0;
0103 
0104     /* Tx queue context information */
0105     obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_TX];
0106     obj->max_cnt = rd32(hw, I40E_GLHMC_LANQMAX);
0107     obj->cnt = txq_num;
0108     obj->base = 0;
0109     size_exp = rd32(hw, I40E_GLHMC_LANTXOBJSZ);
0110     obj->size = BIT_ULL(size_exp);
0111 
0112     /* validate values requested by driver don't exceed HMC capacity */
0113     if (txq_num > obj->max_cnt) {
0114         ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT;
0115         hw_dbg(hw, "i40e_init_lan_hmc: Tx context: asks for 0x%x but max allowed is 0x%x, returns error %d\n",
0116               txq_num, obj->max_cnt, ret_code);
0117         goto init_lan_hmc_out;
0118     }
0119 
0120     /* aggregate values into the full LAN object for later */
0121     full_obj->max_cnt += obj->max_cnt;
0122     full_obj->cnt += obj->cnt;
0123 
0124     /* Rx queue context information */
0125     obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_RX];
0126     obj->max_cnt = rd32(hw, I40E_GLHMC_LANQMAX);
0127     obj->cnt = rxq_num;
0128     obj->base = hw->hmc.hmc_obj[I40E_HMC_LAN_TX].base +
0129             (hw->hmc.hmc_obj[I40E_HMC_LAN_TX].cnt *
0130              hw->hmc.hmc_obj[I40E_HMC_LAN_TX].size);
0131     obj->base = i40e_align_l2obj_base(obj->base);
0132     size_exp = rd32(hw, I40E_GLHMC_LANRXOBJSZ);
0133     obj->size = BIT_ULL(size_exp);
0134 
0135     /* validate values requested by driver don't exceed HMC capacity */
0136     if (rxq_num > obj->max_cnt) {
0137         ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT;
0138         hw_dbg(hw, "i40e_init_lan_hmc: Rx context: asks for 0x%x but max allowed is 0x%x, returns error %d\n",
0139               rxq_num, obj->max_cnt, ret_code);
0140         goto init_lan_hmc_out;
0141     }
0142 
0143     /* aggregate values into the full LAN object for later */
0144     full_obj->max_cnt += obj->max_cnt;
0145     full_obj->cnt += obj->cnt;
0146 
0147     /* FCoE context information */
0148     obj = &hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX];
0149     obj->max_cnt = rd32(hw, I40E_GLHMC_FCOEMAX);
0150     obj->cnt = fcoe_cntx_num;
0151     obj->base = hw->hmc.hmc_obj[I40E_HMC_LAN_RX].base +
0152             (hw->hmc.hmc_obj[I40E_HMC_LAN_RX].cnt *
0153              hw->hmc.hmc_obj[I40E_HMC_LAN_RX].size);
0154     obj->base = i40e_align_l2obj_base(obj->base);
0155     size_exp = rd32(hw, I40E_GLHMC_FCOEDDPOBJSZ);
0156     obj->size = BIT_ULL(size_exp);
0157 
0158     /* validate values requested by driver don't exceed HMC capacity */
0159     if (fcoe_cntx_num > obj->max_cnt) {
0160         ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT;
0161         hw_dbg(hw, "i40e_init_lan_hmc: FCoE context: asks for 0x%x but max allowed is 0x%x, returns error %d\n",
0162               fcoe_cntx_num, obj->max_cnt, ret_code);
0163         goto init_lan_hmc_out;
0164     }
0165 
0166     /* aggregate values into the full LAN object for later */
0167     full_obj->max_cnt += obj->max_cnt;
0168     full_obj->cnt += obj->cnt;
0169 
0170     /* FCoE filter information */
0171     obj = &hw->hmc.hmc_obj[I40E_HMC_FCOE_FILT];
0172     obj->max_cnt = rd32(hw, I40E_GLHMC_FCOEFMAX);
0173     obj->cnt = fcoe_filt_num;
0174     obj->base = hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX].base +
0175             (hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX].cnt *
0176              hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX].size);
0177     obj->base = i40e_align_l2obj_base(obj->base);
0178     size_exp = rd32(hw, I40E_GLHMC_FCOEFOBJSZ);
0179     obj->size = BIT_ULL(size_exp);
0180 
0181     /* validate values requested by driver don't exceed HMC capacity */
0182     if (fcoe_filt_num > obj->max_cnt) {
0183         ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT;
0184         hw_dbg(hw, "i40e_init_lan_hmc: FCoE filter: asks for 0x%x but max allowed is 0x%x, returns error %d\n",
0185               fcoe_filt_num, obj->max_cnt, ret_code);
0186         goto init_lan_hmc_out;
0187     }
0188 
0189     /* aggregate values into the full LAN object for later */
0190     full_obj->max_cnt += obj->max_cnt;
0191     full_obj->cnt += obj->cnt;
0192 
0193     hw->hmc.first_sd_index = 0;
0194     hw->hmc.sd_table.ref_cnt = 0;
0195     l2fpm_size = i40e_calculate_l2fpm_size(txq_num, rxq_num, fcoe_cntx_num,
0196                            fcoe_filt_num);
0197     if (NULL == hw->hmc.sd_table.sd_entry) {
0198         hw->hmc.sd_table.sd_cnt = (u32)
0199                    (l2fpm_size + I40E_HMC_DIRECT_BP_SIZE - 1) /
0200                    I40E_HMC_DIRECT_BP_SIZE;
0201 
0202         /* allocate the sd_entry members in the sd_table */
0203         ret_code = i40e_allocate_virt_mem(hw, &hw->hmc.sd_table.addr,
0204                       (sizeof(struct i40e_hmc_sd_entry) *
0205                       hw->hmc.sd_table.sd_cnt));
0206         if (ret_code)
0207             goto init_lan_hmc_out;
0208         hw->hmc.sd_table.sd_entry =
0209             (struct i40e_hmc_sd_entry *)hw->hmc.sd_table.addr.va;
0210     }
0211     /* store in the LAN full object for later */
0212     full_obj->size = l2fpm_size;
0213 
0214 init_lan_hmc_out:
0215     return ret_code;
0216 }
0217 
0218 /**
0219  * i40e_remove_pd_page - Remove a page from the page descriptor table
0220  * @hw: pointer to the HW structure
0221  * @hmc_info: pointer to the HMC configuration information structure
0222  * @idx: segment descriptor index to find the relevant page descriptor
0223  *
0224  * This function:
0225  *  1. Marks the entry in pd table (for paged address mode) invalid
0226  *  2. write to register PMPDINV to invalidate the backing page in FV cache
0227  *  3. Decrement the ref count for  pd_entry
0228  * assumptions:
0229  *  1. caller can deallocate the memory used by pd after this function
0230  *     returns.
0231  **/
0232 static i40e_status i40e_remove_pd_page(struct i40e_hw *hw,
0233                          struct i40e_hmc_info *hmc_info,
0234                          u32 idx)
0235 {
0236     i40e_status ret_code = 0;
0237 
0238     if (!i40e_prep_remove_pd_page(hmc_info, idx))
0239         ret_code = i40e_remove_pd_page_new(hw, hmc_info, idx, true);
0240 
0241     return ret_code;
0242 }
0243 
0244 /**
0245  * i40e_remove_sd_bp - remove a backing page from a segment descriptor
0246  * @hw: pointer to our HW structure
0247  * @hmc_info: pointer to the HMC configuration information structure
0248  * @idx: the page index
0249  *
0250  * This function:
0251  *  1. Marks the entry in sd table (for direct address mode) invalid
0252  *  2. write to register PMSDCMD, PMSDDATALOW(PMSDDATALOW.PMSDVALID set
0253  *     to 0) and PMSDDATAHIGH to invalidate the sd page
0254  *  3. Decrement the ref count for the sd_entry
0255  * assumptions:
0256  *  1. caller can deallocate the memory used by backing storage after this
0257  *     function returns.
0258  **/
0259 static i40e_status i40e_remove_sd_bp(struct i40e_hw *hw,
0260                            struct i40e_hmc_info *hmc_info,
0261                            u32 idx)
0262 {
0263     i40e_status ret_code = 0;
0264 
0265     if (!i40e_prep_remove_sd_bp(hmc_info, idx))
0266         ret_code = i40e_remove_sd_bp_new(hw, hmc_info, idx, true);
0267 
0268     return ret_code;
0269 }
0270 
0271 /**
0272  * i40e_create_lan_hmc_object - allocate backing store for hmc objects
0273  * @hw: pointer to the HW structure
0274  * @info: pointer to i40e_hmc_create_obj_info struct
0275  *
0276  * This will allocate memory for PDs and backing pages and populate
0277  * the sd and pd entries.
0278  **/
0279 static i40e_status i40e_create_lan_hmc_object(struct i40e_hw *hw,
0280                 struct i40e_hmc_lan_create_obj_info *info)
0281 {
0282     i40e_status ret_code = 0;
0283     struct i40e_hmc_sd_entry *sd_entry;
0284     u32 pd_idx1 = 0, pd_lmt1 = 0;
0285     u32 pd_idx = 0, pd_lmt = 0;
0286     bool pd_error = false;
0287     u32 sd_idx, sd_lmt;
0288     u64 sd_size;
0289     u32 i, j;
0290 
0291     if (NULL == info) {
0292         ret_code = I40E_ERR_BAD_PTR;
0293         hw_dbg(hw, "i40e_create_lan_hmc_object: bad info ptr\n");
0294         goto exit;
0295     }
0296     if (NULL == info->hmc_info) {
0297         ret_code = I40E_ERR_BAD_PTR;
0298         hw_dbg(hw, "i40e_create_lan_hmc_object: bad hmc_info ptr\n");
0299         goto exit;
0300     }
0301     if (I40E_HMC_INFO_SIGNATURE != info->hmc_info->signature) {
0302         ret_code = I40E_ERR_BAD_PTR;
0303         hw_dbg(hw, "i40e_create_lan_hmc_object: bad signature\n");
0304         goto exit;
0305     }
0306 
0307     if (info->start_idx >= info->hmc_info->hmc_obj[info->rsrc_type].cnt) {
0308         ret_code = I40E_ERR_INVALID_HMC_OBJ_INDEX;
0309         hw_dbg(hw, "i40e_create_lan_hmc_object: returns error %d\n",
0310               ret_code);
0311         goto exit;
0312     }
0313     if ((info->start_idx + info->count) >
0314         info->hmc_info->hmc_obj[info->rsrc_type].cnt) {
0315         ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT;
0316         hw_dbg(hw, "i40e_create_lan_hmc_object: returns error %d\n",
0317               ret_code);
0318         goto exit;
0319     }
0320 
0321     /* find sd index and limit */
0322     I40E_FIND_SD_INDEX_LIMIT(info->hmc_info, info->rsrc_type,
0323                  info->start_idx, info->count,
0324                  &sd_idx, &sd_lmt);
0325     if (sd_idx >= info->hmc_info->sd_table.sd_cnt ||
0326         sd_lmt > info->hmc_info->sd_table.sd_cnt) {
0327             ret_code = I40E_ERR_INVALID_SD_INDEX;
0328             goto exit;
0329     }
0330     /* find pd index */
0331     I40E_FIND_PD_INDEX_LIMIT(info->hmc_info, info->rsrc_type,
0332                  info->start_idx, info->count, &pd_idx,
0333                  &pd_lmt);
0334 
0335     /* This is to cover for cases where you may not want to have an SD with
0336      * the full 2M memory but something smaller. By not filling out any
0337      * size, the function will default the SD size to be 2M.
0338      */
0339     if (info->direct_mode_sz == 0)
0340         sd_size = I40E_HMC_DIRECT_BP_SIZE;
0341     else
0342         sd_size = info->direct_mode_sz;
0343 
0344     /* check if all the sds are valid. If not, allocate a page and
0345      * initialize it.
0346      */
0347     for (j = sd_idx; j < sd_lmt; j++) {
0348         /* update the sd table entry */
0349         ret_code = i40e_add_sd_table_entry(hw, info->hmc_info, j,
0350                            info->entry_type,
0351                            sd_size);
0352         if (ret_code)
0353             goto exit_sd_error;
0354         sd_entry = &info->hmc_info->sd_table.sd_entry[j];
0355         if (I40E_SD_TYPE_PAGED == sd_entry->entry_type) {
0356             /* check if all the pds in this sd are valid. If not,
0357              * allocate a page and initialize it.
0358              */
0359 
0360             /* find pd_idx and pd_lmt in this sd */
0361             pd_idx1 = max(pd_idx, (j * I40E_HMC_MAX_BP_COUNT));
0362             pd_lmt1 = min(pd_lmt,
0363                       ((j + 1) * I40E_HMC_MAX_BP_COUNT));
0364             for (i = pd_idx1; i < pd_lmt1; i++) {
0365                 /* update the pd table entry */
0366                 ret_code = i40e_add_pd_table_entry(hw,
0367                                 info->hmc_info,
0368                                 i, NULL);
0369                 if (ret_code) {
0370                     pd_error = true;
0371                     break;
0372                 }
0373             }
0374             if (pd_error) {
0375                 /* remove the backing pages from pd_idx1 to i */
0376                 while (i && (i > pd_idx1)) {
0377                     i40e_remove_pd_bp(hw, info->hmc_info,
0378                               (i - 1));
0379                     i--;
0380                 }
0381             }
0382         }
0383         if (!sd_entry->valid) {
0384             sd_entry->valid = true;
0385             switch (sd_entry->entry_type) {
0386             case I40E_SD_TYPE_PAGED:
0387                 I40E_SET_PF_SD_ENTRY(hw,
0388                     sd_entry->u.pd_table.pd_page_addr.pa,
0389                     j, sd_entry->entry_type);
0390                 break;
0391             case I40E_SD_TYPE_DIRECT:
0392                 I40E_SET_PF_SD_ENTRY(hw, sd_entry->u.bp.addr.pa,
0393                              j, sd_entry->entry_type);
0394                 break;
0395             default:
0396                 ret_code = I40E_ERR_INVALID_SD_TYPE;
0397                 goto exit;
0398             }
0399         }
0400     }
0401     goto exit;
0402 
0403 exit_sd_error:
0404     /* cleanup for sd entries from j to sd_idx */
0405     while (j && (j > sd_idx)) {
0406         sd_entry = &info->hmc_info->sd_table.sd_entry[j - 1];
0407         switch (sd_entry->entry_type) {
0408         case I40E_SD_TYPE_PAGED:
0409             pd_idx1 = max(pd_idx,
0410                       ((j - 1) * I40E_HMC_MAX_BP_COUNT));
0411             pd_lmt1 = min(pd_lmt, (j * I40E_HMC_MAX_BP_COUNT));
0412             for (i = pd_idx1; i < pd_lmt1; i++)
0413                 i40e_remove_pd_bp(hw, info->hmc_info, i);
0414             i40e_remove_pd_page(hw, info->hmc_info, (j - 1));
0415             break;
0416         case I40E_SD_TYPE_DIRECT:
0417             i40e_remove_sd_bp(hw, info->hmc_info, (j - 1));
0418             break;
0419         default:
0420             ret_code = I40E_ERR_INVALID_SD_TYPE;
0421             break;
0422         }
0423         j--;
0424     }
0425 exit:
0426     return ret_code;
0427 }
0428 
0429 /**
0430  * i40e_configure_lan_hmc - prepare the HMC backing store
0431  * @hw: pointer to the hw structure
0432  * @model: the model for the layout of the SD/PD tables
0433  *
0434  * - This function will be called once per physical function initialization.
0435  * - This function will be called after i40e_init_lan_hmc() and before
0436  *   any LAN/FCoE HMC objects can be created.
0437  **/
0438 i40e_status i40e_configure_lan_hmc(struct i40e_hw *hw,
0439                          enum i40e_hmc_model model)
0440 {
0441     struct i40e_hmc_lan_create_obj_info info;
0442     i40e_status ret_code = 0;
0443     u8 hmc_fn_id = hw->hmc.hmc_fn_id;
0444     struct i40e_hmc_obj_info *obj;
0445 
0446     /* Initialize part of the create object info struct */
0447     info.hmc_info = &hw->hmc;
0448     info.rsrc_type = I40E_HMC_LAN_FULL;
0449     info.start_idx = 0;
0450     info.direct_mode_sz = hw->hmc.hmc_obj[I40E_HMC_LAN_FULL].size;
0451 
0452     /* Build the SD entry for the LAN objects */
0453     switch (model) {
0454     case I40E_HMC_MODEL_DIRECT_PREFERRED:
0455     case I40E_HMC_MODEL_DIRECT_ONLY:
0456         info.entry_type = I40E_SD_TYPE_DIRECT;
0457         /* Make one big object, a single SD */
0458         info.count = 1;
0459         ret_code = i40e_create_lan_hmc_object(hw, &info);
0460         if (ret_code && (model == I40E_HMC_MODEL_DIRECT_PREFERRED))
0461             goto try_type_paged;
0462         else if (ret_code)
0463             goto configure_lan_hmc_out;
0464         /* else clause falls through the break */
0465         break;
0466     case I40E_HMC_MODEL_PAGED_ONLY:
0467 try_type_paged:
0468         info.entry_type = I40E_SD_TYPE_PAGED;
0469         /* Make one big object in the PD table */
0470         info.count = 1;
0471         ret_code = i40e_create_lan_hmc_object(hw, &info);
0472         if (ret_code)
0473             goto configure_lan_hmc_out;
0474         break;
0475     default:
0476         /* unsupported type */
0477         ret_code = I40E_ERR_INVALID_SD_TYPE;
0478         hw_dbg(hw, "i40e_configure_lan_hmc: Unknown SD type: %d\n",
0479               ret_code);
0480         goto configure_lan_hmc_out;
0481     }
0482 
0483     /* Configure and program the FPM registers so objects can be created */
0484 
0485     /* Tx contexts */
0486     obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_TX];
0487     wr32(hw, I40E_GLHMC_LANTXBASE(hmc_fn_id),
0488          (u32)((obj->base & I40E_GLHMC_LANTXBASE_FPMLANTXBASE_MASK) / 512));
0489     wr32(hw, I40E_GLHMC_LANTXCNT(hmc_fn_id), obj->cnt);
0490 
0491     /* Rx contexts */
0492     obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_RX];
0493     wr32(hw, I40E_GLHMC_LANRXBASE(hmc_fn_id),
0494          (u32)((obj->base & I40E_GLHMC_LANRXBASE_FPMLANRXBASE_MASK) / 512));
0495     wr32(hw, I40E_GLHMC_LANRXCNT(hmc_fn_id), obj->cnt);
0496 
0497     /* FCoE contexts */
0498     obj = &hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX];
0499     wr32(hw, I40E_GLHMC_FCOEDDPBASE(hmc_fn_id),
0500      (u32)((obj->base & I40E_GLHMC_FCOEDDPBASE_FPMFCOEDDPBASE_MASK) / 512));
0501     wr32(hw, I40E_GLHMC_FCOEDDPCNT(hmc_fn_id), obj->cnt);
0502 
0503     /* FCoE filters */
0504     obj = &hw->hmc.hmc_obj[I40E_HMC_FCOE_FILT];
0505     wr32(hw, I40E_GLHMC_FCOEFBASE(hmc_fn_id),
0506          (u32)((obj->base & I40E_GLHMC_FCOEFBASE_FPMFCOEFBASE_MASK) / 512));
0507     wr32(hw, I40E_GLHMC_FCOEFCNT(hmc_fn_id), obj->cnt);
0508 
0509 configure_lan_hmc_out:
0510     return ret_code;
0511 }
0512 
0513 /**
0514  * i40e_delete_lan_hmc_object - remove hmc objects
0515  * @hw: pointer to the HW structure
0516  * @info: pointer to i40e_hmc_delete_obj_info struct
0517  *
0518  * This will de-populate the SDs and PDs.  It frees
0519  * the memory for PDS and backing storage.  After this function is returned,
0520  * caller should deallocate memory allocated previously for
0521  * book-keeping information about PDs and backing storage.
0522  **/
0523 static i40e_status i40e_delete_lan_hmc_object(struct i40e_hw *hw,
0524                 struct i40e_hmc_lan_delete_obj_info *info)
0525 {
0526     i40e_status ret_code = 0;
0527     struct i40e_hmc_pd_table *pd_table;
0528     u32 pd_idx, pd_lmt, rel_pd_idx;
0529     u32 sd_idx, sd_lmt;
0530     u32 i, j;
0531 
0532     if (NULL == info) {
0533         ret_code = I40E_ERR_BAD_PTR;
0534         hw_dbg(hw, "i40e_delete_hmc_object: bad info ptr\n");
0535         goto exit;
0536     }
0537     if (NULL == info->hmc_info) {
0538         ret_code = I40E_ERR_BAD_PTR;
0539         hw_dbg(hw, "i40e_delete_hmc_object: bad info->hmc_info ptr\n");
0540         goto exit;
0541     }
0542     if (I40E_HMC_INFO_SIGNATURE != info->hmc_info->signature) {
0543         ret_code = I40E_ERR_BAD_PTR;
0544         hw_dbg(hw, "i40e_delete_hmc_object: bad hmc_info->signature\n");
0545         goto exit;
0546     }
0547 
0548     if (NULL == info->hmc_info->sd_table.sd_entry) {
0549         ret_code = I40E_ERR_BAD_PTR;
0550         hw_dbg(hw, "i40e_delete_hmc_object: bad sd_entry\n");
0551         goto exit;
0552     }
0553 
0554     if (NULL == info->hmc_info->hmc_obj) {
0555         ret_code = I40E_ERR_BAD_PTR;
0556         hw_dbg(hw, "i40e_delete_hmc_object: bad hmc_info->hmc_obj\n");
0557         goto exit;
0558     }
0559     if (info->start_idx >= info->hmc_info->hmc_obj[info->rsrc_type].cnt) {
0560         ret_code = I40E_ERR_INVALID_HMC_OBJ_INDEX;
0561         hw_dbg(hw, "i40e_delete_hmc_object: returns error %d\n",
0562               ret_code);
0563         goto exit;
0564     }
0565 
0566     if ((info->start_idx + info->count) >
0567         info->hmc_info->hmc_obj[info->rsrc_type].cnt) {
0568         ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT;
0569         hw_dbg(hw, "i40e_delete_hmc_object: returns error %d\n",
0570               ret_code);
0571         goto exit;
0572     }
0573 
0574     I40E_FIND_PD_INDEX_LIMIT(info->hmc_info, info->rsrc_type,
0575                  info->start_idx, info->count, &pd_idx,
0576                  &pd_lmt);
0577 
0578     for (j = pd_idx; j < pd_lmt; j++) {
0579         sd_idx = j / I40E_HMC_PD_CNT_IN_SD;
0580 
0581         if (I40E_SD_TYPE_PAGED !=
0582             info->hmc_info->sd_table.sd_entry[sd_idx].entry_type)
0583             continue;
0584 
0585         rel_pd_idx = j % I40E_HMC_PD_CNT_IN_SD;
0586 
0587         pd_table =
0588             &info->hmc_info->sd_table.sd_entry[sd_idx].u.pd_table;
0589         if (pd_table->pd_entry[rel_pd_idx].valid) {
0590             ret_code = i40e_remove_pd_bp(hw, info->hmc_info, j);
0591             if (ret_code)
0592                 goto exit;
0593         }
0594     }
0595 
0596     /* find sd index and limit */
0597     I40E_FIND_SD_INDEX_LIMIT(info->hmc_info, info->rsrc_type,
0598                  info->start_idx, info->count,
0599                  &sd_idx, &sd_lmt);
0600     if (sd_idx >= info->hmc_info->sd_table.sd_cnt ||
0601         sd_lmt > info->hmc_info->sd_table.sd_cnt) {
0602         ret_code = I40E_ERR_INVALID_SD_INDEX;
0603         goto exit;
0604     }
0605 
0606     for (i = sd_idx; i < sd_lmt; i++) {
0607         if (!info->hmc_info->sd_table.sd_entry[i].valid)
0608             continue;
0609         switch (info->hmc_info->sd_table.sd_entry[i].entry_type) {
0610         case I40E_SD_TYPE_DIRECT:
0611             ret_code = i40e_remove_sd_bp(hw, info->hmc_info, i);
0612             if (ret_code)
0613                 goto exit;
0614             break;
0615         case I40E_SD_TYPE_PAGED:
0616             ret_code = i40e_remove_pd_page(hw, info->hmc_info, i);
0617             if (ret_code)
0618                 goto exit;
0619             break;
0620         default:
0621             break;
0622         }
0623     }
0624 exit:
0625     return ret_code;
0626 }
0627 
0628 /**
0629  * i40e_shutdown_lan_hmc - Remove HMC backing store, free allocated memory
0630  * @hw: pointer to the hw structure
0631  *
0632  * This must be called by drivers as they are shutting down and being
0633  * removed from the OS.
0634  **/
0635 i40e_status i40e_shutdown_lan_hmc(struct i40e_hw *hw)
0636 {
0637     struct i40e_hmc_lan_delete_obj_info info;
0638     i40e_status ret_code;
0639 
0640     info.hmc_info = &hw->hmc;
0641     info.rsrc_type = I40E_HMC_LAN_FULL;
0642     info.start_idx = 0;
0643     info.count = 1;
0644 
0645     /* delete the object */
0646     ret_code = i40e_delete_lan_hmc_object(hw, &info);
0647 
0648     /* free the SD table entry for LAN */
0649     i40e_free_virt_mem(hw, &hw->hmc.sd_table.addr);
0650     hw->hmc.sd_table.sd_cnt = 0;
0651     hw->hmc.sd_table.sd_entry = NULL;
0652 
0653     /* free memory used for hmc_obj */
0654     i40e_free_virt_mem(hw, &hw->hmc.hmc_obj_virt_mem);
0655     hw->hmc.hmc_obj = NULL;
0656 
0657     return ret_code;
0658 }
0659 
0660 #define I40E_HMC_STORE(_struct, _ele)       \
0661     offsetof(struct _struct, _ele),     \
0662     sizeof_field(struct _struct, _ele)
0663 
0664 struct i40e_context_ele {
0665     u16 offset;
0666     u16 size_of;
0667     u16 width;
0668     u16 lsb;
0669 };
0670 
0671 /* LAN Tx Queue Context */
0672 static struct i40e_context_ele i40e_hmc_txq_ce_info[] = {
0673                          /* Field      Width    LSB */
0674     {I40E_HMC_STORE(i40e_hmc_obj_txq, head),           13,      0 },
0675     {I40E_HMC_STORE(i40e_hmc_obj_txq, new_context),     1,     30 },
0676     {I40E_HMC_STORE(i40e_hmc_obj_txq, base),           57,     32 },
0677     {I40E_HMC_STORE(i40e_hmc_obj_txq, fc_ena),          1,     89 },
0678     {I40E_HMC_STORE(i40e_hmc_obj_txq, timesync_ena),    1,     90 },
0679     {I40E_HMC_STORE(i40e_hmc_obj_txq, fd_ena),          1,     91 },
0680     {I40E_HMC_STORE(i40e_hmc_obj_txq, alt_vlan_ena),    1,     92 },
0681     {I40E_HMC_STORE(i40e_hmc_obj_txq, cpuid),           8,     96 },
0682 /* line 1 */
0683     {I40E_HMC_STORE(i40e_hmc_obj_txq, thead_wb),       13,  0 + 128 },
0684     {I40E_HMC_STORE(i40e_hmc_obj_txq, head_wb_ena),     1, 32 + 128 },
0685     {I40E_HMC_STORE(i40e_hmc_obj_txq, qlen),           13, 33 + 128 },
0686     {I40E_HMC_STORE(i40e_hmc_obj_txq, tphrdesc_ena),    1, 46 + 128 },
0687     {I40E_HMC_STORE(i40e_hmc_obj_txq, tphrpacket_ena),  1, 47 + 128 },
0688     {I40E_HMC_STORE(i40e_hmc_obj_txq, tphwdesc_ena),    1, 48 + 128 },
0689     {I40E_HMC_STORE(i40e_hmc_obj_txq, head_wb_addr),   64, 64 + 128 },
0690 /* line 7 */
0691     {I40E_HMC_STORE(i40e_hmc_obj_txq, crc),            32,  0 + (7 * 128) },
0692     {I40E_HMC_STORE(i40e_hmc_obj_txq, rdylist),        10, 84 + (7 * 128) },
0693     {I40E_HMC_STORE(i40e_hmc_obj_txq, rdylist_act),     1, 94 + (7 * 128) },
0694     { 0 }
0695 };
0696 
0697 /* LAN Rx Queue Context */
0698 static struct i40e_context_ele i40e_hmc_rxq_ce_info[] = {
0699                      /* Field      Width    LSB */
0700     { I40E_HMC_STORE(i40e_hmc_obj_rxq, head),        13,    0   },
0701     { I40E_HMC_STORE(i40e_hmc_obj_rxq, cpuid),        8,    13  },
0702     { I40E_HMC_STORE(i40e_hmc_obj_rxq, base),        57,    32  },
0703     { I40E_HMC_STORE(i40e_hmc_obj_rxq, qlen),        13,    89  },
0704     { I40E_HMC_STORE(i40e_hmc_obj_rxq, dbuff),        7,    102 },
0705     { I40E_HMC_STORE(i40e_hmc_obj_rxq, hbuff),        5,    109 },
0706     { I40E_HMC_STORE(i40e_hmc_obj_rxq, dtype),        2,    114 },
0707     { I40E_HMC_STORE(i40e_hmc_obj_rxq, dsize),        1,    116 },
0708     { I40E_HMC_STORE(i40e_hmc_obj_rxq, crcstrip),     1,    117 },
0709     { I40E_HMC_STORE(i40e_hmc_obj_rxq, fc_ena),       1,    118 },
0710     { I40E_HMC_STORE(i40e_hmc_obj_rxq, l2tsel),       1,    119 },
0711     { I40E_HMC_STORE(i40e_hmc_obj_rxq, hsplit_0),     4,    120 },
0712     { I40E_HMC_STORE(i40e_hmc_obj_rxq, hsplit_1),     2,    124 },
0713     { I40E_HMC_STORE(i40e_hmc_obj_rxq, showiv),       1,    127 },
0714     { I40E_HMC_STORE(i40e_hmc_obj_rxq, rxmax),       14,    174 },
0715     { I40E_HMC_STORE(i40e_hmc_obj_rxq, tphrdesc_ena), 1,    193 },
0716     { I40E_HMC_STORE(i40e_hmc_obj_rxq, tphwdesc_ena), 1,    194 },
0717     { I40E_HMC_STORE(i40e_hmc_obj_rxq, tphdata_ena),  1,    195 },
0718     { I40E_HMC_STORE(i40e_hmc_obj_rxq, tphhead_ena),  1,    196 },
0719     { I40E_HMC_STORE(i40e_hmc_obj_rxq, lrxqthresh),   3,    198 },
0720     { I40E_HMC_STORE(i40e_hmc_obj_rxq, prefena),      1,    201 },
0721     { 0 }
0722 };
0723 
0724 /**
0725  * i40e_write_byte - replace HMC context byte
0726  * @hmc_bits: pointer to the HMC memory
0727  * @ce_info: a description of the struct to be read from
0728  * @src: the struct to be read from
0729  **/
0730 static void i40e_write_byte(u8 *hmc_bits,
0731                 struct i40e_context_ele *ce_info,
0732                 u8 *src)
0733 {
0734     u8 src_byte, dest_byte, mask;
0735     u8 *from, *dest;
0736     u16 shift_width;
0737 
0738     /* copy from the next struct field */
0739     from = src + ce_info->offset;
0740 
0741     /* prepare the bits and mask */
0742     shift_width = ce_info->lsb % 8;
0743     mask = (u8)(BIT(ce_info->width) - 1);
0744 
0745     src_byte = *from;
0746     src_byte &= mask;
0747 
0748     /* shift to correct alignment */
0749     mask <<= shift_width;
0750     src_byte <<= shift_width;
0751 
0752     /* get the current bits from the target bit string */
0753     dest = hmc_bits + (ce_info->lsb / 8);
0754 
0755     memcpy(&dest_byte, dest, sizeof(dest_byte));
0756 
0757     dest_byte &= ~mask; /* get the bits not changing */
0758     dest_byte |= src_byte;  /* add in the new bits */
0759 
0760     /* put it all back */
0761     memcpy(dest, &dest_byte, sizeof(dest_byte));
0762 }
0763 
0764 /**
0765  * i40e_write_word - replace HMC context word
0766  * @hmc_bits: pointer to the HMC memory
0767  * @ce_info: a description of the struct to be read from
0768  * @src: the struct to be read from
0769  **/
0770 static void i40e_write_word(u8 *hmc_bits,
0771                 struct i40e_context_ele *ce_info,
0772                 u8 *src)
0773 {
0774     u16 src_word, mask;
0775     u8 *from, *dest;
0776     u16 shift_width;
0777     __le16 dest_word;
0778 
0779     /* copy from the next struct field */
0780     from = src + ce_info->offset;
0781 
0782     /* prepare the bits and mask */
0783     shift_width = ce_info->lsb % 8;
0784     mask = BIT(ce_info->width) - 1;
0785 
0786     /* don't swizzle the bits until after the mask because the mask bits
0787      * will be in a different bit position on big endian machines
0788      */
0789     src_word = *(u16 *)from;
0790     src_word &= mask;
0791 
0792     /* shift to correct alignment */
0793     mask <<= shift_width;
0794     src_word <<= shift_width;
0795 
0796     /* get the current bits from the target bit string */
0797     dest = hmc_bits + (ce_info->lsb / 8);
0798 
0799     memcpy(&dest_word, dest, sizeof(dest_word));
0800 
0801     dest_word &= ~(cpu_to_le16(mask));  /* get the bits not changing */
0802     dest_word |= cpu_to_le16(src_word); /* add in the new bits */
0803 
0804     /* put it all back */
0805     memcpy(dest, &dest_word, sizeof(dest_word));
0806 }
0807 
0808 /**
0809  * i40e_write_dword - replace HMC context dword
0810  * @hmc_bits: pointer to the HMC memory
0811  * @ce_info: a description of the struct to be read from
0812  * @src: the struct to be read from
0813  **/
0814 static void i40e_write_dword(u8 *hmc_bits,
0815                  struct i40e_context_ele *ce_info,
0816                  u8 *src)
0817 {
0818     u32 src_dword, mask;
0819     u8 *from, *dest;
0820     u16 shift_width;
0821     __le32 dest_dword;
0822 
0823     /* copy from the next struct field */
0824     from = src + ce_info->offset;
0825 
0826     /* prepare the bits and mask */
0827     shift_width = ce_info->lsb % 8;
0828 
0829     /* if the field width is exactly 32 on an x86 machine, then the shift
0830      * operation will not work because the SHL instructions count is masked
0831      * to 5 bits so the shift will do nothing
0832      */
0833     if (ce_info->width < 32)
0834         mask = BIT(ce_info->width) - 1;
0835     else
0836         mask = ~(u32)0;
0837 
0838     /* don't swizzle the bits until after the mask because the mask bits
0839      * will be in a different bit position on big endian machines
0840      */
0841     src_dword = *(u32 *)from;
0842     src_dword &= mask;
0843 
0844     /* shift to correct alignment */
0845     mask <<= shift_width;
0846     src_dword <<= shift_width;
0847 
0848     /* get the current bits from the target bit string */
0849     dest = hmc_bits + (ce_info->lsb / 8);
0850 
0851     memcpy(&dest_dword, dest, sizeof(dest_dword));
0852 
0853     dest_dword &= ~(cpu_to_le32(mask)); /* get the bits not changing */
0854     dest_dword |= cpu_to_le32(src_dword);   /* add in the new bits */
0855 
0856     /* put it all back */
0857     memcpy(dest, &dest_dword, sizeof(dest_dword));
0858 }
0859 
0860 /**
0861  * i40e_write_qword - replace HMC context qword
0862  * @hmc_bits: pointer to the HMC memory
0863  * @ce_info: a description of the struct to be read from
0864  * @src: the struct to be read from
0865  **/
0866 static void i40e_write_qword(u8 *hmc_bits,
0867                  struct i40e_context_ele *ce_info,
0868                  u8 *src)
0869 {
0870     u64 src_qword, mask;
0871     u8 *from, *dest;
0872     u16 shift_width;
0873     __le64 dest_qword;
0874 
0875     /* copy from the next struct field */
0876     from = src + ce_info->offset;
0877 
0878     /* prepare the bits and mask */
0879     shift_width = ce_info->lsb % 8;
0880 
0881     /* if the field width is exactly 64 on an x86 machine, then the shift
0882      * operation will not work because the SHL instructions count is masked
0883      * to 6 bits so the shift will do nothing
0884      */
0885     if (ce_info->width < 64)
0886         mask = BIT_ULL(ce_info->width) - 1;
0887     else
0888         mask = ~(u64)0;
0889 
0890     /* don't swizzle the bits until after the mask because the mask bits
0891      * will be in a different bit position on big endian machines
0892      */
0893     src_qword = *(u64 *)from;
0894     src_qword &= mask;
0895 
0896     /* shift to correct alignment */
0897     mask <<= shift_width;
0898     src_qword <<= shift_width;
0899 
0900     /* get the current bits from the target bit string */
0901     dest = hmc_bits + (ce_info->lsb / 8);
0902 
0903     memcpy(&dest_qword, dest, sizeof(dest_qword));
0904 
0905     dest_qword &= ~(cpu_to_le64(mask)); /* get the bits not changing */
0906     dest_qword |= cpu_to_le64(src_qword);   /* add in the new bits */
0907 
0908     /* put it all back */
0909     memcpy(dest, &dest_qword, sizeof(dest_qword));
0910 }
0911 
0912 /**
0913  * i40e_clear_hmc_context - zero out the HMC context bits
0914  * @hw:       the hardware struct
0915  * @context_bytes: pointer to the context bit array (DMA memory)
0916  * @hmc_type: the type of HMC resource
0917  **/
0918 static i40e_status i40e_clear_hmc_context(struct i40e_hw *hw,
0919                     u8 *context_bytes,
0920                     enum i40e_hmc_lan_rsrc_type hmc_type)
0921 {
0922     /* clean the bit array */
0923     memset(context_bytes, 0, (u32)hw->hmc.hmc_obj[hmc_type].size);
0924 
0925     return 0;
0926 }
0927 
0928 /**
0929  * i40e_set_hmc_context - replace HMC context bits
0930  * @context_bytes: pointer to the context bit array
0931  * @ce_info:  a description of the struct to be filled
0932  * @dest:     the struct to be filled
0933  **/
0934 static i40e_status i40e_set_hmc_context(u8 *context_bytes,
0935                     struct i40e_context_ele *ce_info,
0936                     u8 *dest)
0937 {
0938     int f;
0939 
0940     for (f = 0; ce_info[f].width != 0; f++) {
0941 
0942         /* we have to deal with each element of the HMC using the
0943          * correct size so that we are correct regardless of the
0944          * endianness of the machine
0945          */
0946         switch (ce_info[f].size_of) {
0947         case 1:
0948             i40e_write_byte(context_bytes, &ce_info[f], dest);
0949             break;
0950         case 2:
0951             i40e_write_word(context_bytes, &ce_info[f], dest);
0952             break;
0953         case 4:
0954             i40e_write_dword(context_bytes, &ce_info[f], dest);
0955             break;
0956         case 8:
0957             i40e_write_qword(context_bytes, &ce_info[f], dest);
0958             break;
0959         }
0960     }
0961 
0962     return 0;
0963 }
0964 
0965 /**
0966  * i40e_hmc_get_object_va - retrieves an object's virtual address
0967  * @hw: the hardware struct, from which we obtain the i40e_hmc_info pointer
0968  * @object_base: pointer to u64 to get the va
0969  * @rsrc_type: the hmc resource type
0970  * @obj_idx: hmc object index
0971  *
0972  * This function retrieves the object's virtual address from the object
0973  * base pointer.  This function is used for LAN Queue contexts.
0974  **/
0975 static
0976 i40e_status i40e_hmc_get_object_va(struct i40e_hw *hw, u8 **object_base,
0977                    enum i40e_hmc_lan_rsrc_type rsrc_type,
0978                    u32 obj_idx)
0979 {
0980     struct i40e_hmc_info *hmc_info = &hw->hmc;
0981     u32 obj_offset_in_sd, obj_offset_in_pd;
0982     struct i40e_hmc_sd_entry *sd_entry;
0983     struct i40e_hmc_pd_entry *pd_entry;
0984     u32 pd_idx, pd_lmt, rel_pd_idx;
0985     i40e_status ret_code = 0;
0986     u64 obj_offset_in_fpm;
0987     u32 sd_idx, sd_lmt;
0988 
0989     if (NULL == hmc_info) {
0990         ret_code = I40E_ERR_BAD_PTR;
0991         hw_dbg(hw, "i40e_hmc_get_object_va: bad hmc_info ptr\n");
0992         goto exit;
0993     }
0994     if (NULL == hmc_info->hmc_obj) {
0995         ret_code = I40E_ERR_BAD_PTR;
0996         hw_dbg(hw, "i40e_hmc_get_object_va: bad hmc_info->hmc_obj ptr\n");
0997         goto exit;
0998     }
0999     if (NULL == object_base) {
1000         ret_code = I40E_ERR_BAD_PTR;
1001         hw_dbg(hw, "i40e_hmc_get_object_va: bad object_base ptr\n");
1002         goto exit;
1003     }
1004     if (I40E_HMC_INFO_SIGNATURE != hmc_info->signature) {
1005         ret_code = I40E_ERR_BAD_PTR;
1006         hw_dbg(hw, "i40e_hmc_get_object_va: bad hmc_info->signature\n");
1007         goto exit;
1008     }
1009     if (obj_idx >= hmc_info->hmc_obj[rsrc_type].cnt) {
1010         hw_dbg(hw, "i40e_hmc_get_object_va: returns error %d\n",
1011               ret_code);
1012         ret_code = I40E_ERR_INVALID_HMC_OBJ_INDEX;
1013         goto exit;
1014     }
1015     /* find sd index and limit */
1016     I40E_FIND_SD_INDEX_LIMIT(hmc_info, rsrc_type, obj_idx, 1,
1017                  &sd_idx, &sd_lmt);
1018 
1019     sd_entry = &hmc_info->sd_table.sd_entry[sd_idx];
1020     obj_offset_in_fpm = hmc_info->hmc_obj[rsrc_type].base +
1021                 hmc_info->hmc_obj[rsrc_type].size * obj_idx;
1022 
1023     if (I40E_SD_TYPE_PAGED == sd_entry->entry_type) {
1024         I40E_FIND_PD_INDEX_LIMIT(hmc_info, rsrc_type, obj_idx, 1,
1025                      &pd_idx, &pd_lmt);
1026         rel_pd_idx = pd_idx % I40E_HMC_PD_CNT_IN_SD;
1027         pd_entry = &sd_entry->u.pd_table.pd_entry[rel_pd_idx];
1028         obj_offset_in_pd = (u32)(obj_offset_in_fpm %
1029                      I40E_HMC_PAGED_BP_SIZE);
1030         *object_base = (u8 *)pd_entry->bp.addr.va + obj_offset_in_pd;
1031     } else {
1032         obj_offset_in_sd = (u32)(obj_offset_in_fpm %
1033                      I40E_HMC_DIRECT_BP_SIZE);
1034         *object_base = (u8 *)sd_entry->u.bp.addr.va + obj_offset_in_sd;
1035     }
1036 exit:
1037     return ret_code;
1038 }
1039 
1040 /**
1041  * i40e_clear_lan_tx_queue_context - clear the HMC context for the queue
1042  * @hw:    the hardware struct
1043  * @queue: the queue we care about
1044  **/
1045 i40e_status i40e_clear_lan_tx_queue_context(struct i40e_hw *hw,
1046                               u16 queue)
1047 {
1048     i40e_status err;
1049     u8 *context_bytes;
1050 
1051     err = i40e_hmc_get_object_va(hw, &context_bytes,
1052                      I40E_HMC_LAN_TX, queue);
1053     if (err < 0)
1054         return err;
1055 
1056     return i40e_clear_hmc_context(hw, context_bytes, I40E_HMC_LAN_TX);
1057 }
1058 
1059 /**
1060  * i40e_set_lan_tx_queue_context - set the HMC context for the queue
1061  * @hw:    the hardware struct
1062  * @queue: the queue we care about
1063  * @s:     the struct to be filled
1064  **/
1065 i40e_status i40e_set_lan_tx_queue_context(struct i40e_hw *hw,
1066                             u16 queue,
1067                             struct i40e_hmc_obj_txq *s)
1068 {
1069     i40e_status err;
1070     u8 *context_bytes;
1071 
1072     err = i40e_hmc_get_object_va(hw, &context_bytes,
1073                      I40E_HMC_LAN_TX, queue);
1074     if (err < 0)
1075         return err;
1076 
1077     return i40e_set_hmc_context(context_bytes,
1078                     i40e_hmc_txq_ce_info, (u8 *)s);
1079 }
1080 
1081 /**
1082  * i40e_clear_lan_rx_queue_context - clear the HMC context for the queue
1083  * @hw:    the hardware struct
1084  * @queue: the queue we care about
1085  **/
1086 i40e_status i40e_clear_lan_rx_queue_context(struct i40e_hw *hw,
1087                               u16 queue)
1088 {
1089     i40e_status err;
1090     u8 *context_bytes;
1091 
1092     err = i40e_hmc_get_object_va(hw, &context_bytes,
1093                      I40E_HMC_LAN_RX, queue);
1094     if (err < 0)
1095         return err;
1096 
1097     return i40e_clear_hmc_context(hw, context_bytes, I40E_HMC_LAN_RX);
1098 }
1099 
1100 /**
1101  * i40e_set_lan_rx_queue_context - set the HMC context for the queue
1102  * @hw:    the hardware struct
1103  * @queue: the queue we care about
1104  * @s:     the struct to be filled
1105  **/
1106 i40e_status i40e_set_lan_rx_queue_context(struct i40e_hw *hw,
1107                             u16 queue,
1108                             struct i40e_hmc_obj_rxq *s)
1109 {
1110     i40e_status err;
1111     u8 *context_bytes;
1112 
1113     err = i40e_hmc_get_object_va(hw, &context_bytes,
1114                      I40E_HMC_LAN_RX, queue);
1115     if (err < 0)
1116         return err;
1117 
1118     return i40e_set_hmc_context(context_bytes,
1119                     i40e_hmc_rxq_ce_info, (u8 *)s);
1120 }
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