intel/i40e/i40e_hmc.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /* Copyright(c) 2013 - 2018 Intel Corporation. */
0003
0004 #ifndef _I40E_HMC_H_
0005 #define _I40E_HMC_H_
0006
0007 #define I40E_HMC_MAX_BP_COUNT 512
0008
0009 /* forward-declare the HW struct for the compiler */
0010 struct i40e_hw;
0011
0012 #define I40E_HMC_INFO_SIGNATURE     0x484D5347 /* HMSG */
0013 #define I40E_HMC_PD_CNT_IN_SD       512
0014 #define I40E_HMC_DIRECT_BP_SIZE     0x200000 /* 2M */
0015 #define I40E_HMC_PAGED_BP_SIZE      4096
0016 #define I40E_HMC_PD_BP_BUF_ALIGNMENT    4096
0017
0018 struct i40e_hmc_obj_info {
0019     u64 base;   /* base addr in FPM */
0020     u32 max_cnt;    /* max count available for this hmc func */
0021     u32 cnt;    /* count of objects driver actually wants to create */
0022     u64 size;   /* size in bytes of one object */
0023 };
0024
0025 enum i40e_sd_entry_type {
0026     I40E_SD_TYPE_INVALID = 0,
0027     I40E_SD_TYPE_PAGED   = 1,
0028     I40E_SD_TYPE_DIRECT  = 2
0029 };
0030
0031 struct i40e_hmc_bp {
0032     enum i40e_sd_entry_type entry_type;
0033     struct i40e_dma_mem addr; /* populate to be used by hw */
0034     u32 sd_pd_index;
0035     u32 ref_cnt;
0036 };
0037
0038 struct i40e_hmc_pd_entry {
0039     struct i40e_hmc_bp bp;
0040     u32 sd_index;
0041     bool rsrc_pg;
0042     bool valid;
0043 };
0044
0045 struct i40e_hmc_pd_table {
0046     struct i40e_dma_mem pd_page_addr; /* populate to be used by hw */
0047     struct i40e_hmc_pd_entry  *pd_entry; /* [512] for sw book keeping */
0048     struct i40e_virt_mem pd_entry_virt_mem; /* virt mem for pd_entry */
0049
0050     u32 ref_cnt;
0051     u32 sd_index;
0052 };
0053
0054 struct i40e_hmc_sd_entry {
0055     enum i40e_sd_entry_type entry_type;
0056     bool valid;
0057
0058     union {
0059         struct i40e_hmc_pd_table pd_table;
0060         struct i40e_hmc_bp bp;
0061     } u;
0062 };
0063
0064 struct i40e_hmc_sd_table {
0065     struct i40e_virt_mem addr; /* used to track sd_entry allocations */
0066     u32 sd_cnt;
0067     u32 ref_cnt;
0068     struct i40e_hmc_sd_entry *sd_entry; /* (sd_cnt*512) entries max */
0069 };
0070
0071 struct i40e_hmc_info {
0072     u32 signature;
0073     /* equals to pci func num for PF and dynamically allocated for VFs */
0074     u8 hmc_fn_id;
0075     u16 first_sd_index; /* index of the first available SD */
0076
0077     /* hmc objects */
0078     struct i40e_hmc_obj_info *hmc_obj;
0079     struct i40e_virt_mem hmc_obj_virt_mem;
0080     struct i40e_hmc_sd_table sd_table;
0081 };
0082
0083 #define I40E_INC_SD_REFCNT(sd_table)    ((sd_table)->ref_cnt++)
0084 #define I40E_INC_PD_REFCNT(pd_table)    ((pd_table)->ref_cnt++)
0085 #define I40E_INC_BP_REFCNT(bp)      ((bp)->ref_cnt++)
0086
0087 #define I40E_DEC_SD_REFCNT(sd_table)    ((sd_table)->ref_cnt--)
0088 #define I40E_DEC_PD_REFCNT(pd_table)    ((pd_table)->ref_cnt--)
0089 #define I40E_DEC_BP_REFCNT(bp)      ((bp)->ref_cnt--)
0090
0091 /**
0092  * I40E_SET_PF_SD_ENTRY - marks the sd entry as valid in the hardware
0093  * @hw: pointer to our hw struct
0094  * @pa: pointer to physical address
0095  * @sd_index: segment descriptor index
0096  * @type: if sd entry is direct or paged
0097  **/
0098 #define I40E_SET_PF_SD_ENTRY(hw, pa, sd_index, type)            \
0099 {                                   \
0100     u32 val1, val2, val3;                       \
0101     val1 = (u32)(upper_32_bits(pa));                \
0102     val2 = (u32)(pa) | (I40E_HMC_MAX_BP_COUNT <<            \
0103          I40E_PFHMC_SDDATALOW_PMSDBPCOUNT_SHIFT) |      \
0104         ((((type) == I40E_SD_TYPE_PAGED) ? 0 : 1) <<        \
0105         I40E_PFHMC_SDDATALOW_PMSDTYPE_SHIFT) |          \
0106         BIT(I40E_PFHMC_SDDATALOW_PMSDVALID_SHIFT);      \
0107     val3 = (sd_index) | BIT_ULL(I40E_PFHMC_SDCMD_PMSDWR_SHIFT); \
0108     wr32((hw), I40E_PFHMC_SDDATAHIGH, val1);            \
0109     wr32((hw), I40E_PFHMC_SDDATALOW, val2);             \
0110     wr32((hw), I40E_PFHMC_SDCMD, val3);             \
0111 }
0112
0113 /**
0114  * I40E_CLEAR_PF_SD_ENTRY - marks the sd entry as invalid in the hardware
0115  * @hw: pointer to our hw struct
0116  * @sd_index: segment descriptor index
0117  * @type: if sd entry is direct or paged
0118  **/
0119 #define I40E_CLEAR_PF_SD_ENTRY(hw, sd_index, type)          \
0120 {                                   \
0121     u32 val2, val3;                         \
0122     val2 = (I40E_HMC_MAX_BP_COUNT <<                \
0123         I40E_PFHMC_SDDATALOW_PMSDBPCOUNT_SHIFT) |       \
0124         ((((type) == I40E_SD_TYPE_PAGED) ? 0 : 1) <<        \
0125         I40E_PFHMC_SDDATALOW_PMSDTYPE_SHIFT);           \
0126     val3 = (sd_index) | BIT_ULL(I40E_PFHMC_SDCMD_PMSDWR_SHIFT); \
0127     wr32((hw), I40E_PFHMC_SDDATAHIGH, 0);               \
0128     wr32((hw), I40E_PFHMC_SDDATALOW, val2);             \
0129     wr32((hw), I40E_PFHMC_SDCMD, val3);             \
0130 }
0131
0132 /**
0133  * I40E_INVALIDATE_PF_HMC_PD - Invalidates the pd cache in the hardware
0134  * @hw: pointer to our hw struct
0135  * @sd_idx: segment descriptor index
0136  * @pd_idx: page descriptor index
0137  **/
0138 #define I40E_INVALIDATE_PF_HMC_PD(hw, sd_idx, pd_idx)           \
0139     wr32((hw), I40E_PFHMC_PDINV,                    \
0140         (((sd_idx) << I40E_PFHMC_PDINV_PMSDIDX_SHIFT) |     \
0141          ((pd_idx) << I40E_PFHMC_PDINV_PMPDIDX_SHIFT)))
0142
0143 /**
0144  * I40E_FIND_SD_INDEX_LIMIT - finds segment descriptor index limit
0145  * @hmc_info: pointer to the HMC configuration information structure
0146  * @type: type of HMC resources we're searching
0147  * @index: starting index for the object
0148  * @cnt: number of objects we're trying to create
0149  * @sd_idx: pointer to return index of the segment descriptor in question
0150  * @sd_limit: pointer to return the maximum number of segment descriptors
0151  *
0152  * This function calculates the segment descriptor index and index limit
0153  * for the resource defined by i40e_hmc_rsrc_type.
0154  **/
0155 #define I40E_FIND_SD_INDEX_LIMIT(hmc_info, type, index, cnt, sd_idx, sd_limit)\
0156 {                                   \
0157     u64 fpm_addr, fpm_limit;                    \
0158     fpm_addr = (hmc_info)->hmc_obj[(type)].base +           \
0159            (hmc_info)->hmc_obj[(type)].size * (index);      \
0160     fpm_limit = fpm_addr + (hmc_info)->hmc_obj[(type)].size * (cnt);\
0161     *(sd_idx) = (u32)(fpm_addr / I40E_HMC_DIRECT_BP_SIZE);      \
0162     *(sd_limit) = (u32)((fpm_limit - 1) / I40E_HMC_DIRECT_BP_SIZE); \
0163     /* add one more to the limit to correct our range */        \
0164     *(sd_limit) += 1;                       \
0165 }
0166
0167 /**
0168  * I40E_FIND_PD_INDEX_LIMIT - finds page descriptor index limit
0169  * @hmc_info: pointer to the HMC configuration information struct
0170  * @type: HMC resource type we're examining
0171  * @idx: starting index for the object
0172  * @cnt: number of objects we're trying to create
0173  * @pd_index: pointer to return page descriptor index
0174  * @pd_limit: pointer to return page descriptor index limit
0175  *
0176  * Calculates the page descriptor index and index limit for the resource
0177  * defined by i40e_hmc_rsrc_type.
0178  **/
0179 #define I40E_FIND_PD_INDEX_LIMIT(hmc_info, type, idx, cnt, pd_index, pd_limit)\
0180 {                                   \
0181     u64 fpm_adr, fpm_limit;                     \
0182     fpm_adr = (hmc_info)->hmc_obj[(type)].base +            \
0183           (hmc_info)->hmc_obj[(type)].size * (idx);     \
0184     fpm_limit = fpm_adr + (hmc_info)->hmc_obj[(type)].size * (cnt); \
0185     *(pd_index) = (u32)(fpm_adr / I40E_HMC_PAGED_BP_SIZE);      \
0186     *(pd_limit) = (u32)((fpm_limit - 1) / I40E_HMC_PAGED_BP_SIZE);  \
0187     /* add one more to the limit to correct our range */        \
0188     *(pd_limit) += 1;                       \
0189 }
0190 i40e_status i40e_add_sd_table_entry(struct i40e_hw *hw,
0191                           struct i40e_hmc_info *hmc_info,
0192                           u32 sd_index,
0193                           enum i40e_sd_entry_type type,
0194                           u64 direct_mode_sz);
0195
0196 i40e_status i40e_add_pd_table_entry(struct i40e_hw *hw,
0197                           struct i40e_hmc_info *hmc_info,
0198                           u32 pd_index,
0199                           struct i40e_dma_mem *rsrc_pg);
0200 i40e_status i40e_remove_pd_bp(struct i40e_hw *hw,
0201                     struct i40e_hmc_info *hmc_info,
0202                     u32 idx);
0203 i40e_status i40e_prep_remove_sd_bp(struct i40e_hmc_info *hmc_info,
0204                          u32 idx);
0205 i40e_status i40e_remove_sd_bp_new(struct i40e_hw *hw,
0206                         struct i40e_hmc_info *hmc_info,
0207                         u32 idx, bool is_pf);
0208 i40e_status i40e_prep_remove_pd_page(struct i40e_hmc_info *hmc_info,
0209                            u32 idx);
0210 i40e_status i40e_remove_pd_page_new(struct i40e_hw *hw,
0211                           struct i40e_hmc_info *hmc_info,
0212                           u32 idx, bool is_pf);
0213
0214 #endif /* _I40E_HMC_H_ */