intel/e1000e/ptp.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /* Copyright(c) 1999 - 2018 Intel Corporation. */
0003
0004 /* PTP 1588 Hardware Clock (PHC)
0005  * Derived from PTP Hardware Clock driver for Intel 82576 and 82580 (igb)
0006  * Copyright (C) 2011 Richard Cochran <richardcochran@gmail.com>
0007  */
0008
0009 #include "e1000.h"
0010
0011 #ifdef CONFIG_E1000E_HWTS
0012 #include <linux/clocksource.h>
0013 #include <linux/ktime.h>
0014 #include <asm/tsc.h>
0015 #endif
0016
0017 /**
0018  * e1000e_phc_adjfine - adjust the frequency of the hardware clock
0019  * @ptp: ptp clock structure
0020  * @delta: Desired frequency chance in scaled parts per million
0021  *
0022  * Adjust the frequency of the PHC cycle counter by the indicated delta from
0023  * the base frequency.
0024  *
0025  * Scaled parts per million is ppm but with a 16 bit binary fractional field.
0026  **/
0027 static int e1000e_phc_adjfine(struct ptp_clock_info *ptp, long delta)
0028 {
0029     struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
0030                              ptp_clock_info);
0031     struct e1000_hw *hw = &adapter->hw;
0032     bool neg_adj = false;
0033     unsigned long flags;
0034     u64 adjustment;
0035     u32 timinca, incvalue;
0036     s32 ret_val;
0037
0038     if (delta < 0) {
0039         neg_adj = true;
0040         delta = -delta;
0041     }
0042
0043     /* Get the System Time Register SYSTIM base frequency */
0044     ret_val = e1000e_get_base_timinca(adapter, &timinca);
0045     if (ret_val)
0046         return ret_val;
0047
0048     spin_lock_irqsave(&adapter->systim_lock, flags);
0049
0050     incvalue = timinca & E1000_TIMINCA_INCVALUE_MASK;
0051
0052     adjustment = mul_u64_u64_div_u64(incvalue, (u64)delta,
0053                      1000000ULL << 16);
0054
0055     incvalue = neg_adj ? (incvalue - adjustment) : (incvalue + adjustment);
0056
0057     timinca &= ~E1000_TIMINCA_INCVALUE_MASK;
0058     timinca |= incvalue;
0059
0060     ew32(TIMINCA, timinca);
0061
0062     adapter->ptp_delta = delta;
0063
0064     spin_unlock_irqrestore(&adapter->systim_lock, flags);
0065
0066     return 0;
0067 }
0068
0069 /**
0070  * e1000e_phc_adjtime - Shift the time of the hardware clock
0071  * @ptp: ptp clock structure
0072  * @delta: Desired change in nanoseconds
0073  *
0074  * Adjust the timer by resetting the timecounter structure.
0075  **/
0076 static int e1000e_phc_adjtime(struct ptp_clock_info *ptp, s64 delta)
0077 {
0078     struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
0079                              ptp_clock_info);
0080     unsigned long flags;
0081
0082     spin_lock_irqsave(&adapter->systim_lock, flags);
0083     timecounter_adjtime(&adapter->tc, delta);
0084     spin_unlock_irqrestore(&adapter->systim_lock, flags);
0085
0086     return 0;
0087 }
0088
0089 #ifdef CONFIG_E1000E_HWTS
0090 #define MAX_HW_WAIT_COUNT (3)
0091
0092 /**
0093  * e1000e_phc_get_syncdevicetime - Callback given to timekeeping code reads system/device registers
0094  * @device: current device time
0095  * @system: system counter value read synchronously with device time
0096  * @ctx: context provided by timekeeping code
0097  *
0098  * Read device and system (ART) clock simultaneously and return the corrected
0099  * clock values in ns.
0100  **/
0101 static int e1000e_phc_get_syncdevicetime(ktime_t *device,
0102                      struct system_counterval_t *system,
0103                      void *ctx)
0104 {
0105     struct e1000_adapter *adapter = (struct e1000_adapter *)ctx;
0106     struct e1000_hw *hw = &adapter->hw;
0107     unsigned long flags;
0108     int i;
0109     u32 tsync_ctrl;
0110     u64 dev_cycles;
0111     u64 sys_cycles;
0112
0113     tsync_ctrl = er32(TSYNCTXCTL);
0114     tsync_ctrl |= E1000_TSYNCTXCTL_START_SYNC |
0115         E1000_TSYNCTXCTL_MAX_ALLOWED_DLY_MASK;
0116     ew32(TSYNCTXCTL, tsync_ctrl);
0117     for (i = 0; i < MAX_HW_WAIT_COUNT; ++i) {
0118         udelay(1);
0119         tsync_ctrl = er32(TSYNCTXCTL);
0120         if (tsync_ctrl & E1000_TSYNCTXCTL_SYNC_COMP)
0121             break;
0122     }
0123
0124     if (i == MAX_HW_WAIT_COUNT)
0125         return -ETIMEDOUT;
0126
0127     dev_cycles = er32(SYSSTMPH);
0128     dev_cycles <<= 32;
0129     dev_cycles |= er32(SYSSTMPL);
0130     spin_lock_irqsave(&adapter->systim_lock, flags);
0131     *device = ns_to_ktime(timecounter_cyc2time(&adapter->tc, dev_cycles));
0132     spin_unlock_irqrestore(&adapter->systim_lock, flags);
0133
0134     sys_cycles = er32(PLTSTMPH);
0135     sys_cycles <<= 32;
0136     sys_cycles |= er32(PLTSTMPL);
0137     *system = convert_art_to_tsc(sys_cycles);
0138
0139     return 0;
0140 }
0141
0142 /**
0143  * e1000e_phc_getcrosststamp - Reads the current system/device cross timestamp
0144  * @ptp: ptp clock structure
0145  * @xtstamp: structure containing timestamp
0146  *
0147  * Read device and system (ART) clock simultaneously and return the scaled
0148  * clock values in ns.
0149  **/
0150 static int e1000e_phc_getcrosststamp(struct ptp_clock_info *ptp,
0151                      struct system_device_crosststamp *xtstamp)
0152 {
0153     struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
0154                              ptp_clock_info);
0155
0156     return get_device_system_crosststamp(e1000e_phc_get_syncdevicetime,
0157                         adapter, NULL, xtstamp);
0158 }
0159 #endif/*CONFIG_E1000E_HWTS*/
0160
0161 /**
0162  * e1000e_phc_gettimex - Reads the current time from the hardware clock and
0163  *                       system clock
0164  * @ptp: ptp clock structure
0165  * @ts: timespec structure to hold the current PHC time
0166  * @sts: structure to hold the current system time
0167  *
0168  * Read the timecounter and return the correct value in ns after converting
0169  * it into a struct timespec.
0170  **/
0171 static int e1000e_phc_gettimex(struct ptp_clock_info *ptp,
0172                    struct timespec64 *ts,
0173                    struct ptp_system_timestamp *sts)
0174 {
0175     struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
0176                              ptp_clock_info);
0177     unsigned long flags;
0178     u64 cycles, ns;
0179
0180     spin_lock_irqsave(&adapter->systim_lock, flags);
0181
0182     /* NOTE: Non-monotonic SYSTIM readings may be returned */
0183     cycles = e1000e_read_systim(adapter, sts);
0184     ns = timecounter_cyc2time(&adapter->tc, cycles);
0185
0186     spin_unlock_irqrestore(&adapter->systim_lock, flags);
0187
0188     *ts = ns_to_timespec64(ns);
0189
0190     return 0;
0191 }
0192
0193 /**
0194  * e1000e_phc_settime - Set the current time on the hardware clock
0195  * @ptp: ptp clock structure
0196  * @ts: timespec containing the new time for the cycle counter
0197  *
0198  * Reset the timecounter to use a new base value instead of the kernel
0199  * wall timer value.
0200  **/
0201 static int e1000e_phc_settime(struct ptp_clock_info *ptp,
0202                   const struct timespec64 *ts)
0203 {
0204     struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
0205                              ptp_clock_info);
0206     unsigned long flags;
0207     u64 ns;
0208
0209     ns = timespec64_to_ns(ts);
0210
0211     /* reset the timecounter */
0212     spin_lock_irqsave(&adapter->systim_lock, flags);
0213     timecounter_init(&adapter->tc, &adapter->cc, ns);
0214     spin_unlock_irqrestore(&adapter->systim_lock, flags);
0215
0216     return 0;
0217 }
0218
0219 /**
0220  * e1000e_phc_enable - enable or disable an ancillary feature
0221  * @ptp: ptp clock structure
0222  * @request: Desired resource to enable or disable
0223  * @on: Caller passes one to enable or zero to disable
0224  *
0225  * Enable (or disable) ancillary features of the PHC subsystem.
0226  * Currently, no ancillary features are supported.
0227  **/
0228 static int e1000e_phc_enable(struct ptp_clock_info __always_unused *ptp,
0229                  struct ptp_clock_request __always_unused *request,
0230                  int __always_unused on)
0231 {
0232     return -EOPNOTSUPP;
0233 }
0234
0235 static void e1000e_systim_overflow_work(struct work_struct *work)
0236 {
0237     struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
0238                              systim_overflow_work.work);
0239     struct e1000_hw *hw = &adapter->hw;
0240     struct timespec64 ts;
0241     u64 ns;
0242
0243     /* Update the timecounter */
0244     ns = timecounter_read(&adapter->tc);
0245
0246     ts = ns_to_timespec64(ns);
0247     e_dbg("SYSTIM overflow check at %lld.%09lu\n",
0248           (long long) ts.tv_sec, ts.tv_nsec);
0249
0250     schedule_delayed_work(&adapter->systim_overflow_work,
0251                   E1000_SYSTIM_OVERFLOW_PERIOD);
0252 }
0253
0254 static const struct ptp_clock_info e1000e_ptp_clock_info = {
0255     .owner      = THIS_MODULE,
0256     .n_alarm    = 0,
0257     .n_ext_ts   = 0,
0258     .n_per_out  = 0,
0259     .n_pins     = 0,
0260     .pps        = 0,
0261     .adjfine    = e1000e_phc_adjfine,
0262     .adjtime    = e1000e_phc_adjtime,
0263     .gettimex64 = e1000e_phc_gettimex,
0264     .settime64  = e1000e_phc_settime,
0265     .enable     = e1000e_phc_enable,
0266 };
0267
0268 /**
0269  * e1000e_ptp_init - initialize PTP for devices which support it
0270  * @adapter: board private structure
0271  *
0272  * This function performs the required steps for enabling PTP support.
0273  * If PTP support has already been loaded it simply calls the cyclecounter
0274  * init routine and exits.
0275  **/
0276 void e1000e_ptp_init(struct e1000_adapter *adapter)
0277 {
0278     struct e1000_hw *hw = &adapter->hw;
0279
0280     adapter->ptp_clock = NULL;
0281
0282     if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
0283         return;
0284
0285     adapter->ptp_clock_info = e1000e_ptp_clock_info;
0286
0287     snprintf(adapter->ptp_clock_info.name,
0288          sizeof(adapter->ptp_clock_info.name), "%pm",
0289          adapter->netdev->perm_addr);
0290
0291     switch (hw->mac.type) {
0292     case e1000_pch2lan:
0293     case e1000_pch_lpt:
0294     case e1000_pch_spt:
0295     case e1000_pch_cnp:
0296     case e1000_pch_tgp:
0297     case e1000_pch_adp:
0298     case e1000_pch_mtp:
0299     case e1000_pch_lnp:
0300         if ((hw->mac.type < e1000_pch_lpt) ||
0301             (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)) {
0302             adapter->ptp_clock_info.max_adj = 24000000 - 1;
0303             break;
0304         }
0305         fallthrough;
0306     case e1000_82574:
0307     case e1000_82583:
0308         adapter->ptp_clock_info.max_adj = 600000000 - 1;
0309         break;
0310     default:
0311         break;
0312     }
0313
0314 #ifdef CONFIG_E1000E_HWTS
0315     /* CPU must have ART and GBe must be from Sunrise Point or greater */
0316     if (hw->mac.type >= e1000_pch_spt && boot_cpu_has(X86_FEATURE_ART))
0317         adapter->ptp_clock_info.getcrosststamp =
0318             e1000e_phc_getcrosststamp;
0319 #endif/*CONFIG_E1000E_HWTS*/
0320
0321     INIT_DELAYED_WORK(&adapter->systim_overflow_work,
0322               e1000e_systim_overflow_work);
0323
0324     schedule_delayed_work(&adapter->systim_overflow_work,
0325                   E1000_SYSTIM_OVERFLOW_PERIOD);
0326
0327     adapter->ptp_clock = ptp_clock_register(&adapter->ptp_clock_info,
0328                         &adapter->pdev->dev);
0329     if (IS_ERR(adapter->ptp_clock)) {
0330         adapter->ptp_clock = NULL;
0331         e_err("ptp_clock_register failed\n");
0332     } else if (adapter->ptp_clock) {
0333         e_info("registered PHC clock\n");
0334     }
0335 }
0336
0337 /**
0338  * e1000e_ptp_remove - disable PTP device and stop the overflow check
0339  * @adapter: board private structure
0340  *
0341  * Stop the PTP support, and cancel the delayed work.
0342  **/
0343 void e1000e_ptp_remove(struct e1000_adapter *adapter)
0344 {
0345     if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
0346         return;
0347
0348     cancel_delayed_work_sync(&adapter->systim_overflow_work);
0349
0350     if (adapter->ptp_clock) {
0351         ptp_clock_unregister(adapter->ptp_clock);
0352         adapter->ptp_clock = NULL;
0353         e_info("removed PHC\n");
0354     }
0355 }