hisilicon/hns/hns_dsaf_rcb.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * Copyright (c) 2014-2015 Hisilicon Limited.
0004  */
0005
0006 #ifndef _HNS_DSAF_RCB_H
0007 #define _HNS_DSAF_RCB_H
0008
0009 #include <linux/netdevice.h>
0010 #include <linux/platform_device.h>
0011
0012 #include "hnae.h"
0013 #include "hns_dsaf_main.h"
0014
0015 struct rcb_common_cb;
0016
0017 #define HNS_RCB_IRQ_NUM_PER_QUEUE       2
0018 #define HNS_RCB_IRQ_IDX_TX          0
0019 #define HNS_RCB_IRQ_IDX_RX          1
0020 #define HNS_RCB_TX_REG_OFFSET           0x40
0021
0022 #define HNS_RCB_SERVICE_NW_ENGINE_NUM       DSAF_COMM_CHN
0023 #define HNS_RCB_DEBUG_NW_ENGINE_NUM     1
0024 #define HNS_RCB_RING_MAX_BD_PER_PKT     3
0025 #define HNS_RCB_RING_MAX_TXBD_PER_PKT       3
0026 #define HNS_RCBV2_RING_MAX_TXBD_PER_PKT     8
0027 #define HNS_RCB_MAX_PKT_SIZE MAC_MAX_MTU
0028
0029 #define HNS_RCB_RING_MAX_PENDING_BD     1024
0030 #define HNS_RCB_RING_MIN_PENDING_BD     16
0031
0032 #define HNS_RCB_REG_OFFSET          0x10000
0033
0034 #define HNS_RCB_TX_FRAMES_LOW       1
0035 #define HNS_RCB_RX_FRAMES_LOW       1
0036 #define HNS_RCB_TX_FRAMES_HIGH      1023
0037 #define HNS_RCB_RX_FRAMES_HIGH      1023
0038 #define HNS_RCB_TX_USECS_LOW        1
0039 #define HNS_RCB_RX_USECS_LOW        1
0040 #define HNS_RCB_TX_USECS_HIGH       1023
0041 #define HNS_RCB_RX_USECS_HIGH       1023
0042 #define HNS_RCB_MAX_COALESCED_FRAMES        1023
0043 #define HNS_RCB_MIN_COALESCED_FRAMES        1
0044 #define HNS_RCB_DEF_RX_COALESCED_FRAMES     50
0045 #define HNS_RCB_DEF_TX_COALESCED_FRAMES     1
0046 #define HNS_RCB_CLK_FREQ_MHZ            350
0047 #define HNS_RCB_MAX_COALESCED_USECS     0x3ff
0048 #define HNS_RCB_DEF_COALESCED_USECS     30
0049 #define HNS_RCB_DEF_GAP_TIME_USECS      20
0050 #define HNS_RCB_TX_PKTLINE_OFFSET       8
0051
0052 #define HNS_RCB_COMMON_ENDIAN           1
0053
0054 #define HNS_BD_SIZE_512_TYPE            0
0055 #define HNS_BD_SIZE_1024_TYPE           1
0056 #define HNS_BD_SIZE_2048_TYPE           2
0057 #define HNS_BD_SIZE_4096_TYPE           3
0058
0059 #define HNS_RCB_COMMON_DUMP_REG_NUM 80
0060 #define HNS_RCB_RING_DUMP_REG_NUM 40
0061 #define HNS_RING_STATIC_REG_NUM 28
0062
0063 #define HNS_DUMP_REG_NUM            500
0064 #define HNS_STATIC_REG_NUM          12
0065
0066 #define HNS_TSO_MODE_8BD_32K            1
0067 #define HNS_TSO_MDOE_4BD_16K            0
0068
0069 enum rcb_int_flag {
0070     RCB_INT_FLAG_TX = 0x1,
0071     RCB_INT_FLAG_RX = (0x1 << 1),
0072     RCB_INT_FLAG_MAX = (0x1 << 2),  /*must be the last element */
0073 };
0074
0075 struct hns_ring_hw_stats {
0076     u64 tx_pkts;
0077     u64 ppe_tx_ok_pkts;
0078     u64 ppe_tx_drop_pkts;
0079     u64 rx_pkts;
0080     u64 ppe_rx_ok_pkts;
0081     u64 ppe_rx_drop_pkts;
0082 };
0083
0084 struct ring_pair_cb {
0085     struct rcb_common_cb *rcb_common;   /*  ring belongs to */
0086     struct device *dev; /*device for DMA mapping */
0087     struct hnae_queue q;
0088
0089     u16 index;  /* global index in a rcb common device */
0090     u16 buf_size;
0091
0092     int virq[HNS_RCB_IRQ_NUM_PER_QUEUE];
0093
0094     u8 port_id_in_comm;
0095     u8 used_by_vf;
0096
0097     struct hns_ring_hw_stats hw_stats;
0098 };
0099
0100 struct rcb_common_cb {
0101     u8 __iomem *io_base;
0102     phys_addr_t phy_base;
0103     struct dsaf_device *dsaf_dev;
0104     u16 max_vfn;
0105     u16 max_q_per_vf;
0106
0107     u8 comm_index;
0108     u32 ring_num;
0109     u32 desc_num; /*  desc num per queue*/
0110
0111     struct ring_pair_cb ring_pair_cb[];
0112 };
0113
0114 int hns_rcb_buf_size2type(u32 buf_size);
0115
0116 int hns_rcb_common_get_cfg(struct dsaf_device *dsaf_dev, int comm_index);
0117 void hns_rcb_common_free_cfg(struct dsaf_device *dsaf_dev, u32 comm_index);
0118 int hns_rcb_common_init_hw(struct rcb_common_cb *rcb_common);
0119 void hns_rcb_start(struct hnae_queue *q, u32 val);
0120 int hns_rcb_get_cfg(struct rcb_common_cb *rcb_common);
0121 void hns_rcb_get_queue_mode(enum dsaf_mode dsaf_mode,
0122                 u16 *max_vfn, u16 *max_q_per_vf);
0123
0124 void hns_rcb_common_init_commit_hw(struct rcb_common_cb *rcb_common);
0125
0126 void hns_rcb_ring_enable_hw(struct hnae_queue *q, u32 val);
0127 void hns_rcb_int_clr_hw(struct hnae_queue *q, u32 flag);
0128 void hns_rcb_int_ctrl_hw(struct hnae_queue *q, u32 flag, u32 enable);
0129 void hns_rcbv2_int_ctrl_hw(struct hnae_queue *q, u32 flag, u32 mask);
0130 void hns_rcbv2_int_clr_hw(struct hnae_queue *q, u32 flag);
0131
0132 void hns_rcb_init_hw(struct ring_pair_cb *ring);
0133 void hns_rcb_reset_ring_hw(struct hnae_queue *q);
0134 void hns_rcb_wait_fbd_clean(struct hnae_queue **qs, int q_num, u32 flag);
0135 int hns_rcb_wait_tx_ring_clean(struct hnae_queue *qs);
0136 u32 hns_rcb_get_rx_coalesced_frames(
0137     struct rcb_common_cb *rcb_common, u32 port_idx);
0138 u32 hns_rcb_get_tx_coalesced_frames(
0139     struct rcb_common_cb *rcb_common, u32 port_idx);
0140 u32 hns_rcb_get_coalesce_usecs(
0141     struct rcb_common_cb *rcb_common, u32 port_idx);
0142 int hns_rcb_set_coalesce_usecs(
0143     struct rcb_common_cb *rcb_common, u32 port_idx, u32 timeout);
0144 int hns_rcb_set_rx_coalesced_frames(
0145     struct rcb_common_cb *rcb_common, u32 port_idx, u32 coalesced_frames);
0146 int hns_rcb_set_tx_coalesced_frames(
0147     struct rcb_common_cb *rcb_common, u32 port_idx, u32 coalesced_frames);
0148 void hns_rcb_update_stats(struct hnae_queue *queue);
0149
0150 void hns_rcb_get_stats(struct hnae_queue *queue, u64 *data);
0151
0152 void hns_rcb_get_common_regs(struct rcb_common_cb *rcb_common, void *data);
0153
0154 int hns_rcb_get_ring_sset_count(int stringset);
0155 int hns_rcb_get_common_regs_count(void);
0156 int hns_rcb_get_ring_regs_count(void);
0157
0158 void hns_rcb_get_ring_regs(struct hnae_queue *queue, void *data);
0159
0160 void hns_rcb_get_strings(int stringset, u8 *data, int index);
0161 void hns_rcb_set_rx_ring_bs(struct hnae_queue *q, u32 buf_size);
0162 void hns_rcb_set_tx_ring_bs(struct hnae_queue *q, u32 buf_size);
0163
0164 #endif /* _HNS_DSAF_RCB_H */