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0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * Copyright (c) 2014-2015 Hisilicon Limited.
0004  */
0005 
0006 #ifndef __HNAE_H
0007 #define __HNAE_H
0008 
0009 /* Names used in this framework:
0010  *      ae handle (handle):
0011  *        a set of queues provided by AE
0012  *      ring buffer queue (rbq):
0013  *        the channel between upper layer and the AE, can do tx and rx
0014  *      ring:
0015  *        a tx or rx channel within a rbq
0016  *      ring description (desc):
0017  *        an element in the ring with packet information
0018  *      buffer:
0019  *        a memory region referred by desc with the full packet payload
0020  *
0021  * "num" means a static number set as a parameter, "count" mean a dynamic
0022  *   number set while running
0023  * "cb" means control block
0024  */
0025 
0026 #include <linux/acpi.h>
0027 #include <linux/delay.h>
0028 #include <linux/device.h>
0029 #include <linux/module.h>
0030 #include <linux/netdevice.h>
0031 #include <linux/notifier.h>
0032 #include <linux/phy.h>
0033 #include <linux/types.h>
0034 
0035 #define HNAE_DRIVER_VERSION "2.0"
0036 #define HNAE_DRIVER_NAME "hns"
0037 #define HNAE_COPYRIGHT "Copyright(c) 2015 Huawei Corporation."
0038 #define HNAE_DRIVER_STRING "Hisilicon Network Subsystem Driver"
0039 #define HNAE_DEFAULT_DEVICE_DESCR "Hisilicon Network Subsystem"
0040 
0041 #ifdef DEBUG
0042 
0043 #ifndef assert
0044 #define assert(expr) \
0045 do { \
0046     if (!(expr)) { \
0047         pr_err("Assertion failed! %s, %s, %s, line %d\n", \
0048                #expr, __FILE__, __func__, __LINE__); \
0049     } \
0050 } while (0)
0051 #endif
0052 
0053 #else
0054 
0055 #ifndef assert
0056 #define assert(expr)
0057 #endif
0058 
0059 #endif
0060 
0061 #define AE_VERSION_1 ('6' << 16 | '6' << 8 | '0')
0062 #define AE_VERSION_2 ('1' << 24 | '6' << 16 | '1' << 8 | '0')
0063 #define AE_IS_VER1(ver) ((ver) == AE_VERSION_1)
0064 #define AE_NAME_SIZE 16
0065 
0066 #define BD_SIZE_2048_MAX_MTU   6000
0067 
0068 /* some said the RX and TX RCB format should not be the same in the future. But
0069  * it is the same now...
0070  */
0071 #define RCB_REG_BASEADDR_L         0x00 /* P660 support only 32bit accessing */
0072 #define RCB_REG_BASEADDR_H         0x04
0073 #define RCB_REG_BD_NUM             0x08
0074 #define RCB_REG_BD_LEN             0x0C
0075 #define RCB_REG_PKTLINE            0x10
0076 #define RCB_REG_TAIL               0x18
0077 #define RCB_REG_HEAD               0x1C
0078 #define RCB_REG_FBDNUM             0x20
0079 #define RCB_REG_OFFSET             0x24 /* pkt num to be handled */
0080 #define RCB_REG_PKTNUM_RECORD      0x2C /* total pkt received */
0081 
0082 #define HNS_RX_HEAD_SIZE 256
0083 
0084 #define HNAE_AE_REGISTER 0x1
0085 
0086 #define RCB_RING_NAME_LEN (IFNAMSIZ + 4)
0087 
0088 #define HNAE_LOWEST_LATENCY_COAL_PARAM  30
0089 #define HNAE_LOW_LATENCY_COAL_PARAM 80
0090 #define HNAE_BULK_LATENCY_COAL_PARAM    150
0091 
0092 enum hnae_led_state {
0093     HNAE_LED_INACTIVE,
0094     HNAE_LED_ACTIVE,
0095     HNAE_LED_ON,
0096     HNAE_LED_OFF
0097 };
0098 
0099 #define HNS_RX_FLAG_VLAN_PRESENT 0x1
0100 #define HNS_RX_FLAG_L3ID_IPV4 0x0
0101 #define HNS_RX_FLAG_L3ID_IPV6 0x1
0102 #define HNS_RX_FLAG_L4ID_UDP 0x0
0103 #define HNS_RX_FLAG_L4ID_TCP 0x1
0104 #define HNS_RX_FLAG_L4ID_SCTP 0x3
0105 
0106 #define HNS_TXD_ASID_S 0
0107 #define HNS_TXD_ASID_M (0xff << HNS_TXD_ASID_S)
0108 #define HNS_TXD_BUFNUM_S 8
0109 #define HNS_TXD_BUFNUM_M (0x3 << HNS_TXD_BUFNUM_S)
0110 #define HNS_TXD_PORTID_S 10
0111 #define HNS_TXD_PORTID_M (0x7 << HNS_TXD_PORTID_S)
0112 
0113 #define HNS_TXD_RA_B 8
0114 #define HNS_TXD_RI_B 9
0115 #define HNS_TXD_L4CS_B 10
0116 #define HNS_TXD_L3CS_B 11
0117 #define HNS_TXD_FE_B 12
0118 #define HNS_TXD_VLD_B 13
0119 #define HNS_TXD_IPOFFSET_S 14
0120 #define HNS_TXD_IPOFFSET_M (0xff << HNS_TXD_IPOFFSET_S)
0121 
0122 #define HNS_RXD_IPOFFSET_S 0
0123 #define HNS_RXD_IPOFFSET_M (0xff << HNS_TXD_IPOFFSET_S)
0124 #define HNS_RXD_BUFNUM_S 8
0125 #define HNS_RXD_BUFNUM_M (0x3 << HNS_RXD_BUFNUM_S)
0126 #define HNS_RXD_PORTID_S 10
0127 #define HNS_RXD_PORTID_M (0x7 << HNS_RXD_PORTID_S)
0128 #define HNS_RXD_DMAC_S 13
0129 #define HNS_RXD_DMAC_M (0x3 << HNS_RXD_DMAC_S)
0130 #define HNS_RXD_VLAN_S 15
0131 #define HNS_RXD_VLAN_M (0x3 << HNS_RXD_VLAN_S)
0132 #define HNS_RXD_L3ID_S 17
0133 #define HNS_RXD_L3ID_M (0xf << HNS_RXD_L3ID_S)
0134 #define HNS_RXD_L4ID_S 21
0135 #define HNS_RXD_L4ID_M (0xf << HNS_RXD_L4ID_S)
0136 #define HNS_RXD_FE_B 25
0137 #define HNS_RXD_FRAG_B 26
0138 #define HNS_RXD_VLD_B 27
0139 #define HNS_RXD_L2E_B 28
0140 #define HNS_RXD_L3E_B 29
0141 #define HNS_RXD_L4E_B 30
0142 #define HNS_RXD_DROP_B 31
0143 
0144 #define HNS_RXD_VLANID_S 8
0145 #define HNS_RXD_VLANID_M (0xfff << HNS_RXD_VLANID_S)
0146 #define HNS_RXD_CFI_B 20
0147 #define HNS_RXD_PRI_S 21
0148 #define HNS_RXD_PRI_M (0x7 << HNS_RXD_PRI_S)
0149 #define HNS_RXD_ASID_S 24
0150 #define HNS_RXD_ASID_M (0xff << HNS_RXD_ASID_S)
0151 
0152 #define HNSV2_TXD_BUFNUM_S 0
0153 #define HNSV2_TXD_BUFNUM_M (0x7 << HNSV2_TXD_BUFNUM_S)
0154 #define HNSV2_TXD_PORTID_S  4
0155 #define HNSV2_TXD_PORTID_M  (0X7 << HNSV2_TXD_PORTID_S)
0156 #define HNSV2_TXD_RI_B   1
0157 #define HNSV2_TXD_L4CS_B   2
0158 #define HNSV2_TXD_L3CS_B   3
0159 #define HNSV2_TXD_FE_B   4
0160 #define HNSV2_TXD_VLD_B  5
0161 
0162 #define HNSV2_TXD_TSE_B   0
0163 #define HNSV2_TXD_VLAN_EN_B   1
0164 #define HNSV2_TXD_SNAP_B   2
0165 #define HNSV2_TXD_IPV6_B   3
0166 #define HNSV2_TXD_SCTP_B   4
0167 
0168 /* hardware spec ring buffer format */
0169 struct __packed hnae_desc {
0170     __le64 addr;
0171     union {
0172         struct {
0173             union {
0174                 __le16 asid_bufnum_pid;
0175                 __le16 asid;
0176             };
0177             __le16 send_size;
0178             union {
0179                 __le32 flag_ipoffset;
0180                 struct {
0181                     __u8 bn_pid;
0182                     __u8 ra_ri_cs_fe_vld;
0183                     __u8 ip_offset;
0184                     __u8 tse_vlan_snap_v6_sctp_nth;
0185                 };
0186             };
0187             __le16 mss;
0188             __u8 l4_len;
0189             __u8 reserved1;
0190             __le16 paylen;
0191             __u8 vmid;
0192             __u8 qid;
0193             __le32 reserved2[2];
0194         } tx;
0195 
0196         struct {
0197             __le32 ipoff_bnum_pid_flag;
0198             __le16 pkt_len;
0199             __le16 size;
0200             union {
0201                 __le32 vlan_pri_asid;
0202                 struct {
0203                     __le16 asid;
0204                     __le16 vlan_cfi_pri;
0205                 };
0206             };
0207             __le32 rss_hash;
0208             __le32 reserved_1[2];
0209         } rx;
0210     };
0211 };
0212 
0213 struct hnae_desc_cb {
0214     dma_addr_t dma; /* dma address of this desc */
0215     void *buf;      /* cpu addr for a desc */
0216 
0217     /* priv data for the desc, e.g. skb when use with ip stack*/
0218     void *priv;
0219     u32 page_offset;
0220     u32 length;     /* length of the buffer */
0221 
0222     u16 reuse_flag;
0223 
0224        /* desc type, used by the ring user to mark the type of the priv data */
0225     u16 type;
0226 };
0227 
0228 #define setflags(flags, bits) ((flags) |= (bits))
0229 #define unsetflags(flags, bits) ((flags) &= ~(bits))
0230 
0231 /* hnae_ring->flags fields */
0232 #define RINGF_DIR 0x1       /* TX or RX ring, set if TX */
0233 #define is_tx_ring(ring) ((ring)->flags & RINGF_DIR)
0234 #define is_rx_ring(ring) (!is_tx_ring(ring))
0235 #define ring_to_dma_dir(ring) (is_tx_ring(ring) ? \
0236     DMA_TO_DEVICE : DMA_FROM_DEVICE)
0237 
0238 struct ring_stats {
0239     u64 io_err_cnt;
0240     u64 sw_err_cnt;
0241     u64 seg_pkt_cnt;
0242     union {
0243         struct {
0244             u64 tx_pkts;
0245             u64 tx_bytes;
0246             u64 tx_err_cnt;
0247             u64 restart_queue;
0248             u64 tx_busy;
0249         };
0250         struct {
0251             u64 rx_pkts;
0252             u64 rx_bytes;
0253             u64 rx_err_cnt;
0254             u64 reuse_pg_cnt;
0255             u64 err_pkt_len;
0256             u64 non_vld_descs;
0257             u64 err_bd_num;
0258             u64 l2_err;
0259             u64 l3l4_csum_err;
0260         };
0261     };
0262 };
0263 
0264 struct hnae_queue;
0265 
0266 struct hnae_ring {
0267     u8 __iomem *io_base; /* base io address for the ring */
0268     struct hnae_desc *desc; /* dma map address space */
0269     struct hnae_desc_cb *desc_cb;
0270     struct hnae_queue *q;
0271     int irq;
0272     char ring_name[RCB_RING_NAME_LEN];
0273 
0274     /* statistic */
0275     struct ring_stats stats;
0276 
0277     dma_addr_t desc_dma_addr;
0278     u32 buf_size;       /* size for hnae_desc->addr, preset by AE */
0279     u16 desc_num;       /* total number of desc */
0280     u16 max_desc_num_per_pkt;
0281     u16 max_raw_data_sz_per_desc;
0282     u16 max_pkt_size;
0283     int next_to_use;    /* idx of next spare desc */
0284 
0285     /* idx of lastest sent desc, the ring is empty when equal to
0286      * next_to_use
0287      */
0288     int next_to_clean;
0289 
0290     int flags;          /* ring attribute */
0291     int irq_init_flag;
0292 
0293     /* total rx bytes after last rx rate calucated */
0294     u64 coal_last_rx_bytes;
0295     unsigned long coal_last_jiffies;
0296     u32 coal_param;
0297     u32 coal_rx_rate;   /* rx rate in MB */
0298 };
0299 
0300 #define ring_ptr_move_fw(ring, p) \
0301     ((ring)->p = ((ring)->p + 1) % (ring)->desc_num)
0302 #define ring_ptr_move_bw(ring, p) \
0303     ((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num)
0304 
0305 enum hns_desc_type {
0306     DESC_TYPE_SKB,
0307     DESC_TYPE_PAGE,
0308 };
0309 
0310 #define assert_is_ring_idx(ring, idx) \
0311     assert((idx) >= 0 && (idx) < (ring)->desc_num)
0312 
0313 /* the distance between [begin, end) in a ring buffer
0314  * note: there is a unuse slot between the begin and the end
0315  */
0316 static inline int ring_dist(struct hnae_ring *ring, int begin, int end)
0317 {
0318     assert_is_ring_idx(ring, begin);
0319     assert_is_ring_idx(ring, end);
0320 
0321     return (end - begin + ring->desc_num) % ring->desc_num;
0322 }
0323 
0324 static inline int ring_space(struct hnae_ring *ring)
0325 {
0326     return ring->desc_num -
0327         ring_dist(ring, ring->next_to_clean, ring->next_to_use) - 1;
0328 }
0329 
0330 static inline int is_ring_empty(struct hnae_ring *ring)
0331 {
0332     assert_is_ring_idx(ring, ring->next_to_use);
0333     assert_is_ring_idx(ring, ring->next_to_clean);
0334 
0335     return ring->next_to_use == ring->next_to_clean;
0336 }
0337 
0338 #define hnae_buf_size(_ring) ((_ring)->buf_size)
0339 #define hnae_page_order(_ring) (get_order(hnae_buf_size(_ring)))
0340 #define hnae_page_size(_ring) (PAGE_SIZE << hnae_page_order(_ring))
0341 
0342 struct hnae_handle;
0343 
0344 /* allocate and dma map space for hnae desc */
0345 struct hnae_buf_ops {
0346     int (*alloc_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb);
0347     void (*free_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb);
0348     int (*map_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb);
0349     void (*unmap_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb);
0350 };
0351 
0352 struct hnae_queue {
0353     u8 __iomem *io_base;
0354     phys_addr_t phy_base;
0355     struct hnae_ae_dev *dev;    /* the device who use this queue */
0356     struct hnae_ring rx_ring ____cacheline_internodealigned_in_smp;
0357     struct hnae_ring tx_ring ____cacheline_internodealigned_in_smp;
0358     struct hnae_handle *handle;
0359 };
0360 
0361 /*hnae loop mode*/
0362 enum hnae_loop {
0363     MAC_INTERNALLOOP_MAC = 0,
0364     MAC_INTERNALLOOP_SERDES,
0365     MAC_INTERNALLOOP_PHY,
0366     MAC_LOOP_PHY_NONE,
0367     MAC_LOOP_NONE,
0368 };
0369 
0370 /*hnae port type*/
0371 enum hnae_port_type {
0372     HNAE_PORT_SERVICE = 0,
0373     HNAE_PORT_DEBUG
0374 };
0375 
0376 /* mac media type */
0377 enum hnae_media_type {
0378     HNAE_MEDIA_TYPE_UNKNOWN = 0,
0379     HNAE_MEDIA_TYPE_FIBER,
0380     HNAE_MEDIA_TYPE_COPPER,
0381     HNAE_MEDIA_TYPE_BACKPLANE,
0382 };
0383 
0384 /* This struct defines the operation on the handle.
0385  *
0386  * get_handle(): (mandatory)
0387  *   Get a handle from AE according to its name and options.
0388  *   the AE driver should manage the space used by handle and its queues while
0389  *   the HNAE framework will allocate desc and desc_cb for all rings in the
0390  *   queues.
0391  * put_handle():
0392  *   Release the handle.
0393  * start():
0394  *   Enable the hardware, include all queues
0395  * stop():
0396  *   Disable the hardware
0397  * set_opts(): (mandatory)
0398  *   Set options to the AE
0399  * get_opts(): (mandatory)
0400  *   Get options from the AE
0401  * get_status():
0402  *   Get the carrier state of the back channel of the handle, 1 for ok, 0 for
0403  *   non-ok
0404  * toggle_ring_irq(): (mandatory)
0405  *   Set the ring irq to be enabled(0) or disable(1)
0406  * toggle_queue_status(): (mandatory)
0407  *   Set the queue to be enabled(1) or disable(0), this will not change the
0408  *   ring irq state
0409  * adjust_link()
0410  *   adjust link status
0411  * set_loopback()
0412  *   set loopback
0413  * get_ring_bdnum_limit()
0414  *   get ring bd number limit
0415  * get_pauseparam()
0416  *   get tx and rx of pause frame use
0417  * set_pauseparam()
0418  *   set tx and rx of pause frame use
0419  * get_coalesce_usecs()
0420  *   get usecs to delay a TX interrupt after a packet is sent
0421  * get_rx_max_coalesced_frames()
0422  *   get Maximum number of packets to be sent before a TX interrupt.
0423  * set_coalesce_usecs()
0424  *   set usecs to delay a TX interrupt after a packet is sent
0425  * set_coalesce_frames()
0426  *   set Maximum number of packets to be sent before a TX interrupt.
0427  * get_ringnum()
0428  *   get RX/TX ring number
0429  * get_max_ringnum()
0430  *   get RX/TX ring maximum number
0431  * get_mac_addr()
0432  *   get mac address
0433  * set_mac_addr()
0434  *   set mac address
0435  * clr_mc_addr()
0436  *   clear mcast tcam table
0437  * set_mc_addr()
0438  *   set multicast mode
0439  * add_uc_addr()
0440  *   add ucast address
0441  * rm_uc_addr()
0442  *   remove ucast address
0443  * set_mtu()
0444  *   set mtu
0445  * update_stats()
0446  *   update Old network device statistics
0447  * get_ethtool_stats()
0448  *   get ethtool network device statistics
0449  * get_strings()
0450  *   get a set of strings that describe the requested objects
0451  * get_sset_count()
0452  *   get number of strings that @get_strings will write
0453  * update_led_status()
0454  *   update the led status
0455  * set_led_id()
0456  *   set led id
0457  * get_regs()
0458  *   get regs dump
0459  * get_regs_len()
0460  *   get the len of the regs dump
0461  */
0462 struct hnae_ae_ops {
0463     struct hnae_handle *(*get_handle)(struct hnae_ae_dev *dev,
0464                       u32 port_id);
0465     void (*put_handle)(struct hnae_handle *handle);
0466     void (*init_queue)(struct hnae_queue *q);
0467     void (*fini_queue)(struct hnae_queue *q);
0468     int (*start)(struct hnae_handle *handle);
0469     void (*stop)(struct hnae_handle *handle);
0470     void (*reset)(struct hnae_handle *handle);
0471     int (*set_opts)(struct hnae_handle *handle, int type, void *opts);
0472     int (*get_opts)(struct hnae_handle *handle, int type, void **opts);
0473     int (*get_status)(struct hnae_handle *handle);
0474     int (*get_info)(struct hnae_handle *handle,
0475             u8 *auto_neg, u16 *speed, u8 *duplex);
0476     void (*toggle_ring_irq)(struct hnae_ring *ring, u32 val);
0477     void (*adjust_link)(struct hnae_handle *handle, int speed, int duplex);
0478     bool (*need_adjust_link)(struct hnae_handle *handle,
0479                  int speed, int duplex);
0480     int (*set_loopback)(struct hnae_handle *handle,
0481                 enum hnae_loop loop_mode, int en);
0482     void (*get_ring_bdnum_limit)(struct hnae_queue *queue,
0483                      u32 *uplimit);
0484     void (*get_pauseparam)(struct hnae_handle *handle,
0485                    u32 *auto_neg, u32 *rx_en, u32 *tx_en);
0486     int (*set_pauseparam)(struct hnae_handle *handle,
0487                   u32 auto_neg, u32 rx_en, u32 tx_en);
0488     void (*get_coalesce_usecs)(struct hnae_handle *handle,
0489                    u32 *tx_usecs, u32 *rx_usecs);
0490     void (*get_max_coalesced_frames)(struct hnae_handle *handle,
0491                      u32 *tx_frames, u32 *rx_frames);
0492     int (*set_coalesce_usecs)(struct hnae_handle *handle, u32 timeout);
0493     int (*set_coalesce_frames)(struct hnae_handle *handle,
0494                    u32 tx_frames, u32 rx_frames);
0495     void (*get_coalesce_range)(struct hnae_handle *handle,
0496                    u32 *tx_frames_low, u32 *rx_frames_low,
0497                    u32 *tx_frames_high, u32 *rx_frames_high,
0498                    u32 *tx_usecs_low, u32 *rx_usecs_low,
0499                    u32 *tx_usecs_high, u32 *rx_usecs_high);
0500     void (*set_promisc_mode)(struct hnae_handle *handle, u32 en);
0501     int (*get_mac_addr)(struct hnae_handle *handle, void **p);
0502     int (*set_mac_addr)(struct hnae_handle *handle, const void *p);
0503     int (*add_uc_addr)(struct hnae_handle *handle,
0504                const unsigned char *addr);
0505     int (*rm_uc_addr)(struct hnae_handle *handle,
0506               const unsigned char *addr);
0507     int (*clr_mc_addr)(struct hnae_handle *handle);
0508     int (*set_mc_addr)(struct hnae_handle *handle, void *addr);
0509     int (*set_mtu)(struct hnae_handle *handle, int new_mtu);
0510     void (*set_tso_stats)(struct hnae_handle *handle, int enable);
0511     void (*update_stats)(struct hnae_handle *handle,
0512                  struct net_device_stats *net_stats);
0513     void (*get_stats)(struct hnae_handle *handle, u64 *data);
0514     void (*get_strings)(struct hnae_handle *handle,
0515                 u32 stringset, u8 *data);
0516     int (*get_sset_count)(struct hnae_handle *handle, int stringset);
0517     void (*update_led_status)(struct hnae_handle *handle);
0518     int (*set_led_id)(struct hnae_handle *handle,
0519               enum hnae_led_state status);
0520     void (*get_regs)(struct hnae_handle *handle, void *data);
0521     int (*get_regs_len)(struct hnae_handle *handle);
0522     u32 (*get_rss_key_size)(struct hnae_handle *handle);
0523     u32 (*get_rss_indir_size)(struct hnae_handle *handle);
0524     int (*get_rss)(struct hnae_handle *handle, u32 *indir, u8 *key,
0525                u8 *hfunc);
0526     int (*set_rss)(struct hnae_handle *handle, const u32 *indir,
0527                const u8 *key, const u8 hfunc);
0528 };
0529 
0530 struct hnae_ae_dev {
0531     struct device cls_dev; /* the class dev */
0532     struct device *dev; /* the presented dev */
0533     struct hnae_ae_ops *ops;
0534     struct list_head node;
0535     struct module *owner; /* the module who provides this dev */
0536     int id;
0537     char name[AE_NAME_SIZE];
0538     struct list_head handle_list;
0539     spinlock_t lock; /* lock to protect the handle_list */
0540 };
0541 
0542 struct hnae_handle {
0543     struct device *owner_dev; /* the device which make use of this handle */
0544     struct hnae_ae_dev *dev;  /* the device who provides this handle */
0545     struct phy_device *phy_dev;
0546     phy_interface_t phy_if;
0547     u32 if_support;
0548     int q_num;
0549     int vf_id;
0550     unsigned long coal_last_jiffies;
0551     u32 coal_param;     /* self adapt coalesce param */
0552     /* the ring index of last ring that set coal param */
0553     u32 coal_ring_idx;
0554     u32 eport_id;
0555     u32 dport_id;   /* v2 tx bd should fill the dport_id */
0556     bool coal_adapt_en;
0557     enum hnae_port_type port_type;
0558     enum hnae_media_type media_type;
0559     struct list_head node;    /* list to hnae_ae_dev->handle_list */
0560     struct hnae_buf_ops *bops; /* operation for the buffer */
0561     struct hnae_queue *qs[];  /* flexible array of all queues */
0562 };
0563 
0564 #define ring_to_dev(ring) ((ring)->q->dev->dev)
0565 
0566 struct hnae_handle *hnae_get_handle(struct device *owner_dev,
0567                     const struct fwnode_handle  *fwnode,
0568                     u32 port_id,
0569                     struct hnae_buf_ops *bops);
0570 
0571 void hnae_put_handle(struct hnae_handle *handle);
0572 int hnae_ae_register(struct hnae_ae_dev *dev, struct module *owner);
0573 void hnae_ae_unregister(struct hnae_ae_dev *dev);
0574 
0575 int hnae_register_notifier(struct notifier_block *nb);
0576 void hnae_unregister_notifier(struct notifier_block *nb);
0577 int hnae_reinit_handle(struct hnae_handle *handle);
0578 
0579 #define hnae_queue_xmit(q, buf_num) writel_relaxed(buf_num, \
0580     (q)->tx_ring.io_base + RCB_REG_TAIL)
0581 
0582 #ifndef assert
0583 #define assert(cond)
0584 #endif
0585 
0586 static inline int hnae_reserve_buffer_map(struct hnae_ring *ring,
0587                       struct hnae_desc_cb *cb)
0588 {
0589     struct hnae_buf_ops *bops = ring->q->handle->bops;
0590     int ret;
0591 
0592     ret = bops->alloc_buffer(ring, cb);
0593     if (ret)
0594         goto out;
0595 
0596     ret = bops->map_buffer(ring, cb);
0597     if (ret)
0598         goto out_with_buf;
0599 
0600     return 0;
0601 
0602 out_with_buf:
0603     bops->free_buffer(ring, cb);
0604 out:
0605     return ret;
0606 }
0607 
0608 static inline int hnae_alloc_buffer_attach(struct hnae_ring *ring, int i)
0609 {
0610     int ret = hnae_reserve_buffer_map(ring, &ring->desc_cb[i]);
0611 
0612     if (ret)
0613         return ret;
0614 
0615     ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
0616 
0617     return 0;
0618 }
0619 
0620 static inline void hnae_buffer_detach(struct hnae_ring *ring, int i)
0621 {
0622     ring->q->handle->bops->unmap_buffer(ring, &ring->desc_cb[i]);
0623     ring->desc[i].addr = 0;
0624 }
0625 
0626 static inline void hnae_free_buffer_detach(struct hnae_ring *ring, int i)
0627 {
0628     struct hnae_buf_ops *bops = ring->q->handle->bops;
0629     struct hnae_desc_cb *cb = &ring->desc_cb[i];
0630 
0631     if (!ring->desc_cb[i].dma)
0632         return;
0633 
0634     hnae_buffer_detach(ring, i);
0635     bops->free_buffer(ring, cb);
0636 }
0637 
0638 /* detach a in-used buffer and replace with a reserved one  */
0639 static inline void hnae_replace_buffer(struct hnae_ring *ring, int i,
0640                        struct hnae_desc_cb *res_cb)
0641 {
0642     struct hnae_buf_ops *bops = ring->q->handle->bops;
0643 
0644     bops->unmap_buffer(ring, &ring->desc_cb[i]);
0645     ring->desc_cb[i] = *res_cb;
0646     ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
0647     ring->desc[i].rx.ipoff_bnum_pid_flag = 0;
0648 }
0649 
0650 static inline void hnae_reuse_buffer(struct hnae_ring *ring, int i)
0651 {
0652     ring->desc_cb[i].reuse_flag = 0;
0653     ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma
0654         + ring->desc_cb[i].page_offset);
0655     ring->desc[i].rx.ipoff_bnum_pid_flag = 0;
0656 }
0657 
0658 /* when reinit buffer size, we should reinit buffer description */
0659 static inline void hnae_reinit_all_ring_desc(struct hnae_handle *h)
0660 {
0661     int i, j;
0662     struct hnae_ring *ring;
0663 
0664     for (i = 0; i < h->q_num; i++) {
0665         ring = &h->qs[i]->rx_ring;
0666         for (j = 0; j < ring->desc_num; j++)
0667             ring->desc[j].addr = cpu_to_le64(ring->desc_cb[j].dma);
0668     }
0669 
0670     wmb();  /* commit all data before submit */
0671 }
0672 
0673 /* when reinit buffer size, we should reinit page offset */
0674 static inline void hnae_reinit_all_ring_page_off(struct hnae_handle *h)
0675 {
0676     int i, j;
0677     struct hnae_ring *ring;
0678 
0679     for (i = 0; i < h->q_num; i++) {
0680         ring = &h->qs[i]->rx_ring;
0681         for (j = 0; j < ring->desc_num; j++) {
0682             ring->desc_cb[j].page_offset = 0;
0683             if (ring->desc[j].addr !=
0684                 cpu_to_le64(ring->desc_cb[j].dma))
0685                 ring->desc[j].addr =
0686                     cpu_to_le64(ring->desc_cb[j].dma);
0687         }
0688     }
0689 
0690     wmb();  /* commit all data before submit */
0691 }
0692 
0693 #define hnae_set_field(origin, mask, shift, val) \
0694     do { \
0695         (origin) &= (~(mask)); \
0696         (origin) |= ((val) << (shift)) & (mask); \
0697     } while (0)
0698 
0699 #define hnae_set_bit(origin, shift, val) \
0700     hnae_set_field((origin), (0x1 << (shift)), (shift), (val))
0701 
0702 #define hnae_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift))
0703 
0704 #define hnae_get_bit(origin, shift) \
0705     hnae_get_field((origin), (0x1 << (shift)), (shift))
0706 
0707 #endif