google/gve/gve_desc_dqo.h

0001 /* SPDX-License-Identifier: (GPL-2.0 OR MIT)
0002  * Google virtual Ethernet (gve) driver
0003  *
0004  * Copyright (C) 2015-2021 Google, Inc.
0005  */
0006
0007 /* GVE DQO Descriptor formats */
0008
0009 #ifndef _GVE_DESC_DQO_H_
0010 #define _GVE_DESC_DQO_H_
0011
0012 #include <linux/build_bug.h>
0013
0014 #define GVE_TX_MAX_HDR_SIZE_DQO 255
0015 #define GVE_TX_MIN_TSO_MSS_DQO 88
0016
0017 #ifndef __LITTLE_ENDIAN_BITFIELD
0018 #error "Only little endian supported"
0019 #endif
0020
0021 /* Basic TX descriptor (DTYPE 0x0C) */
0022 struct gve_tx_pkt_desc_dqo {
0023     __le64 buf_addr;
0024
0025     /* Must be GVE_TX_PKT_DESC_DTYPE_DQO (0xc) */
0026     u8 dtype: 5;
0027
0028     /* Denotes the last descriptor of a packet. */
0029     u8 end_of_packet: 1;
0030     u8 checksum_offload_enable: 1;
0031
0032     /* If set, will generate a descriptor completion for this descriptor. */
0033     u8 report_event: 1;
0034     u8 reserved0;
0035     __le16 reserved1;
0036
0037     /* The TX completion associated with this packet will contain this tag.
0038      */
0039     __le16 compl_tag;
0040     u16 buf_size: 14;
0041     u16 reserved2: 2;
0042 } __packed;
0043 static_assert(sizeof(struct gve_tx_pkt_desc_dqo) == 16);
0044
0045 #define GVE_TX_PKT_DESC_DTYPE_DQO 0xc
0046 #define GVE_TX_MAX_BUF_SIZE_DQO ((16 * 1024) - 1)
0047
0048 /* Maximum number of data descriptors allowed per packet, or per-TSO segment. */
0049 #define GVE_TX_MAX_DATA_DESCS 10
0050
0051 /* Min gap between tail and head to avoid cacheline overlap */
0052 #define GVE_TX_MIN_DESC_PREVENT_CACHE_OVERLAP 4
0053
0054 /* "report_event" on TX packet descriptors may only be reported on the last
0055  * descriptor of a TX packet, and they must be spaced apart with at least this
0056  * value.
0057  */
0058 #define GVE_TX_MIN_RE_INTERVAL 32
0059
0060 struct gve_tx_context_cmd_dtype {
0061     u8 dtype: 5;
0062     u8 tso: 1;
0063     u8 reserved1: 2;
0064
0065     u8 reserved2;
0066 };
0067
0068 static_assert(sizeof(struct gve_tx_context_cmd_dtype) == 2);
0069
0070 /* TX Native TSO Context DTYPE (0x05)
0071  *
0072  * "flex" fields allow the driver to send additional packet context to HW.
0073  */
0074 struct gve_tx_tso_context_desc_dqo {
0075     /* The L4 payload bytes that should be segmented. */
0076     u32 tso_total_len: 24;
0077     u32 flex10: 8;
0078
0079     /* Max segment size in TSO excluding headers. */
0080     u16 mss: 14;
0081     u16 reserved: 2;
0082
0083     u8 header_len; /* Header length to use for TSO offload */
0084     u8 flex11;
0085     struct gve_tx_context_cmd_dtype cmd_dtype;
0086     u8 flex0;
0087     u8 flex5;
0088     u8 flex6;
0089     u8 flex7;
0090     u8 flex8;
0091     u8 flex9;
0092 } __packed;
0093 static_assert(sizeof(struct gve_tx_tso_context_desc_dqo) == 16);
0094
0095 #define GVE_TX_TSO_CTX_DESC_DTYPE_DQO 0x5
0096
0097 /* General context descriptor for sending metadata. */
0098 struct gve_tx_general_context_desc_dqo {
0099     u8 flex4;
0100     u8 flex5;
0101     u8 flex6;
0102     u8 flex7;
0103     u8 flex8;
0104     u8 flex9;
0105     u8 flex10;
0106     u8 flex11;
0107     struct gve_tx_context_cmd_dtype cmd_dtype;
0108     u16 reserved;
0109     u8 flex0;
0110     u8 flex1;
0111     u8 flex2;
0112     u8 flex3;
0113 } __packed;
0114 static_assert(sizeof(struct gve_tx_general_context_desc_dqo) == 16);
0115
0116 #define GVE_TX_GENERAL_CTX_DESC_DTYPE_DQO 0x4
0117
0118 /* Logical structure of metadata which is packed into context descriptor flex
0119  * fields.
0120  */
0121 struct gve_tx_metadata_dqo {
0122     union {
0123         struct {
0124             u8 version;
0125
0126             /* If `skb->l4_hash` is set, this value should be
0127              * derived from `skb->hash`.
0128              *
0129              * A zero value means no l4_hash was associated with the
0130              * skb.
0131              */
0132             u16 path_hash: 15;
0133
0134             /* Should be set to 1 if the flow associated with the
0135              * skb had a rehash from the TCP stack.
0136              */
0137             u16 rehash_event: 1;
0138         }  __packed;
0139         u8 bytes[12];
0140     };
0141 }  __packed;
0142 static_assert(sizeof(struct gve_tx_metadata_dqo) == 12);
0143
0144 #define GVE_TX_METADATA_VERSION_DQO 0
0145
0146 /* TX completion descriptor */
0147 struct gve_tx_compl_desc {
0148     /* For types 0-4 this is the TX queue ID associated with this
0149      * completion.
0150      */
0151     u16 id: 11;
0152
0153     /* See: GVE_COMPL_TYPE_DQO* */
0154     u16 type: 3;
0155     u16 reserved0: 1;
0156
0157     /* Flipped by HW to notify the descriptor is populated. */
0158     u16 generation: 1;
0159     union {
0160         /* For descriptor completions, this is the last index fetched
0161          * by HW + 1.
0162          */
0163         __le16 tx_head;
0164
0165         /* For packet completions, this is the completion tag set on the
0166          * TX packet descriptors.
0167          */
0168         __le16 completion_tag;
0169     };
0170     __le32 reserved1;
0171 } __packed;
0172 static_assert(sizeof(struct gve_tx_compl_desc) == 8);
0173
0174 #define GVE_COMPL_TYPE_DQO_PKT 0x2 /* Packet completion */
0175 #define GVE_COMPL_TYPE_DQO_DESC 0x4 /* Descriptor completion */
0176 #define GVE_COMPL_TYPE_DQO_MISS 0x1 /* Miss path completion */
0177 #define GVE_COMPL_TYPE_DQO_REINJECTION 0x3 /* Re-injection completion */
0178
0179 /* Descriptor to post buffers to HW on buffer queue. */
0180 struct gve_rx_desc_dqo {
0181     __le16 buf_id; /* ID returned in Rx completion descriptor */
0182     __le16 reserved0;
0183     __le32 reserved1;
0184     __le64 buf_addr; /* DMA address of the buffer */
0185     __le64 header_buf_addr;
0186     __le64 reserved2;
0187 } __packed;
0188 static_assert(sizeof(struct gve_rx_desc_dqo) == 32);
0189
0190 /* Descriptor for HW to notify SW of new packets received on RX queue. */
0191 struct gve_rx_compl_desc_dqo {
0192     /* Must be 1 */
0193     u8 rxdid: 4;
0194     u8 reserved0: 4;
0195
0196     /* Packet originated from this system rather than the network. */
0197     u8 loopback: 1;
0198     /* Set when IPv6 packet contains a destination options header or routing
0199      * header.
0200      */
0201     u8 ipv6_ex_add: 1;
0202     /* Invalid packet was received. */
0203     u8 rx_error: 1;
0204     u8 reserved1: 5;
0205
0206     u16 packet_type: 10;
0207     u16 ip_hdr_err: 1;
0208     u16 udp_len_err: 1;
0209     u16 raw_cs_invalid: 1;
0210     u16 reserved2: 3;
0211
0212     u16 packet_len: 14;
0213     /* Flipped by HW to notify the descriptor is populated. */
0214     u16 generation: 1;
0215     /* Should be zero. */
0216     u16 buffer_queue_id: 1;
0217
0218     u16 header_len: 10;
0219     u16 rsc: 1;
0220     u16 split_header: 1;
0221     u16 reserved3: 4;
0222
0223     u8 descriptor_done: 1;
0224     u8 end_of_packet: 1;
0225     u8 header_buffer_overflow: 1;
0226     u8 l3_l4_processed: 1;
0227     u8 csum_ip_err: 1;
0228     u8 csum_l4_err: 1;
0229     u8 csum_external_ip_err: 1;
0230     u8 csum_external_udp_err: 1;
0231
0232     u8 status_error1;
0233
0234     __le16 reserved5;
0235     __le16 buf_id; /* Buffer ID which was sent on the buffer queue. */
0236
0237     union {
0238         /* Packet checksum. */
0239         __le16 raw_cs;
0240         /* Segment length for RSC packets. */
0241         __le16 rsc_seg_len;
0242     };
0243     __le32 hash;
0244     __le32 reserved6;
0245     __le64 reserved7;
0246 } __packed;
0247
0248 static_assert(sizeof(struct gve_rx_compl_desc_dqo) == 32);
0249
0250 /* Ringing the doorbell too often can hurt performance.
0251  *
0252  * HW requires this value to be at least 8.
0253  */
0254 #define GVE_RX_BUF_THRESH_DQO 32
0255
0256 #endif /* _GVE_DESC_DQO_H_ */