freescale/fs_enet/fec.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef FS_ENET_FEC_H
0003 #define FS_ENET_FEC_H
0004
0005 #define FEC_MAX_MULTICAST_ADDRS 64
0006
0007 /* Interrupt events/masks.
0008 */
0009 #define FEC_ENET_HBERR  0x80000000U /* Heartbeat error          */
0010 #define FEC_ENET_BABR   0x40000000U /* Babbling receiver        */
0011 #define FEC_ENET_BABT   0x20000000U /* Babbling transmitter     */
0012 #define FEC_ENET_GRA    0x10000000U /* Graceful stop complete   */
0013 #define FEC_ENET_TXF    0x08000000U /* Full frame transmitted   */
0014 #define FEC_ENET_TXB    0x04000000U /* A buffer was transmitted */
0015 #define FEC_ENET_RXF    0x02000000U /* Full frame received      */
0016 #define FEC_ENET_RXB    0x01000000U /* A buffer was received    */
0017 #define FEC_ENET_MII    0x00800000U /* MII interrupt            */
0018 #define FEC_ENET_EBERR  0x00400000U /* SDMA bus error           */
0019
0020 #define FEC_ECNTRL_PINMUX   0x00000004
0021 #define FEC_ECNTRL_ETHER_EN 0x00000002
0022 #define FEC_ECNTRL_RESET    0x00000001
0023
0024 /* RMII mode enabled only when MII_MODE bit is set too. */
0025 #define FEC_RCNTRL_RMII_MODE    (0x00000100 | \
0026                  FEC_RCNTRL_MII_MODE | FEC_RCNTRL_FCE)
0027 #define FEC_RCNTRL_FCE      0x00000020
0028 #define FEC_RCNTRL_BC_REJ   0x00000010
0029 #define FEC_RCNTRL_PROM     0x00000008
0030 #define FEC_RCNTRL_MII_MODE 0x00000004
0031 #define FEC_RCNTRL_DRT      0x00000002
0032 #define FEC_RCNTRL_LOOP     0x00000001
0033
0034 #define FEC_TCNTRL_FDEN     0x00000004
0035 #define FEC_TCNTRL_HBC      0x00000002
0036 #define FEC_TCNTRL_GTS      0x00000001
0037
0038 /*
0039  * Delay to wait for FEC reset command to complete (in us)
0040  */
0041 #define FEC_RESET_DELAY     50
0042 #endif