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0001 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
0002 /* Copyright 2014-2016 Freescale Semiconductor Inc.
0003  * Copyright 2016 NXP
0004  * Copyright 2020 NXP
0005  */
0006 
0007 #include <linux/net_tstamp.h>
0008 #include <linux/nospec.h>
0009 
0010 #include "dpni.h"   /* DPNI_LINK_OPT_* */
0011 #include "dpaa2-eth.h"
0012 
0013 /* To be kept in sync with DPNI statistics */
0014 static char dpaa2_ethtool_stats[][ETH_GSTRING_LEN] = {
0015     "[hw] rx frames",
0016     "[hw] rx bytes",
0017     "[hw] rx mcast frames",
0018     "[hw] rx mcast bytes",
0019     "[hw] rx bcast frames",
0020     "[hw] rx bcast bytes",
0021     "[hw] tx frames",
0022     "[hw] tx bytes",
0023     "[hw] tx mcast frames",
0024     "[hw] tx mcast bytes",
0025     "[hw] tx bcast frames",
0026     "[hw] tx bcast bytes",
0027     "[hw] rx filtered frames",
0028     "[hw] rx discarded frames",
0029     "[hw] rx nobuffer discards",
0030     "[hw] tx discarded frames",
0031     "[hw] tx confirmed frames",
0032     "[hw] tx dequeued bytes",
0033     "[hw] tx dequeued frames",
0034     "[hw] tx rejected bytes",
0035     "[hw] tx rejected frames",
0036     "[hw] tx pending frames",
0037 };
0038 
0039 #define DPAA2_ETH_NUM_STATS ARRAY_SIZE(dpaa2_ethtool_stats)
0040 
0041 static char dpaa2_ethtool_extras[][ETH_GSTRING_LEN] = {
0042     /* per-cpu stats */
0043     "[drv] tx conf frames",
0044     "[drv] tx conf bytes",
0045     "[drv] tx sg frames",
0046     "[drv] tx sg bytes",
0047     "[drv] tx tso frames",
0048     "[drv] tx tso bytes",
0049     "[drv] rx sg frames",
0050     "[drv] rx sg bytes",
0051     "[drv] tx converted sg frames",
0052     "[drv] tx converted sg bytes",
0053     "[drv] enqueue portal busy",
0054     /* Channel stats */
0055     "[drv] dequeue portal busy",
0056     "[drv] channel pull errors",
0057     "[drv] cdan",
0058     "[drv] xdp drop",
0059     "[drv] xdp tx",
0060     "[drv] xdp tx errors",
0061     "[drv] xdp redirect",
0062     /* FQ stats */
0063     "[qbman] rx pending frames",
0064     "[qbman] rx pending bytes",
0065     "[qbman] tx conf pending frames",
0066     "[qbman] tx conf pending bytes",
0067     "[qbman] buffer count",
0068 };
0069 
0070 #define DPAA2_ETH_NUM_EXTRA_STATS   ARRAY_SIZE(dpaa2_ethtool_extras)
0071 
0072 static void dpaa2_eth_get_drvinfo(struct net_device *net_dev,
0073                   struct ethtool_drvinfo *drvinfo)
0074 {
0075     struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
0076 
0077     strscpy(drvinfo->driver, KBUILD_MODNAME, sizeof(drvinfo->driver));
0078 
0079     snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
0080          "%u.%u", priv->dpni_ver_major, priv->dpni_ver_minor);
0081 
0082     strscpy(drvinfo->bus_info, dev_name(net_dev->dev.parent->parent),
0083         sizeof(drvinfo->bus_info));
0084 }
0085 
0086 static int dpaa2_eth_nway_reset(struct net_device *net_dev)
0087 {
0088     struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
0089 
0090     if (dpaa2_eth_is_type_phy(priv))
0091         return phylink_ethtool_nway_reset(priv->mac->phylink);
0092 
0093     return -EOPNOTSUPP;
0094 }
0095 
0096 static int
0097 dpaa2_eth_get_link_ksettings(struct net_device *net_dev,
0098                  struct ethtool_link_ksettings *link_settings)
0099 {
0100     struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
0101 
0102     if (dpaa2_eth_is_type_phy(priv))
0103         return phylink_ethtool_ksettings_get(priv->mac->phylink,
0104                              link_settings);
0105 
0106     link_settings->base.autoneg = AUTONEG_DISABLE;
0107     if (!(priv->link_state.options & DPNI_LINK_OPT_HALF_DUPLEX))
0108         link_settings->base.duplex = DUPLEX_FULL;
0109     link_settings->base.speed = priv->link_state.rate;
0110 
0111     return 0;
0112 }
0113 
0114 static int
0115 dpaa2_eth_set_link_ksettings(struct net_device *net_dev,
0116                  const struct ethtool_link_ksettings *link_settings)
0117 {
0118     struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
0119 
0120     if (!dpaa2_eth_is_type_phy(priv))
0121         return -ENOTSUPP;
0122 
0123     return phylink_ethtool_ksettings_set(priv->mac->phylink, link_settings);
0124 }
0125 
0126 static void dpaa2_eth_get_pauseparam(struct net_device *net_dev,
0127                      struct ethtool_pauseparam *pause)
0128 {
0129     struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
0130     u64 link_options = priv->link_state.options;
0131 
0132     if (dpaa2_eth_is_type_phy(priv)) {
0133         phylink_ethtool_get_pauseparam(priv->mac->phylink, pause);
0134         return;
0135     }
0136 
0137     pause->rx_pause = dpaa2_eth_rx_pause_enabled(link_options);
0138     pause->tx_pause = dpaa2_eth_tx_pause_enabled(link_options);
0139     pause->autoneg = AUTONEG_DISABLE;
0140 }
0141 
0142 static int dpaa2_eth_set_pauseparam(struct net_device *net_dev,
0143                     struct ethtool_pauseparam *pause)
0144 {
0145     struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
0146     struct dpni_link_cfg cfg = {0};
0147     int err;
0148 
0149     if (!dpaa2_eth_has_pause_support(priv)) {
0150         netdev_info(net_dev, "No pause frame support for DPNI version < %d.%d\n",
0151                 DPNI_PAUSE_VER_MAJOR, DPNI_PAUSE_VER_MINOR);
0152         return -EOPNOTSUPP;
0153     }
0154 
0155     if (dpaa2_eth_is_type_phy(priv))
0156         return phylink_ethtool_set_pauseparam(priv->mac->phylink,
0157                               pause);
0158     if (pause->autoneg)
0159         return -EOPNOTSUPP;
0160 
0161     cfg.rate = priv->link_state.rate;
0162     cfg.options = priv->link_state.options;
0163     if (pause->rx_pause)
0164         cfg.options |= DPNI_LINK_OPT_PAUSE;
0165     else
0166         cfg.options &= ~DPNI_LINK_OPT_PAUSE;
0167     if (!!pause->rx_pause ^ !!pause->tx_pause)
0168         cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
0169     else
0170         cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
0171 
0172     if (cfg.options == priv->link_state.options)
0173         return 0;
0174 
0175     err = dpni_set_link_cfg(priv->mc_io, 0, priv->mc_token, &cfg);
0176     if (err) {
0177         netdev_err(net_dev, "dpni_set_link_state failed\n");
0178         return err;
0179     }
0180 
0181     priv->link_state.options = cfg.options;
0182 
0183     return 0;
0184 }
0185 
0186 static void dpaa2_eth_get_strings(struct net_device *netdev, u32 stringset,
0187                   u8 *data)
0188 {
0189     struct dpaa2_eth_priv *priv = netdev_priv(netdev);
0190     u8 *p = data;
0191     int i;
0192 
0193     switch (stringset) {
0194     case ETH_SS_STATS:
0195         for (i = 0; i < DPAA2_ETH_NUM_STATS; i++) {
0196             strscpy(p, dpaa2_ethtool_stats[i], ETH_GSTRING_LEN);
0197             p += ETH_GSTRING_LEN;
0198         }
0199         for (i = 0; i < DPAA2_ETH_NUM_EXTRA_STATS; i++) {
0200             strscpy(p, dpaa2_ethtool_extras[i], ETH_GSTRING_LEN);
0201             p += ETH_GSTRING_LEN;
0202         }
0203         if (dpaa2_eth_has_mac(priv))
0204             dpaa2_mac_get_strings(p);
0205         break;
0206     }
0207 }
0208 
0209 static int dpaa2_eth_get_sset_count(struct net_device *net_dev, int sset)
0210 {
0211     int num_ss_stats = DPAA2_ETH_NUM_STATS + DPAA2_ETH_NUM_EXTRA_STATS;
0212     struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
0213 
0214     switch (sset) {
0215     case ETH_SS_STATS: /* ethtool_get_stats(), ethtool_get_drvinfo() */
0216         if (dpaa2_eth_has_mac(priv))
0217             num_ss_stats += dpaa2_mac_get_sset_count();
0218         return num_ss_stats;
0219     default:
0220         return -EOPNOTSUPP;
0221     }
0222 }
0223 
0224 /** Fill in hardware counters, as returned by MC.
0225  */
0226 static void dpaa2_eth_get_ethtool_stats(struct net_device *net_dev,
0227                     struct ethtool_stats *stats,
0228                     u64 *data)
0229 {
0230     int i = 0;
0231     int j, k, err;
0232     int num_cnt;
0233     union dpni_statistics dpni_stats;
0234     u32 fcnt, bcnt;
0235     u32 fcnt_rx_total = 0, fcnt_tx_total = 0;
0236     u32 bcnt_rx_total = 0, bcnt_tx_total = 0;
0237     u32 buf_cnt;
0238     struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
0239     struct dpaa2_eth_drv_stats *extras;
0240     struct dpaa2_eth_ch_stats *ch_stats;
0241     int dpni_stats_page_size[DPNI_STATISTICS_CNT] = {
0242         sizeof(dpni_stats.page_0),
0243         sizeof(dpni_stats.page_1),
0244         sizeof(dpni_stats.page_2),
0245         sizeof(dpni_stats.page_3),
0246         sizeof(dpni_stats.page_4),
0247         sizeof(dpni_stats.page_5),
0248         sizeof(dpni_stats.page_6),
0249     };
0250 
0251     memset(data, 0,
0252            sizeof(u64) * (DPAA2_ETH_NUM_STATS + DPAA2_ETH_NUM_EXTRA_STATS));
0253 
0254     /* Print standard counters, from DPNI statistics */
0255     for (j = 0; j <= 6; j++) {
0256         /* We're not interested in pages 4 & 5 for now */
0257         if (j == 4 || j == 5)
0258             continue;
0259         err = dpni_get_statistics(priv->mc_io, 0, priv->mc_token,
0260                       j, &dpni_stats);
0261         if (err == -EINVAL)
0262             /* Older firmware versions don't support all pages */
0263             memset(&dpni_stats, 0, sizeof(dpni_stats));
0264         else if (err)
0265             netdev_warn(net_dev, "dpni_get_stats(%d) failed\n", j);
0266 
0267         num_cnt = dpni_stats_page_size[j] / sizeof(u64);
0268         for (k = 0; k < num_cnt; k++)
0269             *(data + i++) = dpni_stats.raw.counter[k];
0270     }
0271 
0272     /* Print per-cpu extra stats */
0273     for_each_online_cpu(k) {
0274         extras = per_cpu_ptr(priv->percpu_extras, k);
0275         for (j = 0; j < sizeof(*extras) / sizeof(__u64); j++)
0276             *((__u64 *)data + i + j) += *((__u64 *)extras + j);
0277     }
0278     i += j;
0279 
0280     /* Per-channel stats */
0281     for (k = 0; k < priv->num_channels; k++) {
0282         ch_stats = &priv->channel[k]->stats;
0283         for (j = 0; j < DPAA2_ETH_CH_STATS; j++)
0284             *((__u64 *)data + i + j) += *((__u64 *)ch_stats + j);
0285     }
0286     i += j;
0287 
0288     for (j = 0; j < priv->num_fqs; j++) {
0289         /* Print FQ instantaneous counts */
0290         err = dpaa2_io_query_fq_count(NULL, priv->fq[j].fqid,
0291                           &fcnt, &bcnt);
0292         if (err) {
0293             netdev_warn(net_dev, "FQ query error %d", err);
0294             return;
0295         }
0296 
0297         if (priv->fq[j].type == DPAA2_TX_CONF_FQ) {
0298             fcnt_tx_total += fcnt;
0299             bcnt_tx_total += bcnt;
0300         } else {
0301             fcnt_rx_total += fcnt;
0302             bcnt_rx_total += bcnt;
0303         }
0304     }
0305 
0306     *(data + i++) = fcnt_rx_total;
0307     *(data + i++) = bcnt_rx_total;
0308     *(data + i++) = fcnt_tx_total;
0309     *(data + i++) = bcnt_tx_total;
0310 
0311     err = dpaa2_io_query_bp_count(NULL, priv->bpid, &buf_cnt);
0312     if (err) {
0313         netdev_warn(net_dev, "Buffer count query error %d\n", err);
0314         return;
0315     }
0316     *(data + i++) = buf_cnt;
0317 
0318     if (dpaa2_eth_has_mac(priv))
0319         dpaa2_mac_get_ethtool_stats(priv->mac, data + i);
0320 }
0321 
0322 static int dpaa2_eth_prep_eth_rule(struct ethhdr *eth_value, struct ethhdr *eth_mask,
0323                    void *key, void *mask, u64 *fields)
0324 {
0325     int off;
0326 
0327     if (eth_mask->h_proto) {
0328         off = dpaa2_eth_cls_fld_off(NET_PROT_ETH, NH_FLD_ETH_TYPE);
0329         *(__be16 *)(key + off) = eth_value->h_proto;
0330         *(__be16 *)(mask + off) = eth_mask->h_proto;
0331         *fields |= DPAA2_ETH_DIST_ETHTYPE;
0332     }
0333 
0334     if (!is_zero_ether_addr(eth_mask->h_source)) {
0335         off = dpaa2_eth_cls_fld_off(NET_PROT_ETH, NH_FLD_ETH_SA);
0336         ether_addr_copy(key + off, eth_value->h_source);
0337         ether_addr_copy(mask + off, eth_mask->h_source);
0338         *fields |= DPAA2_ETH_DIST_ETHSRC;
0339     }
0340 
0341     if (!is_zero_ether_addr(eth_mask->h_dest)) {
0342         off = dpaa2_eth_cls_fld_off(NET_PROT_ETH, NH_FLD_ETH_DA);
0343         ether_addr_copy(key + off, eth_value->h_dest);
0344         ether_addr_copy(mask + off, eth_mask->h_dest);
0345         *fields |= DPAA2_ETH_DIST_ETHDST;
0346     }
0347 
0348     return 0;
0349 }
0350 
0351 static int dpaa2_eth_prep_uip_rule(struct ethtool_usrip4_spec *uip_value,
0352                    struct ethtool_usrip4_spec *uip_mask,
0353                    void *key, void *mask, u64 *fields)
0354 {
0355     int off;
0356     u32 tmp_value, tmp_mask;
0357 
0358     if (uip_mask->tos || uip_mask->ip_ver)
0359         return -EOPNOTSUPP;
0360 
0361     if (uip_mask->ip4src) {
0362         off = dpaa2_eth_cls_fld_off(NET_PROT_IP, NH_FLD_IP_SRC);
0363         *(__be32 *)(key + off) = uip_value->ip4src;
0364         *(__be32 *)(mask + off) = uip_mask->ip4src;
0365         *fields |= DPAA2_ETH_DIST_IPSRC;
0366     }
0367 
0368     if (uip_mask->ip4dst) {
0369         off = dpaa2_eth_cls_fld_off(NET_PROT_IP, NH_FLD_IP_DST);
0370         *(__be32 *)(key + off) = uip_value->ip4dst;
0371         *(__be32 *)(mask + off) = uip_mask->ip4dst;
0372         *fields |= DPAA2_ETH_DIST_IPDST;
0373     }
0374 
0375     if (uip_mask->proto) {
0376         off = dpaa2_eth_cls_fld_off(NET_PROT_IP, NH_FLD_IP_PROTO);
0377         *(u8 *)(key + off) = uip_value->proto;
0378         *(u8 *)(mask + off) = uip_mask->proto;
0379         *fields |= DPAA2_ETH_DIST_IPPROTO;
0380     }
0381 
0382     if (uip_mask->l4_4_bytes) {
0383         tmp_value = be32_to_cpu(uip_value->l4_4_bytes);
0384         tmp_mask = be32_to_cpu(uip_mask->l4_4_bytes);
0385 
0386         off = dpaa2_eth_cls_fld_off(NET_PROT_UDP, NH_FLD_UDP_PORT_SRC);
0387         *(__be16 *)(key + off) = htons(tmp_value >> 16);
0388         *(__be16 *)(mask + off) = htons(tmp_mask >> 16);
0389         *fields |= DPAA2_ETH_DIST_L4SRC;
0390 
0391         off = dpaa2_eth_cls_fld_off(NET_PROT_UDP, NH_FLD_UDP_PORT_DST);
0392         *(__be16 *)(key + off) = htons(tmp_value & 0xFFFF);
0393         *(__be16 *)(mask + off) = htons(tmp_mask & 0xFFFF);
0394         *fields |= DPAA2_ETH_DIST_L4DST;
0395     }
0396 
0397     /* Only apply the rule for IPv4 frames */
0398     off = dpaa2_eth_cls_fld_off(NET_PROT_ETH, NH_FLD_ETH_TYPE);
0399     *(__be16 *)(key + off) = htons(ETH_P_IP);
0400     *(__be16 *)(mask + off) = htons(0xFFFF);
0401     *fields |= DPAA2_ETH_DIST_ETHTYPE;
0402 
0403     return 0;
0404 }
0405 
0406 static int dpaa2_eth_prep_l4_rule(struct ethtool_tcpip4_spec *l4_value,
0407                   struct ethtool_tcpip4_spec *l4_mask,
0408                   void *key, void *mask, u8 l4_proto, u64 *fields)
0409 {
0410     int off;
0411 
0412     if (l4_mask->tos)
0413         return -EOPNOTSUPP;
0414 
0415     if (l4_mask->ip4src) {
0416         off = dpaa2_eth_cls_fld_off(NET_PROT_IP, NH_FLD_IP_SRC);
0417         *(__be32 *)(key + off) = l4_value->ip4src;
0418         *(__be32 *)(mask + off) = l4_mask->ip4src;
0419         *fields |= DPAA2_ETH_DIST_IPSRC;
0420     }
0421 
0422     if (l4_mask->ip4dst) {
0423         off = dpaa2_eth_cls_fld_off(NET_PROT_IP, NH_FLD_IP_DST);
0424         *(__be32 *)(key + off) = l4_value->ip4dst;
0425         *(__be32 *)(mask + off) = l4_mask->ip4dst;
0426         *fields |= DPAA2_ETH_DIST_IPDST;
0427     }
0428 
0429     if (l4_mask->psrc) {
0430         off = dpaa2_eth_cls_fld_off(NET_PROT_UDP, NH_FLD_UDP_PORT_SRC);
0431         *(__be16 *)(key + off) = l4_value->psrc;
0432         *(__be16 *)(mask + off) = l4_mask->psrc;
0433         *fields |= DPAA2_ETH_DIST_L4SRC;
0434     }
0435 
0436     if (l4_mask->pdst) {
0437         off = dpaa2_eth_cls_fld_off(NET_PROT_UDP, NH_FLD_UDP_PORT_DST);
0438         *(__be16 *)(key + off) = l4_value->pdst;
0439         *(__be16 *)(mask + off) = l4_mask->pdst;
0440         *fields |= DPAA2_ETH_DIST_L4DST;
0441     }
0442 
0443     /* Only apply the rule for IPv4 frames with the specified L4 proto */
0444     off = dpaa2_eth_cls_fld_off(NET_PROT_ETH, NH_FLD_ETH_TYPE);
0445     *(__be16 *)(key + off) = htons(ETH_P_IP);
0446     *(__be16 *)(mask + off) = htons(0xFFFF);
0447     *fields |= DPAA2_ETH_DIST_ETHTYPE;
0448 
0449     off = dpaa2_eth_cls_fld_off(NET_PROT_IP, NH_FLD_IP_PROTO);
0450     *(u8 *)(key + off) = l4_proto;
0451     *(u8 *)(mask + off) = 0xFF;
0452     *fields |= DPAA2_ETH_DIST_IPPROTO;
0453 
0454     return 0;
0455 }
0456 
0457 static int dpaa2_eth_prep_ext_rule(struct ethtool_flow_ext *ext_value,
0458                    struct ethtool_flow_ext *ext_mask,
0459                    void *key, void *mask, u64 *fields)
0460 {
0461     int off;
0462 
0463     if (ext_mask->vlan_etype)
0464         return -EOPNOTSUPP;
0465 
0466     if (ext_mask->vlan_tci) {
0467         off = dpaa2_eth_cls_fld_off(NET_PROT_VLAN, NH_FLD_VLAN_TCI);
0468         *(__be16 *)(key + off) = ext_value->vlan_tci;
0469         *(__be16 *)(mask + off) = ext_mask->vlan_tci;
0470         *fields |= DPAA2_ETH_DIST_VLAN;
0471     }
0472 
0473     return 0;
0474 }
0475 
0476 static int dpaa2_eth_prep_mac_ext_rule(struct ethtool_flow_ext *ext_value,
0477                        struct ethtool_flow_ext *ext_mask,
0478                        void *key, void *mask, u64 *fields)
0479 {
0480     int off;
0481 
0482     if (!is_zero_ether_addr(ext_mask->h_dest)) {
0483         off = dpaa2_eth_cls_fld_off(NET_PROT_ETH, NH_FLD_ETH_DA);
0484         ether_addr_copy(key + off, ext_value->h_dest);
0485         ether_addr_copy(mask + off, ext_mask->h_dest);
0486         *fields |= DPAA2_ETH_DIST_ETHDST;
0487     }
0488 
0489     return 0;
0490 }
0491 
0492 static int dpaa2_eth_prep_cls_rule(struct ethtool_rx_flow_spec *fs, void *key,
0493                    void *mask, u64 *fields)
0494 {
0495     int err;
0496 
0497     switch (fs->flow_type & 0xFF) {
0498     case ETHER_FLOW:
0499         err = dpaa2_eth_prep_eth_rule(&fs->h_u.ether_spec, &fs->m_u.ether_spec,
0500                           key, mask, fields);
0501         break;
0502     case IP_USER_FLOW:
0503         err = dpaa2_eth_prep_uip_rule(&fs->h_u.usr_ip4_spec,
0504                           &fs->m_u.usr_ip4_spec, key, mask, fields);
0505         break;
0506     case TCP_V4_FLOW:
0507         err = dpaa2_eth_prep_l4_rule(&fs->h_u.tcp_ip4_spec, &fs->m_u.tcp_ip4_spec,
0508                          key, mask, IPPROTO_TCP, fields);
0509         break;
0510     case UDP_V4_FLOW:
0511         err = dpaa2_eth_prep_l4_rule(&fs->h_u.udp_ip4_spec, &fs->m_u.udp_ip4_spec,
0512                          key, mask, IPPROTO_UDP, fields);
0513         break;
0514     case SCTP_V4_FLOW:
0515         err = dpaa2_eth_prep_l4_rule(&fs->h_u.sctp_ip4_spec,
0516                          &fs->m_u.sctp_ip4_spec, key, mask,
0517                          IPPROTO_SCTP, fields);
0518         break;
0519     default:
0520         return -EOPNOTSUPP;
0521     }
0522 
0523     if (err)
0524         return err;
0525 
0526     if (fs->flow_type & FLOW_EXT) {
0527         err = dpaa2_eth_prep_ext_rule(&fs->h_ext, &fs->m_ext, key, mask, fields);
0528         if (err)
0529             return err;
0530     }
0531 
0532     if (fs->flow_type & FLOW_MAC_EXT) {
0533         err = dpaa2_eth_prep_mac_ext_rule(&fs->h_ext, &fs->m_ext, key,
0534                           mask, fields);
0535         if (err)
0536             return err;
0537     }
0538 
0539     return 0;
0540 }
0541 
0542 static int dpaa2_eth_do_cls_rule(struct net_device *net_dev,
0543                  struct ethtool_rx_flow_spec *fs,
0544                  bool add)
0545 {
0546     struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
0547     struct device *dev = net_dev->dev.parent;
0548     struct dpni_rule_cfg rule_cfg = { 0 };
0549     struct dpni_fs_action_cfg fs_act = { 0 };
0550     dma_addr_t key_iova;
0551     u64 fields = 0;
0552     void *key_buf;
0553     int i, err;
0554 
0555     if (fs->ring_cookie != RX_CLS_FLOW_DISC &&
0556         fs->ring_cookie >= dpaa2_eth_queue_count(priv))
0557         return -EINVAL;
0558 
0559     rule_cfg.key_size = dpaa2_eth_cls_key_size(DPAA2_ETH_DIST_ALL);
0560 
0561     /* allocate twice the key size, for the actual key and for mask */
0562     key_buf = kzalloc(rule_cfg.key_size * 2, GFP_KERNEL);
0563     if (!key_buf)
0564         return -ENOMEM;
0565 
0566     /* Fill the key and mask memory areas */
0567     err = dpaa2_eth_prep_cls_rule(fs, key_buf, key_buf + rule_cfg.key_size, &fields);
0568     if (err)
0569         goto free_mem;
0570 
0571     if (!dpaa2_eth_fs_mask_enabled(priv)) {
0572         /* Masking allows us to configure a maximal key during init and
0573          * use it for all flow steering rules. Without it, we include
0574          * in the key only the fields actually used, so we need to
0575          * extract the others from the final key buffer.
0576          *
0577          * Program the FS key if needed, or return error if previously
0578          * set key can't be used for the current rule. User needs to
0579          * delete existing rules in this case to allow for the new one.
0580          */
0581         if (!priv->rx_cls_fields) {
0582             err = dpaa2_eth_set_cls(net_dev, fields);
0583             if (err)
0584                 goto free_mem;
0585 
0586             priv->rx_cls_fields = fields;
0587         } else if (priv->rx_cls_fields != fields) {
0588             netdev_err(net_dev, "No support for multiple FS keys, need to delete existing rules\n");
0589             err = -EOPNOTSUPP;
0590             goto free_mem;
0591         }
0592 
0593         dpaa2_eth_cls_trim_rule(key_buf, fields);
0594         rule_cfg.key_size = dpaa2_eth_cls_key_size(fields);
0595     }
0596 
0597     key_iova = dma_map_single(dev, key_buf, rule_cfg.key_size * 2,
0598                   DMA_TO_DEVICE);
0599     if (dma_mapping_error(dev, key_iova)) {
0600         err = -ENOMEM;
0601         goto free_mem;
0602     }
0603 
0604     rule_cfg.key_iova = key_iova;
0605     if (dpaa2_eth_fs_mask_enabled(priv))
0606         rule_cfg.mask_iova = key_iova + rule_cfg.key_size;
0607 
0608     if (add) {
0609         if (fs->ring_cookie == RX_CLS_FLOW_DISC)
0610             fs_act.options |= DPNI_FS_OPT_DISCARD;
0611         else
0612             fs_act.flow_id = fs->ring_cookie;
0613     }
0614     for (i = 0; i < dpaa2_eth_tc_count(priv); i++) {
0615         if (add)
0616             err = dpni_add_fs_entry(priv->mc_io, 0, priv->mc_token,
0617                         i, fs->location, &rule_cfg,
0618                         &fs_act);
0619         else
0620             err = dpni_remove_fs_entry(priv->mc_io, 0,
0621                            priv->mc_token, i,
0622                            &rule_cfg);
0623         if (err || priv->dpni_attrs.options & DPNI_OPT_SHARED_FS)
0624             break;
0625     }
0626 
0627     dma_unmap_single(dev, key_iova, rule_cfg.key_size * 2, DMA_TO_DEVICE);
0628 
0629 free_mem:
0630     kfree(key_buf);
0631 
0632     return err;
0633 }
0634 
0635 static int dpaa2_eth_num_cls_rules(struct dpaa2_eth_priv *priv)
0636 {
0637     int i, rules = 0;
0638 
0639     for (i = 0; i < dpaa2_eth_fs_count(priv); i++)
0640         if (priv->cls_rules[i].in_use)
0641             rules++;
0642 
0643     return rules;
0644 }
0645 
0646 static int dpaa2_eth_update_cls_rule(struct net_device *net_dev,
0647                      struct ethtool_rx_flow_spec *new_fs,
0648                      unsigned int location)
0649 {
0650     struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
0651     struct dpaa2_eth_cls_rule *rule;
0652     int err = -EINVAL;
0653 
0654     if (!priv->rx_cls_enabled)
0655         return -EOPNOTSUPP;
0656 
0657     if (location >= dpaa2_eth_fs_count(priv))
0658         return -EINVAL;
0659 
0660     rule = &priv->cls_rules[location];
0661 
0662     /* If a rule is present at the specified location, delete it. */
0663     if (rule->in_use) {
0664         err = dpaa2_eth_do_cls_rule(net_dev, &rule->fs, false);
0665         if (err)
0666             return err;
0667 
0668         rule->in_use = 0;
0669 
0670         if (!dpaa2_eth_fs_mask_enabled(priv) &&
0671             !dpaa2_eth_num_cls_rules(priv))
0672             priv->rx_cls_fields = 0;
0673     }
0674 
0675     /* If no new entry to add, return here */
0676     if (!new_fs)
0677         return err;
0678 
0679     err = dpaa2_eth_do_cls_rule(net_dev, new_fs, true);
0680     if (err)
0681         return err;
0682 
0683     rule->in_use = 1;
0684     rule->fs = *new_fs;
0685 
0686     return 0;
0687 }
0688 
0689 static int dpaa2_eth_get_rxnfc(struct net_device *net_dev,
0690                    struct ethtool_rxnfc *rxnfc, u32 *rule_locs)
0691 {
0692     struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
0693     int max_rules = dpaa2_eth_fs_count(priv);
0694     int i, j = 0;
0695 
0696     switch (rxnfc->cmd) {
0697     case ETHTOOL_GRXFH:
0698         /* we purposely ignore cmd->flow_type for now, because the
0699          * classifier only supports a single set of fields for all
0700          * protocols
0701          */
0702         rxnfc->data = priv->rx_hash_fields;
0703         break;
0704     case ETHTOOL_GRXRINGS:
0705         rxnfc->data = dpaa2_eth_queue_count(priv);
0706         break;
0707     case ETHTOOL_GRXCLSRLCNT:
0708         rxnfc->rule_cnt = 0;
0709         rxnfc->rule_cnt = dpaa2_eth_num_cls_rules(priv);
0710         rxnfc->data = max_rules;
0711         break;
0712     case ETHTOOL_GRXCLSRULE:
0713         if (rxnfc->fs.location >= max_rules)
0714             return -EINVAL;
0715         rxnfc->fs.location = array_index_nospec(rxnfc->fs.location,
0716                             max_rules);
0717         if (!priv->cls_rules[rxnfc->fs.location].in_use)
0718             return -EINVAL;
0719         rxnfc->fs = priv->cls_rules[rxnfc->fs.location].fs;
0720         break;
0721     case ETHTOOL_GRXCLSRLALL:
0722         for (i = 0; i < max_rules; i++) {
0723             if (!priv->cls_rules[i].in_use)
0724                 continue;
0725             if (j == rxnfc->rule_cnt)
0726                 return -EMSGSIZE;
0727             rule_locs[j++] = i;
0728         }
0729         rxnfc->rule_cnt = j;
0730         rxnfc->data = max_rules;
0731         break;
0732     default:
0733         return -EOPNOTSUPP;
0734     }
0735 
0736     return 0;
0737 }
0738 
0739 static int dpaa2_eth_set_rxnfc(struct net_device *net_dev,
0740                    struct ethtool_rxnfc *rxnfc)
0741 {
0742     int err = 0;
0743 
0744     switch (rxnfc->cmd) {
0745     case ETHTOOL_SRXFH:
0746         if ((rxnfc->data & DPAA2_RXH_SUPPORTED) != rxnfc->data)
0747             return -EOPNOTSUPP;
0748         err = dpaa2_eth_set_hash(net_dev, rxnfc->data);
0749         break;
0750     case ETHTOOL_SRXCLSRLINS:
0751         err = dpaa2_eth_update_cls_rule(net_dev, &rxnfc->fs, rxnfc->fs.location);
0752         break;
0753     case ETHTOOL_SRXCLSRLDEL:
0754         err = dpaa2_eth_update_cls_rule(net_dev, NULL, rxnfc->fs.location);
0755         break;
0756     default:
0757         err = -EOPNOTSUPP;
0758     }
0759 
0760     return err;
0761 }
0762 
0763 int dpaa2_phc_index = -1;
0764 EXPORT_SYMBOL(dpaa2_phc_index);
0765 
0766 static int dpaa2_eth_get_ts_info(struct net_device *dev,
0767                  struct ethtool_ts_info *info)
0768 {
0769     if (!dpaa2_ptp)
0770         return ethtool_op_get_ts_info(dev, info);
0771 
0772     info->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |
0773                 SOF_TIMESTAMPING_RX_HARDWARE |
0774                 SOF_TIMESTAMPING_RAW_HARDWARE;
0775 
0776     info->phc_index = dpaa2_phc_index;
0777 
0778     info->tx_types = (1 << HWTSTAMP_TX_OFF) |
0779              (1 << HWTSTAMP_TX_ON) |
0780              (1 << HWTSTAMP_TX_ONESTEP_SYNC);
0781 
0782     info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) |
0783                (1 << HWTSTAMP_FILTER_ALL);
0784     return 0;
0785 }
0786 
0787 static int dpaa2_eth_get_tunable(struct net_device *net_dev,
0788                  const struct ethtool_tunable *tuna,
0789                  void *data)
0790 {
0791     struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
0792     int err = 0;
0793 
0794     switch (tuna->id) {
0795     case ETHTOOL_RX_COPYBREAK:
0796         *(u32 *)data = priv->rx_copybreak;
0797         break;
0798     default:
0799         err = -EOPNOTSUPP;
0800         break;
0801     }
0802 
0803     return err;
0804 }
0805 
0806 static int dpaa2_eth_set_tunable(struct net_device *net_dev,
0807                  const struct ethtool_tunable *tuna,
0808                  const void *data)
0809 {
0810     struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
0811     int err = 0;
0812 
0813     switch (tuna->id) {
0814     case ETHTOOL_RX_COPYBREAK:
0815         priv->rx_copybreak = *(u32 *)data;
0816         break;
0817     default:
0818         err = -EOPNOTSUPP;
0819         break;
0820     }
0821 
0822     return err;
0823 }
0824 
0825 static int dpaa2_eth_get_coalesce(struct net_device *dev,
0826                   struct ethtool_coalesce *ic,
0827                   struct kernel_ethtool_coalesce *kernel_coal,
0828                   struct netlink_ext_ack *extack)
0829 {
0830     struct dpaa2_eth_priv *priv = netdev_priv(dev);
0831     struct dpaa2_io *dpio = priv->channel[0]->dpio;
0832 
0833     dpaa2_io_get_irq_coalescing(dpio, &ic->rx_coalesce_usecs);
0834     ic->use_adaptive_rx_coalesce = dpaa2_io_get_adaptive_coalescing(dpio);
0835 
0836     return 0;
0837 }
0838 
0839 static int dpaa2_eth_set_coalesce(struct net_device *dev,
0840                   struct ethtool_coalesce *ic,
0841                   struct kernel_ethtool_coalesce *kernel_coal,
0842                   struct netlink_ext_ack *extack)
0843 {
0844     struct dpaa2_eth_priv *priv = netdev_priv(dev);
0845     struct dpaa2_io *dpio;
0846     int prev_adaptive;
0847     u32 prev_rx_usecs;
0848     int i, j, err;
0849 
0850     /* Keep track of the previous value, just in case we fail */
0851     dpio = priv->channel[0]->dpio;
0852     dpaa2_io_get_irq_coalescing(dpio, &prev_rx_usecs);
0853     prev_adaptive = dpaa2_io_get_adaptive_coalescing(dpio);
0854 
0855     /* Setup new value for rx coalescing */
0856     for (i = 0; i < priv->num_channels; i++) {
0857         dpio = priv->channel[i]->dpio;
0858 
0859         dpaa2_io_set_adaptive_coalescing(dpio,
0860                          ic->use_adaptive_rx_coalesce);
0861         err = dpaa2_io_set_irq_coalescing(dpio, ic->rx_coalesce_usecs);
0862         if (err)
0863             goto restore_rx_usecs;
0864     }
0865 
0866     return 0;
0867 
0868 restore_rx_usecs:
0869     for (j = 0; j < i; j++) {
0870         dpio = priv->channel[j]->dpio;
0871 
0872         dpaa2_io_set_irq_coalescing(dpio, prev_rx_usecs);
0873         dpaa2_io_set_adaptive_coalescing(dpio, prev_adaptive);
0874     }
0875 
0876     return err;
0877 }
0878 
0879 const struct ethtool_ops dpaa2_ethtool_ops = {
0880     .supported_coalesce_params = ETHTOOL_COALESCE_RX_USECS |
0881                      ETHTOOL_COALESCE_USE_ADAPTIVE_RX,
0882     .get_drvinfo = dpaa2_eth_get_drvinfo,
0883     .nway_reset = dpaa2_eth_nway_reset,
0884     .get_link = ethtool_op_get_link,
0885     .get_link_ksettings = dpaa2_eth_get_link_ksettings,
0886     .set_link_ksettings = dpaa2_eth_set_link_ksettings,
0887     .get_pauseparam = dpaa2_eth_get_pauseparam,
0888     .set_pauseparam = dpaa2_eth_set_pauseparam,
0889     .get_sset_count = dpaa2_eth_get_sset_count,
0890     .get_ethtool_stats = dpaa2_eth_get_ethtool_stats,
0891     .get_strings = dpaa2_eth_get_strings,
0892     .get_rxnfc = dpaa2_eth_get_rxnfc,
0893     .set_rxnfc = dpaa2_eth_set_rxnfc,
0894     .get_ts_info = dpaa2_eth_get_ts_info,
0895     .get_tunable = dpaa2_eth_get_tunable,
0896     .set_tunable = dpaa2_eth_set_tunable,
0897     .get_coalesce = dpaa2_eth_get_coalesce,
0898     .set_coalesce = dpaa2_eth_set_coalesce,
0899 };
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