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0009 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
0010
0011 #include <linux/dma-mapping.h>
0012 #include <linux/etherdevice.h>
0013 #include <linux/ethtool.h>
0014 #include <linux/init.h>
0015 #include <linux/interrupt.h>
0016 #include <linux/io.h>
0017 #include <linux/mii.h>
0018 #include <linux/module.h>
0019 #include <linux/mod_devicetable.h>
0020 #include <linux/netdevice.h>
0021 #include <linux/platform_device.h>
0022
0023 #include "ftmac100.h"
0024
0025 #define DRV_NAME "ftmac100"
0026
0027 #define RX_QUEUE_ENTRIES 128
0028 #define TX_QUEUE_ENTRIES 16
0029
0030 #define MAX_PKT_SIZE 1518
0031 #define RX_BUF_SIZE 2044
0032
0033 #if MAX_PKT_SIZE > 0x7ff
0034 #error invalid MAX_PKT_SIZE
0035 #endif
0036
0037 #if RX_BUF_SIZE > 0x7ff || RX_BUF_SIZE > PAGE_SIZE
0038 #error invalid RX_BUF_SIZE
0039 #endif
0040
0041
0042
0043
0044 struct ftmac100_descs {
0045 struct ftmac100_rxdes rxdes[RX_QUEUE_ENTRIES];
0046 struct ftmac100_txdes txdes[TX_QUEUE_ENTRIES];
0047 };
0048
0049 struct ftmac100 {
0050 struct resource *res;
0051 void __iomem *base;
0052 int irq;
0053
0054 struct ftmac100_descs *descs;
0055 dma_addr_t descs_dma_addr;
0056
0057 unsigned int rx_pointer;
0058 unsigned int tx_clean_pointer;
0059 unsigned int tx_pointer;
0060 unsigned int tx_pending;
0061
0062 spinlock_t tx_lock;
0063
0064 struct net_device *netdev;
0065 struct device *dev;
0066 struct napi_struct napi;
0067
0068 struct mii_if_info mii;
0069 };
0070
0071 static int ftmac100_alloc_rx_page(struct ftmac100 *priv,
0072 struct ftmac100_rxdes *rxdes, gfp_t gfp);
0073
0074
0075
0076
0077 #define INT_MASK_ALL_ENABLED (FTMAC100_INT_RPKT_FINISH | \
0078 FTMAC100_INT_NORXBUF | \
0079 FTMAC100_INT_XPKT_OK | \
0080 FTMAC100_INT_XPKT_LOST | \
0081 FTMAC100_INT_RPKT_LOST | \
0082 FTMAC100_INT_AHB_ERR | \
0083 FTMAC100_INT_PHYSTS_CHG)
0084
0085 #define INT_MASK_ALL_DISABLED 0
0086
0087 static void ftmac100_enable_all_int(struct ftmac100 *priv)
0088 {
0089 iowrite32(INT_MASK_ALL_ENABLED, priv->base + FTMAC100_OFFSET_IMR);
0090 }
0091
0092 static void ftmac100_disable_all_int(struct ftmac100 *priv)
0093 {
0094 iowrite32(INT_MASK_ALL_DISABLED, priv->base + FTMAC100_OFFSET_IMR);
0095 }
0096
0097 static void ftmac100_set_rx_ring_base(struct ftmac100 *priv, dma_addr_t addr)
0098 {
0099 iowrite32(addr, priv->base + FTMAC100_OFFSET_RXR_BADR);
0100 }
0101
0102 static void ftmac100_set_tx_ring_base(struct ftmac100 *priv, dma_addr_t addr)
0103 {
0104 iowrite32(addr, priv->base + FTMAC100_OFFSET_TXR_BADR);
0105 }
0106
0107 static void ftmac100_txdma_start_polling(struct ftmac100 *priv)
0108 {
0109 iowrite32(1, priv->base + FTMAC100_OFFSET_TXPD);
0110 }
0111
0112 static int ftmac100_reset(struct ftmac100 *priv)
0113 {
0114 struct net_device *netdev = priv->netdev;
0115 int i;
0116
0117
0118 iowrite32(FTMAC100_MACCR_SW_RST, priv->base + FTMAC100_OFFSET_MACCR);
0119
0120 for (i = 0; i < 5; i++) {
0121 unsigned int maccr;
0122
0123 maccr = ioread32(priv->base + FTMAC100_OFFSET_MACCR);
0124 if (!(maccr & FTMAC100_MACCR_SW_RST)) {
0125
0126
0127
0128
0129
0130 udelay(500);
0131 return 0;
0132 }
0133
0134 udelay(1000);
0135 }
0136
0137 netdev_err(netdev, "software reset failed\n");
0138 return -EIO;
0139 }
0140
0141 static void ftmac100_set_mac(struct ftmac100 *priv, const unsigned char *mac)
0142 {
0143 unsigned int maddr = mac[0] << 8 | mac[1];
0144 unsigned int laddr = mac[2] << 24 | mac[3] << 16 | mac[4] << 8 | mac[5];
0145
0146 iowrite32(maddr, priv->base + FTMAC100_OFFSET_MAC_MADR);
0147 iowrite32(laddr, priv->base + FTMAC100_OFFSET_MAC_LADR);
0148 }
0149
0150 #define MACCR_ENABLE_ALL (FTMAC100_MACCR_XMT_EN | \
0151 FTMAC100_MACCR_RCV_EN | \
0152 FTMAC100_MACCR_XDMA_EN | \
0153 FTMAC100_MACCR_RDMA_EN | \
0154 FTMAC100_MACCR_CRC_APD | \
0155 FTMAC100_MACCR_FULLDUP | \
0156 FTMAC100_MACCR_RX_RUNT | \
0157 FTMAC100_MACCR_RX_BROADPKT)
0158
0159 static int ftmac100_start_hw(struct ftmac100 *priv)
0160 {
0161 struct net_device *netdev = priv->netdev;
0162
0163 if (ftmac100_reset(priv))
0164 return -EIO;
0165
0166
0167 ftmac100_set_rx_ring_base(priv,
0168 priv->descs_dma_addr +
0169 offsetof(struct ftmac100_descs, rxdes));
0170 ftmac100_set_tx_ring_base(priv,
0171 priv->descs_dma_addr +
0172 offsetof(struct ftmac100_descs, txdes));
0173
0174 iowrite32(FTMAC100_APTC_RXPOLL_CNT(1), priv->base + FTMAC100_OFFSET_APTC);
0175
0176 ftmac100_set_mac(priv, netdev->dev_addr);
0177
0178 iowrite32(MACCR_ENABLE_ALL, priv->base + FTMAC100_OFFSET_MACCR);
0179 return 0;
0180 }
0181
0182 static void ftmac100_stop_hw(struct ftmac100 *priv)
0183 {
0184 iowrite32(0, priv->base + FTMAC100_OFFSET_MACCR);
0185 }
0186
0187
0188
0189
0190 static bool ftmac100_rxdes_first_segment(struct ftmac100_rxdes *rxdes)
0191 {
0192 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_FRS);
0193 }
0194
0195 static bool ftmac100_rxdes_last_segment(struct ftmac100_rxdes *rxdes)
0196 {
0197 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_LRS);
0198 }
0199
0200 static bool ftmac100_rxdes_owned_by_dma(struct ftmac100_rxdes *rxdes)
0201 {
0202 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RXDMA_OWN);
0203 }
0204
0205 static void ftmac100_rxdes_set_dma_own(struct ftmac100_rxdes *rxdes)
0206 {
0207
0208 rxdes->rxdes0 = cpu_to_le32(FTMAC100_RXDES0_RXDMA_OWN);
0209 }
0210
0211 static bool ftmac100_rxdes_rx_error(struct ftmac100_rxdes *rxdes)
0212 {
0213 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RX_ERR);
0214 }
0215
0216 static bool ftmac100_rxdes_crc_error(struct ftmac100_rxdes *rxdes)
0217 {
0218 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_CRC_ERR);
0219 }
0220
0221 static bool ftmac100_rxdes_frame_too_long(struct ftmac100_rxdes *rxdes)
0222 {
0223 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_FTL);
0224 }
0225
0226 static bool ftmac100_rxdes_runt(struct ftmac100_rxdes *rxdes)
0227 {
0228 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RUNT);
0229 }
0230
0231 static bool ftmac100_rxdes_odd_nibble(struct ftmac100_rxdes *rxdes)
0232 {
0233 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RX_ODD_NB);
0234 }
0235
0236 static unsigned int ftmac100_rxdes_frame_length(struct ftmac100_rxdes *rxdes)
0237 {
0238 return le32_to_cpu(rxdes->rxdes0) & FTMAC100_RXDES0_RFL;
0239 }
0240
0241 static bool ftmac100_rxdes_multicast(struct ftmac100_rxdes *rxdes)
0242 {
0243 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_MULTICAST);
0244 }
0245
0246 static void ftmac100_rxdes_set_buffer_size(struct ftmac100_rxdes *rxdes,
0247 unsigned int size)
0248 {
0249 rxdes->rxdes1 &= cpu_to_le32(FTMAC100_RXDES1_EDORR);
0250 rxdes->rxdes1 |= cpu_to_le32(FTMAC100_RXDES1_RXBUF_SIZE(size));
0251 }
0252
0253 static void ftmac100_rxdes_set_end_of_ring(struct ftmac100_rxdes *rxdes)
0254 {
0255 rxdes->rxdes1 |= cpu_to_le32(FTMAC100_RXDES1_EDORR);
0256 }
0257
0258 static void ftmac100_rxdes_set_dma_addr(struct ftmac100_rxdes *rxdes,
0259 dma_addr_t addr)
0260 {
0261 rxdes->rxdes2 = cpu_to_le32(addr);
0262 }
0263
0264 static dma_addr_t ftmac100_rxdes_get_dma_addr(struct ftmac100_rxdes *rxdes)
0265 {
0266 return le32_to_cpu(rxdes->rxdes2);
0267 }
0268
0269
0270
0271
0272
0273 static void ftmac100_rxdes_set_page(struct ftmac100_rxdes *rxdes, struct page *page)
0274 {
0275 rxdes->rxdes3 = (unsigned int)page;
0276 }
0277
0278 static struct page *ftmac100_rxdes_get_page(struct ftmac100_rxdes *rxdes)
0279 {
0280 return (struct page *)rxdes->rxdes3;
0281 }
0282
0283
0284
0285
0286 static int ftmac100_next_rx_pointer(int pointer)
0287 {
0288 return (pointer + 1) & (RX_QUEUE_ENTRIES - 1);
0289 }
0290
0291 static void ftmac100_rx_pointer_advance(struct ftmac100 *priv)
0292 {
0293 priv->rx_pointer = ftmac100_next_rx_pointer(priv->rx_pointer);
0294 }
0295
0296 static struct ftmac100_rxdes *ftmac100_current_rxdes(struct ftmac100 *priv)
0297 {
0298 return &priv->descs->rxdes[priv->rx_pointer];
0299 }
0300
0301 static struct ftmac100_rxdes *
0302 ftmac100_rx_locate_first_segment(struct ftmac100 *priv)
0303 {
0304 struct ftmac100_rxdes *rxdes = ftmac100_current_rxdes(priv);
0305
0306 while (!ftmac100_rxdes_owned_by_dma(rxdes)) {
0307 if (ftmac100_rxdes_first_segment(rxdes))
0308 return rxdes;
0309
0310 ftmac100_rxdes_set_dma_own(rxdes);
0311 ftmac100_rx_pointer_advance(priv);
0312 rxdes = ftmac100_current_rxdes(priv);
0313 }
0314
0315 return NULL;
0316 }
0317
0318 static bool ftmac100_rx_packet_error(struct ftmac100 *priv,
0319 struct ftmac100_rxdes *rxdes)
0320 {
0321 struct net_device *netdev = priv->netdev;
0322 bool error = false;
0323
0324 if (unlikely(ftmac100_rxdes_rx_error(rxdes))) {
0325 if (net_ratelimit())
0326 netdev_info(netdev, "rx err\n");
0327
0328 netdev->stats.rx_errors++;
0329 error = true;
0330 }
0331
0332 if (unlikely(ftmac100_rxdes_crc_error(rxdes))) {
0333 if (net_ratelimit())
0334 netdev_info(netdev, "rx crc err\n");
0335
0336 netdev->stats.rx_crc_errors++;
0337 error = true;
0338 }
0339
0340 if (unlikely(ftmac100_rxdes_frame_too_long(rxdes))) {
0341 if (net_ratelimit())
0342 netdev_info(netdev, "rx frame too long\n");
0343
0344 netdev->stats.rx_length_errors++;
0345 error = true;
0346 } else if (unlikely(ftmac100_rxdes_runt(rxdes))) {
0347 if (net_ratelimit())
0348 netdev_info(netdev, "rx runt\n");
0349
0350 netdev->stats.rx_length_errors++;
0351 error = true;
0352 } else if (unlikely(ftmac100_rxdes_odd_nibble(rxdes))) {
0353 if (net_ratelimit())
0354 netdev_info(netdev, "rx odd nibble\n");
0355
0356 netdev->stats.rx_length_errors++;
0357 error = true;
0358 }
0359
0360 return error;
0361 }
0362
0363 static void ftmac100_rx_drop_packet(struct ftmac100 *priv)
0364 {
0365 struct net_device *netdev = priv->netdev;
0366 struct ftmac100_rxdes *rxdes = ftmac100_current_rxdes(priv);
0367 bool done = false;
0368
0369 if (net_ratelimit())
0370 netdev_dbg(netdev, "drop packet %p\n", rxdes);
0371
0372 do {
0373 if (ftmac100_rxdes_last_segment(rxdes))
0374 done = true;
0375
0376 ftmac100_rxdes_set_dma_own(rxdes);
0377 ftmac100_rx_pointer_advance(priv);
0378 rxdes = ftmac100_current_rxdes(priv);
0379 } while (!done && !ftmac100_rxdes_owned_by_dma(rxdes));
0380
0381 netdev->stats.rx_dropped++;
0382 }
0383
0384 static bool ftmac100_rx_packet(struct ftmac100 *priv, int *processed)
0385 {
0386 struct net_device *netdev = priv->netdev;
0387 struct ftmac100_rxdes *rxdes;
0388 struct sk_buff *skb;
0389 struct page *page;
0390 dma_addr_t map;
0391 int length;
0392 bool ret;
0393
0394 rxdes = ftmac100_rx_locate_first_segment(priv);
0395 if (!rxdes)
0396 return false;
0397
0398 if (unlikely(ftmac100_rx_packet_error(priv, rxdes))) {
0399 ftmac100_rx_drop_packet(priv);
0400 return true;
0401 }
0402
0403
0404
0405
0406
0407 ret = ftmac100_rxdes_last_segment(rxdes);
0408 BUG_ON(!ret);
0409
0410
0411 skb = netdev_alloc_skb_ip_align(netdev, 128);
0412 if (unlikely(!skb)) {
0413 if (net_ratelimit())
0414 netdev_err(netdev, "rx skb alloc failed\n");
0415
0416 ftmac100_rx_drop_packet(priv);
0417 return true;
0418 }
0419
0420 if (unlikely(ftmac100_rxdes_multicast(rxdes)))
0421 netdev->stats.multicast++;
0422
0423 map = ftmac100_rxdes_get_dma_addr(rxdes);
0424 dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
0425
0426 length = ftmac100_rxdes_frame_length(rxdes);
0427 page = ftmac100_rxdes_get_page(rxdes);
0428 skb_fill_page_desc(skb, 0, page, 0, length);
0429 skb->len += length;
0430 skb->data_len += length;
0431
0432 if (length > 128) {
0433 skb->truesize += PAGE_SIZE;
0434
0435 __pskb_pull_tail(skb, ETH_HLEN);
0436 } else {
0437
0438 __pskb_pull_tail(skb, length);
0439 }
0440 ftmac100_alloc_rx_page(priv, rxdes, GFP_ATOMIC);
0441
0442 ftmac100_rx_pointer_advance(priv);
0443
0444 skb->protocol = eth_type_trans(skb, netdev);
0445
0446 netdev->stats.rx_packets++;
0447 netdev->stats.rx_bytes += skb->len;
0448
0449
0450 netif_receive_skb(skb);
0451
0452 (*processed)++;
0453 return true;
0454 }
0455
0456
0457
0458
0459 static void ftmac100_txdes_reset(struct ftmac100_txdes *txdes)
0460 {
0461
0462 txdes->txdes0 = 0;
0463 txdes->txdes1 &= cpu_to_le32(FTMAC100_TXDES1_EDOTR);
0464 txdes->txdes2 = 0;
0465 txdes->txdes3 = 0;
0466 }
0467
0468 static bool ftmac100_txdes_owned_by_dma(struct ftmac100_txdes *txdes)
0469 {
0470 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXDMA_OWN);
0471 }
0472
0473 static void ftmac100_txdes_set_dma_own(struct ftmac100_txdes *txdes)
0474 {
0475
0476
0477
0478
0479 wmb();
0480 txdes->txdes0 |= cpu_to_le32(FTMAC100_TXDES0_TXDMA_OWN);
0481 }
0482
0483 static bool ftmac100_txdes_excessive_collision(struct ftmac100_txdes *txdes)
0484 {
0485 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXPKT_EXSCOL);
0486 }
0487
0488 static bool ftmac100_txdes_late_collision(struct ftmac100_txdes *txdes)
0489 {
0490 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXPKT_LATECOL);
0491 }
0492
0493 static void ftmac100_txdes_set_end_of_ring(struct ftmac100_txdes *txdes)
0494 {
0495 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_EDOTR);
0496 }
0497
0498 static void ftmac100_txdes_set_first_segment(struct ftmac100_txdes *txdes)
0499 {
0500 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_FTS);
0501 }
0502
0503 static void ftmac100_txdes_set_last_segment(struct ftmac100_txdes *txdes)
0504 {
0505 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_LTS);
0506 }
0507
0508 static void ftmac100_txdes_set_txint(struct ftmac100_txdes *txdes)
0509 {
0510 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_TXIC);
0511 }
0512
0513 static void ftmac100_txdes_set_buffer_size(struct ftmac100_txdes *txdes,
0514 unsigned int len)
0515 {
0516 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_TXBUF_SIZE(len));
0517 }
0518
0519 static void ftmac100_txdes_set_dma_addr(struct ftmac100_txdes *txdes,
0520 dma_addr_t addr)
0521 {
0522 txdes->txdes2 = cpu_to_le32(addr);
0523 }
0524
0525 static dma_addr_t ftmac100_txdes_get_dma_addr(struct ftmac100_txdes *txdes)
0526 {
0527 return le32_to_cpu(txdes->txdes2);
0528 }
0529
0530
0531
0532
0533
0534 static void ftmac100_txdes_set_skb(struct ftmac100_txdes *txdes, struct sk_buff *skb)
0535 {
0536 txdes->txdes3 = (unsigned int)skb;
0537 }
0538
0539 static struct sk_buff *ftmac100_txdes_get_skb(struct ftmac100_txdes *txdes)
0540 {
0541 return (struct sk_buff *)txdes->txdes3;
0542 }
0543
0544
0545
0546
0547 static int ftmac100_next_tx_pointer(int pointer)
0548 {
0549 return (pointer + 1) & (TX_QUEUE_ENTRIES - 1);
0550 }
0551
0552 static void ftmac100_tx_pointer_advance(struct ftmac100 *priv)
0553 {
0554 priv->tx_pointer = ftmac100_next_tx_pointer(priv->tx_pointer);
0555 }
0556
0557 static void ftmac100_tx_clean_pointer_advance(struct ftmac100 *priv)
0558 {
0559 priv->tx_clean_pointer = ftmac100_next_tx_pointer(priv->tx_clean_pointer);
0560 }
0561
0562 static struct ftmac100_txdes *ftmac100_current_txdes(struct ftmac100 *priv)
0563 {
0564 return &priv->descs->txdes[priv->tx_pointer];
0565 }
0566
0567 static struct ftmac100_txdes *ftmac100_current_clean_txdes(struct ftmac100 *priv)
0568 {
0569 return &priv->descs->txdes[priv->tx_clean_pointer];
0570 }
0571
0572 static bool ftmac100_tx_complete_packet(struct ftmac100 *priv)
0573 {
0574 struct net_device *netdev = priv->netdev;
0575 struct ftmac100_txdes *txdes;
0576 struct sk_buff *skb;
0577 dma_addr_t map;
0578
0579 if (priv->tx_pending == 0)
0580 return false;
0581
0582 txdes = ftmac100_current_clean_txdes(priv);
0583
0584 if (ftmac100_txdes_owned_by_dma(txdes))
0585 return false;
0586
0587 skb = ftmac100_txdes_get_skb(txdes);
0588 map = ftmac100_txdes_get_dma_addr(txdes);
0589
0590 if (unlikely(ftmac100_txdes_excessive_collision(txdes) ||
0591 ftmac100_txdes_late_collision(txdes))) {
0592
0593
0594
0595
0596 netdev->stats.tx_aborted_errors++;
0597 } else {
0598 netdev->stats.tx_packets++;
0599 netdev->stats.tx_bytes += skb->len;
0600 }
0601
0602 dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
0603 dev_kfree_skb(skb);
0604
0605 ftmac100_txdes_reset(txdes);
0606
0607 ftmac100_tx_clean_pointer_advance(priv);
0608
0609 spin_lock(&priv->tx_lock);
0610 priv->tx_pending--;
0611 spin_unlock(&priv->tx_lock);
0612 netif_wake_queue(netdev);
0613
0614 return true;
0615 }
0616
0617 static void ftmac100_tx_complete(struct ftmac100 *priv)
0618 {
0619 while (ftmac100_tx_complete_packet(priv))
0620 ;
0621 }
0622
0623 static netdev_tx_t ftmac100_xmit(struct ftmac100 *priv, struct sk_buff *skb,
0624 dma_addr_t map)
0625 {
0626 struct net_device *netdev = priv->netdev;
0627 struct ftmac100_txdes *txdes;
0628 unsigned int len = (skb->len < ETH_ZLEN) ? ETH_ZLEN : skb->len;
0629
0630 txdes = ftmac100_current_txdes(priv);
0631 ftmac100_tx_pointer_advance(priv);
0632
0633
0634 ftmac100_txdes_set_skb(txdes, skb);
0635 ftmac100_txdes_set_dma_addr(txdes, map);
0636
0637 ftmac100_txdes_set_first_segment(txdes);
0638 ftmac100_txdes_set_last_segment(txdes);
0639 ftmac100_txdes_set_txint(txdes);
0640 ftmac100_txdes_set_buffer_size(txdes, len);
0641
0642 spin_lock(&priv->tx_lock);
0643 priv->tx_pending++;
0644 if (priv->tx_pending == TX_QUEUE_ENTRIES)
0645 netif_stop_queue(netdev);
0646
0647
0648 ftmac100_txdes_set_dma_own(txdes);
0649 spin_unlock(&priv->tx_lock);
0650
0651 ftmac100_txdma_start_polling(priv);
0652 return NETDEV_TX_OK;
0653 }
0654
0655
0656
0657
0658 static int ftmac100_alloc_rx_page(struct ftmac100 *priv,
0659 struct ftmac100_rxdes *rxdes, gfp_t gfp)
0660 {
0661 struct net_device *netdev = priv->netdev;
0662 struct page *page;
0663 dma_addr_t map;
0664
0665 page = alloc_page(gfp);
0666 if (!page) {
0667 if (net_ratelimit())
0668 netdev_err(netdev, "failed to allocate rx page\n");
0669 return -ENOMEM;
0670 }
0671
0672 map = dma_map_page(priv->dev, page, 0, RX_BUF_SIZE, DMA_FROM_DEVICE);
0673 if (unlikely(dma_mapping_error(priv->dev, map))) {
0674 if (net_ratelimit())
0675 netdev_err(netdev, "failed to map rx page\n");
0676 __free_page(page);
0677 return -ENOMEM;
0678 }
0679
0680 ftmac100_rxdes_set_page(rxdes, page);
0681 ftmac100_rxdes_set_dma_addr(rxdes, map);
0682 ftmac100_rxdes_set_buffer_size(rxdes, RX_BUF_SIZE);
0683 ftmac100_rxdes_set_dma_own(rxdes);
0684 return 0;
0685 }
0686
0687 static void ftmac100_free_buffers(struct ftmac100 *priv)
0688 {
0689 int i;
0690
0691 for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
0692 struct ftmac100_rxdes *rxdes = &priv->descs->rxdes[i];
0693 struct page *page = ftmac100_rxdes_get_page(rxdes);
0694 dma_addr_t map = ftmac100_rxdes_get_dma_addr(rxdes);
0695
0696 if (!page)
0697 continue;
0698
0699 dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
0700 __free_page(page);
0701 }
0702
0703 for (i = 0; i < TX_QUEUE_ENTRIES; i++) {
0704 struct ftmac100_txdes *txdes = &priv->descs->txdes[i];
0705 struct sk_buff *skb = ftmac100_txdes_get_skb(txdes);
0706 dma_addr_t map = ftmac100_txdes_get_dma_addr(txdes);
0707
0708 if (!skb)
0709 continue;
0710
0711 dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
0712 dev_kfree_skb(skb);
0713 }
0714
0715 dma_free_coherent(priv->dev, sizeof(struct ftmac100_descs),
0716 priv->descs, priv->descs_dma_addr);
0717 }
0718
0719 static int ftmac100_alloc_buffers(struct ftmac100 *priv)
0720 {
0721 int i;
0722
0723 priv->descs = dma_alloc_coherent(priv->dev,
0724 sizeof(struct ftmac100_descs),
0725 &priv->descs_dma_addr, GFP_KERNEL);
0726 if (!priv->descs)
0727 return -ENOMEM;
0728
0729
0730 ftmac100_rxdes_set_end_of_ring(&priv->descs->rxdes[RX_QUEUE_ENTRIES - 1]);
0731
0732 for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
0733 struct ftmac100_rxdes *rxdes = &priv->descs->rxdes[i];
0734
0735 if (ftmac100_alloc_rx_page(priv, rxdes, GFP_KERNEL))
0736 goto err;
0737 }
0738
0739
0740 ftmac100_txdes_set_end_of_ring(&priv->descs->txdes[TX_QUEUE_ENTRIES - 1]);
0741 return 0;
0742
0743 err:
0744 ftmac100_free_buffers(priv);
0745 return -ENOMEM;
0746 }
0747
0748
0749
0750
0751 static int ftmac100_mdio_read(struct net_device *netdev, int phy_id, int reg)
0752 {
0753 struct ftmac100 *priv = netdev_priv(netdev);
0754 unsigned int phycr;
0755 int i;
0756
0757 phycr = FTMAC100_PHYCR_PHYAD(phy_id) |
0758 FTMAC100_PHYCR_REGAD(reg) |
0759 FTMAC100_PHYCR_MIIRD;
0760
0761 iowrite32(phycr, priv->base + FTMAC100_OFFSET_PHYCR);
0762
0763 for (i = 0; i < 10; i++) {
0764 phycr = ioread32(priv->base + FTMAC100_OFFSET_PHYCR);
0765
0766 if ((phycr & FTMAC100_PHYCR_MIIRD) == 0)
0767 return phycr & FTMAC100_PHYCR_MIIRDATA;
0768
0769 udelay(100);
0770 }
0771
0772 netdev_err(netdev, "mdio read timed out\n");
0773 return 0;
0774 }
0775
0776 static void ftmac100_mdio_write(struct net_device *netdev, int phy_id, int reg,
0777 int data)
0778 {
0779 struct ftmac100 *priv = netdev_priv(netdev);
0780 unsigned int phycr;
0781 int i;
0782
0783 phycr = FTMAC100_PHYCR_PHYAD(phy_id) |
0784 FTMAC100_PHYCR_REGAD(reg) |
0785 FTMAC100_PHYCR_MIIWR;
0786
0787 data = FTMAC100_PHYWDATA_MIIWDATA(data);
0788
0789 iowrite32(data, priv->base + FTMAC100_OFFSET_PHYWDATA);
0790 iowrite32(phycr, priv->base + FTMAC100_OFFSET_PHYCR);
0791
0792 for (i = 0; i < 10; i++) {
0793 phycr = ioread32(priv->base + FTMAC100_OFFSET_PHYCR);
0794
0795 if ((phycr & FTMAC100_PHYCR_MIIWR) == 0)
0796 return;
0797
0798 udelay(100);
0799 }
0800
0801 netdev_err(netdev, "mdio write timed out\n");
0802 }
0803
0804
0805
0806
0807 static void ftmac100_get_drvinfo(struct net_device *netdev,
0808 struct ethtool_drvinfo *info)
0809 {
0810 strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
0811 strlcpy(info->bus_info, dev_name(&netdev->dev), sizeof(info->bus_info));
0812 }
0813
0814 static int ftmac100_get_link_ksettings(struct net_device *netdev,
0815 struct ethtool_link_ksettings *cmd)
0816 {
0817 struct ftmac100 *priv = netdev_priv(netdev);
0818
0819 mii_ethtool_get_link_ksettings(&priv->mii, cmd);
0820
0821 return 0;
0822 }
0823
0824 static int ftmac100_set_link_ksettings(struct net_device *netdev,
0825 const struct ethtool_link_ksettings *cmd)
0826 {
0827 struct ftmac100 *priv = netdev_priv(netdev);
0828 return mii_ethtool_set_link_ksettings(&priv->mii, cmd);
0829 }
0830
0831 static int ftmac100_nway_reset(struct net_device *netdev)
0832 {
0833 struct ftmac100 *priv = netdev_priv(netdev);
0834 return mii_nway_restart(&priv->mii);
0835 }
0836
0837 static u32 ftmac100_get_link(struct net_device *netdev)
0838 {
0839 struct ftmac100 *priv = netdev_priv(netdev);
0840 return mii_link_ok(&priv->mii);
0841 }
0842
0843 static const struct ethtool_ops ftmac100_ethtool_ops = {
0844 .get_drvinfo = ftmac100_get_drvinfo,
0845 .nway_reset = ftmac100_nway_reset,
0846 .get_link = ftmac100_get_link,
0847 .get_link_ksettings = ftmac100_get_link_ksettings,
0848 .set_link_ksettings = ftmac100_set_link_ksettings,
0849 };
0850
0851
0852
0853
0854 static irqreturn_t ftmac100_interrupt(int irq, void *dev_id)
0855 {
0856 struct net_device *netdev = dev_id;
0857 struct ftmac100 *priv = netdev_priv(netdev);
0858
0859
0860 ftmac100_disable_all_int(priv);
0861 if (likely(netif_running(netdev)))
0862 napi_schedule(&priv->napi);
0863
0864 return IRQ_HANDLED;
0865 }
0866
0867
0868
0869
0870 static int ftmac100_poll(struct napi_struct *napi, int budget)
0871 {
0872 struct ftmac100 *priv = container_of(napi, struct ftmac100, napi);
0873 struct net_device *netdev = priv->netdev;
0874 unsigned int status;
0875 bool completed = true;
0876 int rx = 0;
0877
0878 status = ioread32(priv->base + FTMAC100_OFFSET_ISR);
0879
0880 if (status & (FTMAC100_INT_RPKT_FINISH | FTMAC100_INT_NORXBUF)) {
0881
0882
0883
0884
0885
0886
0887
0888 bool retry;
0889
0890 do {
0891 retry = ftmac100_rx_packet(priv, &rx);
0892 } while (retry && rx < budget);
0893
0894 if (retry && rx == budget)
0895 completed = false;
0896 }
0897
0898 if (status & (FTMAC100_INT_XPKT_OK | FTMAC100_INT_XPKT_LOST)) {
0899
0900
0901
0902
0903
0904
0905
0906
0907 ftmac100_tx_complete(priv);
0908 }
0909
0910 if (status & (FTMAC100_INT_NORXBUF | FTMAC100_INT_RPKT_LOST |
0911 FTMAC100_INT_AHB_ERR | FTMAC100_INT_PHYSTS_CHG)) {
0912 if (net_ratelimit())
0913 netdev_info(netdev, "[ISR] = 0x%x: %s%s%s%s\n", status,
0914 status & FTMAC100_INT_NORXBUF ? "NORXBUF " : "",
0915 status & FTMAC100_INT_RPKT_LOST ? "RPKT_LOST " : "",
0916 status & FTMAC100_INT_AHB_ERR ? "AHB_ERR " : "",
0917 status & FTMAC100_INT_PHYSTS_CHG ? "PHYSTS_CHG" : "");
0918
0919 if (status & FTMAC100_INT_NORXBUF) {
0920
0921 netdev->stats.rx_over_errors++;
0922 }
0923
0924 if (status & FTMAC100_INT_RPKT_LOST) {
0925
0926 netdev->stats.rx_fifo_errors++;
0927 }
0928
0929 if (status & FTMAC100_INT_PHYSTS_CHG) {
0930
0931 mii_check_link(&priv->mii);
0932 }
0933 }
0934
0935 if (completed) {
0936
0937 napi_complete(napi);
0938 ftmac100_enable_all_int(priv);
0939 }
0940
0941 return rx;
0942 }
0943
0944
0945
0946
0947 static int ftmac100_open(struct net_device *netdev)
0948 {
0949 struct ftmac100 *priv = netdev_priv(netdev);
0950 int err;
0951
0952 err = ftmac100_alloc_buffers(priv);
0953 if (err) {
0954 netdev_err(netdev, "failed to allocate buffers\n");
0955 goto err_alloc;
0956 }
0957
0958 err = request_irq(priv->irq, ftmac100_interrupt, 0, netdev->name, netdev);
0959 if (err) {
0960 netdev_err(netdev, "failed to request irq %d\n", priv->irq);
0961 goto err_irq;
0962 }
0963
0964 priv->rx_pointer = 0;
0965 priv->tx_clean_pointer = 0;
0966 priv->tx_pointer = 0;
0967 priv->tx_pending = 0;
0968
0969 err = ftmac100_start_hw(priv);
0970 if (err)
0971 goto err_hw;
0972
0973 napi_enable(&priv->napi);
0974 netif_start_queue(netdev);
0975
0976 ftmac100_enable_all_int(priv);
0977
0978 return 0;
0979
0980 err_hw:
0981 free_irq(priv->irq, netdev);
0982 err_irq:
0983 ftmac100_free_buffers(priv);
0984 err_alloc:
0985 return err;
0986 }
0987
0988 static int ftmac100_stop(struct net_device *netdev)
0989 {
0990 struct ftmac100 *priv = netdev_priv(netdev);
0991
0992 ftmac100_disable_all_int(priv);
0993 netif_stop_queue(netdev);
0994 napi_disable(&priv->napi);
0995 ftmac100_stop_hw(priv);
0996 free_irq(priv->irq, netdev);
0997 ftmac100_free_buffers(priv);
0998
0999 return 0;
1000 }
1001
1002 static netdev_tx_t
1003 ftmac100_hard_start_xmit(struct sk_buff *skb, struct net_device *netdev)
1004 {
1005 struct ftmac100 *priv = netdev_priv(netdev);
1006 dma_addr_t map;
1007
1008 if (unlikely(skb->len > MAX_PKT_SIZE)) {
1009 if (net_ratelimit())
1010 netdev_dbg(netdev, "tx packet too big\n");
1011
1012 netdev->stats.tx_dropped++;
1013 dev_kfree_skb(skb);
1014 return NETDEV_TX_OK;
1015 }
1016
1017 map = dma_map_single(priv->dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE);
1018 if (unlikely(dma_mapping_error(priv->dev, map))) {
1019
1020 if (net_ratelimit())
1021 netdev_err(netdev, "map socket buffer failed\n");
1022
1023 netdev->stats.tx_dropped++;
1024 dev_kfree_skb(skb);
1025 return NETDEV_TX_OK;
1026 }
1027
1028 return ftmac100_xmit(priv, skb, map);
1029 }
1030
1031
1032 static int ftmac100_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1033 {
1034 struct ftmac100 *priv = netdev_priv(netdev);
1035 struct mii_ioctl_data *data = if_mii(ifr);
1036
1037 return generic_mii_ioctl(&priv->mii, data, cmd, NULL);
1038 }
1039
1040 static const struct net_device_ops ftmac100_netdev_ops = {
1041 .ndo_open = ftmac100_open,
1042 .ndo_stop = ftmac100_stop,
1043 .ndo_start_xmit = ftmac100_hard_start_xmit,
1044 .ndo_set_mac_address = eth_mac_addr,
1045 .ndo_validate_addr = eth_validate_addr,
1046 .ndo_eth_ioctl = ftmac100_do_ioctl,
1047 };
1048
1049
1050
1051
1052 static int ftmac100_probe(struct platform_device *pdev)
1053 {
1054 struct resource *res;
1055 int irq;
1056 struct net_device *netdev;
1057 struct ftmac100 *priv;
1058 int err;
1059
1060 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1061 if (!res)
1062 return -ENXIO;
1063
1064 irq = platform_get_irq(pdev, 0);
1065 if (irq < 0)
1066 return irq;
1067
1068
1069 netdev = alloc_etherdev(sizeof(*priv));
1070 if (!netdev) {
1071 err = -ENOMEM;
1072 goto err_alloc_etherdev;
1073 }
1074
1075 SET_NETDEV_DEV(netdev, &pdev->dev);
1076 netdev->ethtool_ops = &ftmac100_ethtool_ops;
1077 netdev->netdev_ops = &ftmac100_netdev_ops;
1078
1079 platform_set_drvdata(pdev, netdev);
1080
1081
1082 priv = netdev_priv(netdev);
1083 priv->netdev = netdev;
1084 priv->dev = &pdev->dev;
1085
1086 spin_lock_init(&priv->tx_lock);
1087
1088
1089 netif_napi_add(netdev, &priv->napi, ftmac100_poll, 64);
1090
1091
1092 priv->res = request_mem_region(res->start, resource_size(res),
1093 dev_name(&pdev->dev));
1094 if (!priv->res) {
1095 dev_err(&pdev->dev, "Could not reserve memory region\n");
1096 err = -ENOMEM;
1097 goto err_req_mem;
1098 }
1099
1100 priv->base = ioremap(res->start, resource_size(res));
1101 if (!priv->base) {
1102 dev_err(&pdev->dev, "Failed to ioremap ethernet registers\n");
1103 err = -EIO;
1104 goto err_ioremap;
1105 }
1106
1107 priv->irq = irq;
1108
1109
1110 priv->mii.phy_id = 0;
1111 priv->mii.phy_id_mask = 0x1f;
1112 priv->mii.reg_num_mask = 0x1f;
1113 priv->mii.dev = netdev;
1114 priv->mii.mdio_read = ftmac100_mdio_read;
1115 priv->mii.mdio_write = ftmac100_mdio_write;
1116
1117
1118 err = register_netdev(netdev);
1119 if (err) {
1120 dev_err(&pdev->dev, "Failed to register netdev\n");
1121 goto err_register_netdev;
1122 }
1123
1124 netdev_info(netdev, "irq %d, mapped at %p\n", priv->irq, priv->base);
1125
1126 if (!is_valid_ether_addr(netdev->dev_addr)) {
1127 eth_hw_addr_random(netdev);
1128 netdev_info(netdev, "generated random MAC address %pM\n",
1129 netdev->dev_addr);
1130 }
1131
1132 return 0;
1133
1134 err_register_netdev:
1135 iounmap(priv->base);
1136 err_ioremap:
1137 release_resource(priv->res);
1138 err_req_mem:
1139 netif_napi_del(&priv->napi);
1140 free_netdev(netdev);
1141 err_alloc_etherdev:
1142 return err;
1143 }
1144
1145 static int ftmac100_remove(struct platform_device *pdev)
1146 {
1147 struct net_device *netdev;
1148 struct ftmac100 *priv;
1149
1150 netdev = platform_get_drvdata(pdev);
1151 priv = netdev_priv(netdev);
1152
1153 unregister_netdev(netdev);
1154
1155 iounmap(priv->base);
1156 release_resource(priv->res);
1157
1158 netif_napi_del(&priv->napi);
1159 free_netdev(netdev);
1160 return 0;
1161 }
1162
1163 static const struct of_device_id ftmac100_of_ids[] = {
1164 { .compatible = "andestech,atmac100" },
1165 { }
1166 };
1167
1168 static struct platform_driver ftmac100_driver = {
1169 .probe = ftmac100_probe,
1170 .remove = ftmac100_remove,
1171 .driver = {
1172 .name = DRV_NAME,
1173 .of_match_table = ftmac100_of_ids
1174 },
1175 };
1176
1177
1178
1179
1180 module_platform_driver(ftmac100_driver);
1181
1182 MODULE_AUTHOR("Po-Yu Chuang <ratbert@faraday-tech.com>");
1183 MODULE_DESCRIPTION("FTMAC100 driver");
1184 MODULE_LICENSE("GPL");
1185 MODULE_DEVICE_TABLE(of, ftmac100_of_ids);