Back to home page

OSCL-LXR
 
 

     

0001 /*
0002  * xircom_cb: A driver for the (tulip-like) Xircom Cardbus ethernet cards
0003  *
0004  * This software is (C) by the respective authors, and licensed under the GPL
0005  * License.
0006  *
0007  * Written by Arjan van de Ven for Red Hat, Inc.
0008  * Based on work by Jeff Garzik, Doug Ledford and Donald Becker
0009  *
0010  *      This software may be used and distributed according to the terms
0011  *      of the GNU General Public License, incorporated herein by reference.
0012  *
0013  *
0014  *  $Id: xircom_cb.c,v 1.33 2001/03/19 14:02:07 arjanv Exp $
0015  */
0016 
0017 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
0018 
0019 #include <linux/module.h>
0020 #include <linux/kernel.h>
0021 #include <linux/string.h>
0022 #include <linux/errno.h>
0023 #include <linux/ioport.h>
0024 #include <linux/slab.h>
0025 #include <linux/interrupt.h>
0026 #include <linux/pci.h>
0027 #include <linux/netdevice.h>
0028 #include <linux/etherdevice.h>
0029 #include <linux/skbuff.h>
0030 #include <linux/delay.h>
0031 #include <linux/bitops.h>
0032 
0033 #include <linux/uaccess.h>
0034 #include <asm/io.h>
0035 #ifdef CONFIG_NET_POLL_CONTROLLER
0036 #include <asm/irq.h>
0037 #endif
0038 
0039 MODULE_DESCRIPTION("Xircom Cardbus ethernet driver");
0040 MODULE_AUTHOR("Arjan van de Ven <arjanv@redhat.com>");
0041 MODULE_LICENSE("GPL");
0042 
0043 #define xw32(reg, val)  iowrite32(val, ioaddr + (reg))
0044 #define xr32(reg)   ioread32(ioaddr + (reg))
0045 #define xr8(reg)    ioread8(ioaddr + (reg))
0046 
0047 /* IO registers on the card, offsets */
0048 #define CSR0    0x00
0049 #define CSR1    0x08
0050 #define CSR2    0x10
0051 #define CSR3    0x18
0052 #define CSR4    0x20
0053 #define CSR5    0x28
0054 #define CSR6    0x30
0055 #define CSR7    0x38
0056 #define CSR8    0x40
0057 #define CSR9    0x48
0058 #define CSR10   0x50
0059 #define CSR11   0x58
0060 #define CSR12   0x60
0061 #define CSR13   0x68
0062 #define CSR14   0x70
0063 #define CSR15   0x78
0064 #define CSR16   0x80
0065 
0066 /* PCI registers */
0067 #define PCI_POWERMGMT   0x40
0068 
0069 /* Offsets of the buffers within the descriptor pages, in bytes */
0070 
0071 #define NUMDESCRIPTORS 4
0072 
0073 static int bufferoffsets[NUMDESCRIPTORS] = {128,2048,4096,6144};
0074 
0075 
0076 struct xircom_private {
0077     /* Send and receive buffers, kernel-addressable and dma addressable forms */
0078 
0079     __le32 *rx_buffer;
0080     __le32 *tx_buffer;
0081 
0082     dma_addr_t rx_dma_handle;
0083     dma_addr_t tx_dma_handle;
0084 
0085     struct sk_buff *tx_skb[4];
0086 
0087     void __iomem *ioaddr;
0088     int open;
0089 
0090     /* transmit_used is the rotating counter that indicates which transmit
0091        descriptor has to be used next */
0092     int transmit_used;
0093 
0094     /* Spinlock to serialize register operations.
0095        It must be helt while manipulating the following registers:
0096        CSR0, CSR6, CSR7, CSR9, CSR10, CSR15
0097      */
0098     spinlock_t lock;
0099 
0100     struct pci_dev *pdev;
0101     struct net_device *dev;
0102 };
0103 
0104 
0105 /* Function prototypes */
0106 static int xircom_probe(struct pci_dev *pdev, const struct pci_device_id *id);
0107 static void xircom_remove(struct pci_dev *pdev);
0108 static irqreturn_t xircom_interrupt(int irq, void *dev_instance);
0109 static netdev_tx_t xircom_start_xmit(struct sk_buff *skb,
0110                        struct net_device *dev);
0111 static int xircom_open(struct net_device *dev);
0112 static int xircom_close(struct net_device *dev);
0113 static void xircom_up(struct xircom_private *card);
0114 #ifdef CONFIG_NET_POLL_CONTROLLER
0115 static void xircom_poll_controller(struct net_device *dev);
0116 #endif
0117 
0118 static void investigate_read_descriptor(struct net_device *dev,struct xircom_private *card, int descnr, unsigned int bufferoffset);
0119 static void investigate_write_descriptor(struct net_device *dev, struct xircom_private *card, int descnr, unsigned int bufferoffset);
0120 static void read_mac_address(struct xircom_private *card);
0121 static void transceiver_voodoo(struct xircom_private *card);
0122 static void initialize_card(struct xircom_private *card);
0123 static void trigger_transmit(struct xircom_private *card);
0124 static void trigger_receive(struct xircom_private *card);
0125 static void setup_descriptors(struct xircom_private *card);
0126 static void remove_descriptors(struct xircom_private *card);
0127 static int link_status_changed(struct xircom_private *card);
0128 static void activate_receiver(struct xircom_private *card);
0129 static void deactivate_receiver(struct xircom_private *card);
0130 static void activate_transmitter(struct xircom_private *card);
0131 static void deactivate_transmitter(struct xircom_private *card);
0132 static void enable_transmit_interrupt(struct xircom_private *card);
0133 static void enable_receive_interrupt(struct xircom_private *card);
0134 static void enable_link_interrupt(struct xircom_private *card);
0135 static void disable_all_interrupts(struct xircom_private *card);
0136 static int link_status(struct xircom_private *card);
0137 
0138 
0139 
0140 static const struct pci_device_id xircom_pci_table[] = {
0141     { PCI_VDEVICE(XIRCOM, 0x0003), },
0142     {0,},
0143 };
0144 MODULE_DEVICE_TABLE(pci, xircom_pci_table);
0145 
0146 static struct pci_driver xircom_ops = {
0147     .name       = "xircom_cb",
0148     .id_table   = xircom_pci_table,
0149     .probe      = xircom_probe,
0150     .remove     = xircom_remove,
0151 };
0152 
0153 
0154 #if defined DEBUG && DEBUG > 1
0155 static void print_binary(unsigned int number)
0156 {
0157     int i,i2;
0158     char buffer[64];
0159     memset(buffer,0,64);
0160     i2=0;
0161     for (i=31;i>=0;i--) {
0162         if (number & (1<<i))
0163             buffer[i2++]='1';
0164         else
0165             buffer[i2++]='0';
0166         if ((i&3)==0)
0167             buffer[i2++]=' ';
0168     }
0169     pr_debug("%s\n",buffer);
0170 }
0171 #endif
0172 
0173 static const struct net_device_ops netdev_ops = {
0174     .ndo_open       = xircom_open,
0175     .ndo_stop       = xircom_close,
0176     .ndo_start_xmit     = xircom_start_xmit,
0177     .ndo_set_mac_address    = eth_mac_addr,
0178     .ndo_validate_addr  = eth_validate_addr,
0179 #ifdef CONFIG_NET_POLL_CONTROLLER
0180     .ndo_poll_controller    = xircom_poll_controller,
0181 #endif
0182 };
0183 
0184 /* xircom_probe is the code that gets called on device insertion.
0185    it sets up the hardware and registers the device to the networklayer.
0186 
0187    TODO: Send 1 or 2 "dummy" packets here as the card seems to discard the
0188          first two packets that get send, and pump hates that.
0189 
0190  */
0191 static int xircom_probe(struct pci_dev *pdev, const struct pci_device_id *id)
0192 {
0193     struct device *d = &pdev->dev;
0194     struct net_device *dev = NULL;
0195     struct xircom_private *private;
0196     unsigned long flags;
0197     unsigned short tmp16;
0198     int rc;
0199 
0200     /* First do the PCI initialisation */
0201 
0202     rc = pci_enable_device(pdev);
0203     if (rc < 0)
0204         goto out;
0205 
0206     /* disable all powermanagement */
0207     pci_write_config_dword(pdev, PCI_POWERMGMT, 0x0000);
0208 
0209     pci_set_master(pdev); /* Why isn't this done by pci_enable_device ?*/
0210 
0211     /* clear PCI status, if any */
0212     pci_read_config_word (pdev,PCI_STATUS, &tmp16);
0213     pci_write_config_word (pdev, PCI_STATUS,tmp16);
0214 
0215     rc = pci_request_regions(pdev, "xircom_cb");
0216     if (rc < 0) {
0217         pr_err("%s: failed to allocate io-region\n", __func__);
0218         goto err_disable;
0219     }
0220 
0221     rc = -ENOMEM;
0222     /*
0223        Before changing the hardware, allocate the memory.
0224        This way, we can fail gracefully if not enough memory
0225        is available.
0226      */
0227     dev = alloc_etherdev(sizeof(struct xircom_private));
0228     if (!dev)
0229         goto err_release;
0230 
0231     private = netdev_priv(dev);
0232 
0233     /* Allocate the send/receive buffers */
0234     private->rx_buffer = dma_alloc_coherent(d, 8192,
0235                         &private->rx_dma_handle,
0236                         GFP_KERNEL);
0237     if (private->rx_buffer == NULL)
0238         goto rx_buf_fail;
0239 
0240     private->tx_buffer = dma_alloc_coherent(d, 8192,
0241                         &private->tx_dma_handle,
0242                         GFP_KERNEL);
0243     if (private->tx_buffer == NULL)
0244         goto tx_buf_fail;
0245 
0246     SET_NETDEV_DEV(dev, &pdev->dev);
0247 
0248 
0249     private->dev = dev;
0250     private->pdev = pdev;
0251 
0252     /* IO range. */
0253     private->ioaddr = pci_iomap(pdev, 0, 0);
0254     if (!private->ioaddr)
0255         goto reg_fail;
0256 
0257     spin_lock_init(&private->lock);
0258 
0259     initialize_card(private);
0260     read_mac_address(private);
0261     setup_descriptors(private);
0262 
0263     dev->netdev_ops = &netdev_ops;
0264     pci_set_drvdata(pdev, dev);
0265 
0266     rc = register_netdev(dev);
0267     if (rc < 0) {
0268         pr_err("%s: netdevice registration failed\n", __func__);
0269         goto err_unmap;
0270     }
0271 
0272     netdev_info(dev, "Xircom cardbus revision %i at irq %i\n",
0273             pdev->revision, pdev->irq);
0274     /* start the transmitter to get a heartbeat */
0275     /* TODO: send 2 dummy packets here */
0276     transceiver_voodoo(private);
0277 
0278     spin_lock_irqsave(&private->lock,flags);
0279     activate_transmitter(private);
0280     activate_receiver(private);
0281     spin_unlock_irqrestore(&private->lock,flags);
0282 
0283     trigger_receive(private);
0284 out:
0285     return rc;
0286 
0287 err_unmap:
0288     pci_iounmap(pdev, private->ioaddr);
0289 reg_fail:
0290     dma_free_coherent(d, 8192, private->tx_buffer, private->tx_dma_handle);
0291 tx_buf_fail:
0292     dma_free_coherent(d, 8192, private->rx_buffer, private->rx_dma_handle);
0293 rx_buf_fail:
0294     free_netdev(dev);
0295 err_release:
0296     pci_release_regions(pdev);
0297 err_disable:
0298     pci_disable_device(pdev);
0299     goto out;
0300 }
0301 
0302 
0303 /*
0304  xircom_remove is called on module-unload or on device-eject.
0305  it unregisters the irq, io-region and network device.
0306  Interrupts and such are already stopped in the "ifconfig ethX down"
0307  code.
0308  */
0309 static void xircom_remove(struct pci_dev *pdev)
0310 {
0311     struct net_device *dev = pci_get_drvdata(pdev);
0312     struct xircom_private *card = netdev_priv(dev);
0313     struct device *d = &pdev->dev;
0314 
0315     unregister_netdev(dev);
0316     pci_iounmap(pdev, card->ioaddr);
0317     dma_free_coherent(d, 8192, card->tx_buffer, card->tx_dma_handle);
0318     dma_free_coherent(d, 8192, card->rx_buffer, card->rx_dma_handle);
0319     free_netdev(dev);
0320     pci_release_regions(pdev);
0321     pci_disable_device(pdev);
0322 }
0323 
0324 static irqreturn_t xircom_interrupt(int irq, void *dev_instance)
0325 {
0326     struct net_device *dev = (struct net_device *) dev_instance;
0327     struct xircom_private *card = netdev_priv(dev);
0328     void __iomem *ioaddr = card->ioaddr;
0329     unsigned int status;
0330     int i;
0331 
0332     spin_lock(&card->lock);
0333     status = xr32(CSR5);
0334 
0335 #if defined DEBUG && DEBUG > 1
0336     print_binary(status);
0337     pr_debug("tx status 0x%08x 0x%08x\n",
0338          card->tx_buffer[0], card->tx_buffer[4]);
0339     pr_debug("rx status 0x%08x 0x%08x\n",
0340          card->rx_buffer[0], card->rx_buffer[4]);
0341 #endif
0342     /* Handle shared irq and hotplug */
0343     if (status == 0 || status == 0xffffffff) {
0344         spin_unlock(&card->lock);
0345         return IRQ_NONE;
0346     }
0347 
0348     if (link_status_changed(card)) {
0349         int newlink;
0350         netdev_dbg(dev, "Link status has changed\n");
0351         newlink = link_status(card);
0352         netdev_info(dev, "Link is %d mbit\n", newlink);
0353         if (newlink)
0354             netif_carrier_on(dev);
0355         else
0356             netif_carrier_off(dev);
0357 
0358     }
0359 
0360     /* Clear all remaining interrupts */
0361     status |= 0xffffffff; /* FIXME: make this clear only the
0362                         real existing bits */
0363     xw32(CSR5, status);
0364 
0365 
0366     for (i=0;i<NUMDESCRIPTORS;i++)
0367         investigate_write_descriptor(dev,card,i,bufferoffsets[i]);
0368     for (i=0;i<NUMDESCRIPTORS;i++)
0369         investigate_read_descriptor(dev,card,i,bufferoffsets[i]);
0370 
0371     spin_unlock(&card->lock);
0372     return IRQ_HANDLED;
0373 }
0374 
0375 static netdev_tx_t xircom_start_xmit(struct sk_buff *skb,
0376                        struct net_device *dev)
0377 {
0378     struct xircom_private *card;
0379     unsigned long flags;
0380     int nextdescriptor;
0381     int desc;
0382 
0383     card = netdev_priv(dev);
0384     spin_lock_irqsave(&card->lock,flags);
0385 
0386     /* First see if we can free some descriptors */
0387     for (desc=0;desc<NUMDESCRIPTORS;desc++)
0388         investigate_write_descriptor(dev,card,desc,bufferoffsets[desc]);
0389 
0390 
0391     nextdescriptor = (card->transmit_used +1) % (NUMDESCRIPTORS);
0392     desc = card->transmit_used;
0393 
0394     /* only send the packet if the descriptor is free */
0395     if (card->tx_buffer[4*desc]==0) {
0396             /* Copy the packet data; zero the memory first as the card
0397                sometimes sends more than you ask it to. */
0398 
0399             memset(&card->tx_buffer[bufferoffsets[desc]/4],0,1536);
0400             skb_copy_from_linear_data(skb,
0401                   &(card->tx_buffer[bufferoffsets[desc] / 4]),
0402                           skb->len);
0403             /* FIXME: The specification tells us that the length we send HAS to be a multiple of
0404                4 bytes. */
0405 
0406             card->tx_buffer[4*desc+1] = cpu_to_le32(skb->len);
0407             if (desc == NUMDESCRIPTORS - 1) /* bit 25: last descriptor of the ring */
0408                 card->tx_buffer[4*desc+1] |= cpu_to_le32(1<<25);  
0409 
0410             card->tx_buffer[4*desc+1] |= cpu_to_le32(0xF0000000);
0411                          /* 0xF0... means want interrupts*/
0412             card->tx_skb[desc] = skb;
0413 
0414             wmb();
0415             /* This gives the descriptor to the card */
0416             card->tx_buffer[4*desc] = cpu_to_le32(0x80000000);
0417             trigger_transmit(card);
0418             if (card->tx_buffer[nextdescriptor*4] & cpu_to_le32(0x8000000)) {
0419                 /* next descriptor is occupied... */
0420                 netif_stop_queue(dev);
0421             }
0422             card->transmit_used = nextdescriptor;
0423             spin_unlock_irqrestore(&card->lock,flags);
0424             return NETDEV_TX_OK;
0425     }
0426 
0427     /* Uh oh... no free descriptor... drop the packet */
0428     netif_stop_queue(dev);
0429     spin_unlock_irqrestore(&card->lock,flags);
0430     trigger_transmit(card);
0431 
0432     return NETDEV_TX_BUSY;
0433 }
0434 
0435 
0436 
0437 
0438 static int xircom_open(struct net_device *dev)
0439 {
0440     struct xircom_private *xp = netdev_priv(dev);
0441     const int irq = xp->pdev->irq;
0442     int retval;
0443 
0444     netdev_info(dev, "xircom cardbus adaptor found, using irq %i\n", irq);
0445     retval = request_irq(irq, xircom_interrupt, IRQF_SHARED, dev->name, dev);
0446     if (retval)
0447         return retval;
0448 
0449     xircom_up(xp);
0450     xp->open = 1;
0451 
0452     return 0;
0453 }
0454 
0455 static int xircom_close(struct net_device *dev)
0456 {
0457     struct xircom_private *card;
0458     unsigned long flags;
0459 
0460     card = netdev_priv(dev);
0461     netif_stop_queue(dev); /* we don't want new packets */
0462 
0463 
0464     spin_lock_irqsave(&card->lock,flags);
0465 
0466     disable_all_interrupts(card);
0467 #if 0
0468     /* We can enable this again once we send dummy packets on ifconfig ethX up */
0469     deactivate_receiver(card);
0470     deactivate_transmitter(card);
0471 #endif
0472     remove_descriptors(card);
0473 
0474     spin_unlock_irqrestore(&card->lock,flags);
0475 
0476     card->open = 0;
0477     free_irq(card->pdev->irq, dev);
0478 
0479     return 0;
0480 
0481 }
0482 
0483 
0484 #ifdef CONFIG_NET_POLL_CONTROLLER
0485 static void xircom_poll_controller(struct net_device *dev)
0486 {
0487     struct xircom_private *xp = netdev_priv(dev);
0488     const int irq = xp->pdev->irq;
0489 
0490     disable_irq(irq);
0491     xircom_interrupt(irq, dev);
0492     enable_irq(irq);
0493 }
0494 #endif
0495 
0496 
0497 static void initialize_card(struct xircom_private *card)
0498 {
0499     void __iomem *ioaddr = card->ioaddr;
0500     unsigned long flags;
0501     u32 val;
0502 
0503     spin_lock_irqsave(&card->lock, flags);
0504 
0505     /* First: reset the card */
0506     val = xr32(CSR0);
0507     val |= 0x01;        /* Software reset */
0508     xw32(CSR0, val);
0509 
0510     udelay(100);        /* give the card some time to reset */
0511 
0512     val = xr32(CSR0);
0513     val &= ~0x01;       /* disable Software reset */
0514     xw32(CSR0, val);
0515 
0516 
0517     val = 0;        /* Value 0x00 is a safe and conservative value
0518                    for the PCI configuration settings */
0519     xw32(CSR0, val);
0520 
0521 
0522     disable_all_interrupts(card);
0523     deactivate_receiver(card);
0524     deactivate_transmitter(card);
0525 
0526     spin_unlock_irqrestore(&card->lock, flags);
0527 }
0528 
0529 /*
0530 trigger_transmit causes the card to check for frames to be transmitted.
0531 This is accomplished by writing to the CSR1 port. The documentation
0532 claims that the act of writing is sufficient and that the value is
0533 ignored; I chose zero.
0534 */
0535 static void trigger_transmit(struct xircom_private *card)
0536 {
0537     void __iomem *ioaddr = card->ioaddr;
0538 
0539     xw32(CSR1, 0);
0540 }
0541 
0542 /*
0543 trigger_receive causes the card to check for empty frames in the
0544 descriptor list in which packets can be received.
0545 This is accomplished by writing to the CSR2 port. The documentation
0546 claims that the act of writing is sufficient and that the value is
0547 ignored; I chose zero.
0548 */
0549 static void trigger_receive(struct xircom_private *card)
0550 {
0551     void __iomem *ioaddr = card->ioaddr;
0552 
0553     xw32(CSR2, 0);
0554 }
0555 
0556 /*
0557 setup_descriptors initializes the send and receive buffers to be valid
0558 descriptors and programs the addresses into the card.
0559 */
0560 static void setup_descriptors(struct xircom_private *card)
0561 {
0562     void __iomem *ioaddr = card->ioaddr;
0563     u32 address;
0564     int i;
0565 
0566     BUG_ON(card->rx_buffer == NULL);
0567     BUG_ON(card->tx_buffer == NULL);
0568 
0569     /* Receive descriptors */
0570     memset(card->rx_buffer, 0, 128);    /* clear the descriptors */
0571     for (i=0;i<NUMDESCRIPTORS;i++ ) {
0572 
0573         /* Rx Descr0: It's empty, let the card own it, no errors -> 0x80000000 */
0574         card->rx_buffer[i*4 + 0] = cpu_to_le32(0x80000000);
0575         /* Rx Descr1: buffer 1 is 1536 bytes, buffer 2 is 0 bytes */
0576         card->rx_buffer[i*4 + 1] = cpu_to_le32(1536);
0577         if (i == NUMDESCRIPTORS - 1) /* bit 25 is "last descriptor" */
0578             card->rx_buffer[i*4 + 1] |= cpu_to_le32(1 << 25);
0579 
0580         /* Rx Descr2: address of the buffer
0581            we store the buffer at the 2nd half of the page */
0582 
0583         address = card->rx_dma_handle;
0584         card->rx_buffer[i*4 + 2] = cpu_to_le32(address + bufferoffsets[i]);
0585         /* Rx Desc3: address of 2nd buffer -> 0 */
0586         card->rx_buffer[i*4 + 3] = 0;
0587     }
0588 
0589     wmb();
0590     /* Write the receive descriptor ring address to the card */
0591     address = card->rx_dma_handle;
0592     xw32(CSR3, address);    /* Receive descr list address */
0593 
0594 
0595     /* transmit descriptors */
0596     memset(card->tx_buffer, 0, 128);    /* clear the descriptors */
0597 
0598     for (i=0;i<NUMDESCRIPTORS;i++ ) {
0599         /* Tx Descr0: Empty, we own it, no errors -> 0x00000000 */
0600         card->tx_buffer[i*4 + 0] = 0x00000000;
0601         /* Tx Descr1: buffer 1 is 1536 bytes, buffer 2 is 0 bytes */
0602         card->tx_buffer[i*4 + 1] = cpu_to_le32(1536);
0603         if (i == NUMDESCRIPTORS - 1) /* bit 25 is "last descriptor" */
0604             card->tx_buffer[i*4 + 1] |= cpu_to_le32(1 << 25);
0605 
0606         /* Tx Descr2: address of the buffer
0607            we store the buffer at the 2nd half of the page */
0608         address = card->tx_dma_handle;
0609         card->tx_buffer[i*4 + 2] = cpu_to_le32(address + bufferoffsets[i]);
0610         /* Tx Desc3: address of 2nd buffer -> 0 */
0611         card->tx_buffer[i*4 + 3] = 0;
0612     }
0613 
0614     wmb();
0615     /* wite the transmit descriptor ring to the card */
0616     address = card->tx_dma_handle;
0617     xw32(CSR4, address);    /* xmit descr list address */
0618 }
0619 
0620 /*
0621 remove_descriptors informs the card the descriptors are no longer
0622 valid by setting the address in the card to 0x00.
0623 */
0624 static void remove_descriptors(struct xircom_private *card)
0625 {
0626     void __iomem *ioaddr = card->ioaddr;
0627     unsigned int val;
0628 
0629     val = 0;
0630     xw32(CSR3, val);    /* Receive descriptor address */
0631     xw32(CSR4, val);    /* Send descriptor address */
0632 }
0633 
0634 /*
0635 link_status_changed returns 1 if the card has indicated that
0636 the link status has changed. The new link status has to be read from CSR12.
0637 
0638 This function also clears the status-bit.
0639 */
0640 static int link_status_changed(struct xircom_private *card)
0641 {
0642     void __iomem *ioaddr = card->ioaddr;
0643     unsigned int val;
0644 
0645     val = xr32(CSR5);   /* Status register */
0646     if (!(val & (1 << 27))) /* no change */
0647         return 0;
0648 
0649     /* clear the event by writing a 1 to the bit in the
0650        status register. */
0651     val = (1 << 27);
0652     xw32(CSR5, val);
0653 
0654     return 1;
0655 }
0656 
0657 
0658 /*
0659 transmit_active returns 1 if the transmitter on the card is
0660 in a non-stopped state.
0661 */
0662 static int transmit_active(struct xircom_private *card)
0663 {
0664     void __iomem *ioaddr = card->ioaddr;
0665 
0666     if (!(xr32(CSR5) & (7 << 20)))  /* transmitter disabled */
0667         return 0;
0668 
0669     return 1;
0670 }
0671 
0672 /*
0673 receive_active returns 1 if the receiver on the card is
0674 in a non-stopped state.
0675 */
0676 static int receive_active(struct xircom_private *card)
0677 {
0678     void __iomem *ioaddr = card->ioaddr;
0679 
0680     if (!(xr32(CSR5) & (7 << 17)))  /* receiver disabled */
0681         return 0;
0682 
0683     return 1;
0684 }
0685 
0686 /*
0687 activate_receiver enables the receiver on the card.
0688 Before being allowed to active the receiver, the receiver
0689 must be completely de-activated. To achieve this,
0690 this code actually disables the receiver first; then it waits for the
0691 receiver to become inactive, then it activates the receiver and then
0692 it waits for the receiver to be active.
0693 
0694 must be called with the lock held and interrupts disabled.
0695 */
0696 static void activate_receiver(struct xircom_private *card)
0697 {
0698     void __iomem *ioaddr = card->ioaddr;
0699     unsigned int val;
0700     int counter;
0701 
0702     val = xr32(CSR6);   /* Operation mode */
0703 
0704     /* If the "active" bit is set and the receiver is already
0705        active, no need to do the expensive thing */
0706     if ((val&2) && (receive_active(card)))
0707         return;
0708 
0709 
0710     val = val & ~2;     /* disable the receiver */
0711     xw32(CSR6, val);
0712 
0713     counter = 10;
0714     while (counter > 0) {
0715         if (!receive_active(card))
0716             break;
0717         /* wait a while */
0718         udelay(50);
0719         counter--;
0720         if (counter <= 0)
0721             netdev_err(card->dev, "Receiver failed to deactivate\n");
0722     }
0723 
0724     /* enable the receiver */
0725     val = xr32(CSR6);   /* Operation mode */
0726     val = val | 2;      /* enable the receiver */
0727     xw32(CSR6, val);
0728 
0729     /* now wait for the card to activate again */
0730     counter = 10;
0731     while (counter > 0) {
0732         if (receive_active(card))
0733             break;
0734         /* wait a while */
0735         udelay(50);
0736         counter--;
0737         if (counter <= 0)
0738             netdev_err(card->dev,
0739                    "Receiver failed to re-activate\n");
0740     }
0741 }
0742 
0743 /*
0744 deactivate_receiver disables the receiver on the card.
0745 To achieve this this code disables the receiver first;
0746 then it waits for the receiver to become inactive.
0747 
0748 must be called with the lock held and interrupts disabled.
0749 */
0750 static void deactivate_receiver(struct xircom_private *card)
0751 {
0752     void __iomem *ioaddr = card->ioaddr;
0753     unsigned int val;
0754     int counter;
0755 
0756     val = xr32(CSR6);   /* Operation mode */
0757     val = val & ~2;     /* disable the receiver */
0758     xw32(CSR6, val);
0759 
0760     counter = 10;
0761     while (counter > 0) {
0762         if (!receive_active(card))
0763             break;
0764         /* wait a while */
0765         udelay(50);
0766         counter--;
0767         if (counter <= 0)
0768             netdev_err(card->dev, "Receiver failed to deactivate\n");
0769     }
0770 }
0771 
0772 
0773 /*
0774 activate_transmitter enables the transmitter on the card.
0775 Before being allowed to active the transmitter, the transmitter
0776 must be completely de-activated. To achieve this,
0777 this code actually disables the transmitter first; then it waits for the
0778 transmitter to become inactive, then it activates the transmitter and then
0779 it waits for the transmitter to be active again.
0780 
0781 must be called with the lock held and interrupts disabled.
0782 */
0783 static void activate_transmitter(struct xircom_private *card)
0784 {
0785     void __iomem *ioaddr = card->ioaddr;
0786     unsigned int val;
0787     int counter;
0788 
0789     val = xr32(CSR6);   /* Operation mode */
0790 
0791     /* If the "active" bit is set and the receiver is already
0792        active, no need to do the expensive thing */
0793     if ((val&(1<<13)) && (transmit_active(card)))
0794         return;
0795 
0796     val = val & ~(1 << 13); /* disable the transmitter */
0797     xw32(CSR6, val);
0798 
0799     counter = 10;
0800     while (counter > 0) {
0801         if (!transmit_active(card))
0802             break;
0803         /* wait a while */
0804         udelay(50);
0805         counter--;
0806         if (counter <= 0)
0807             netdev_err(card->dev,
0808                    "Transmitter failed to deactivate\n");
0809     }
0810 
0811     /* enable the transmitter */
0812     val = xr32(CSR6);   /* Operation mode */
0813     val = val | (1 << 13);  /* enable the transmitter */
0814     xw32(CSR6, val);
0815 
0816     /* now wait for the card to activate again */
0817     counter = 10;
0818     while (counter > 0) {
0819         if (transmit_active(card))
0820             break;
0821         /* wait a while */
0822         udelay(50);
0823         counter--;
0824         if (counter <= 0)
0825             netdev_err(card->dev,
0826                    "Transmitter failed to re-activate\n");
0827     }
0828 }
0829 
0830 /*
0831 deactivate_transmitter disables the transmitter on the card.
0832 To achieve this this code disables the transmitter first;
0833 then it waits for the transmitter to become inactive.
0834 
0835 must be called with the lock held and interrupts disabled.
0836 */
0837 static void deactivate_transmitter(struct xircom_private *card)
0838 {
0839     void __iomem *ioaddr = card->ioaddr;
0840     unsigned int val;
0841     int counter;
0842 
0843     val = xr32(CSR6);   /* Operation mode */
0844     val = val & ~2;     /* disable the transmitter */
0845     xw32(CSR6, val);
0846 
0847     counter = 20;
0848     while (counter > 0) {
0849         if (!transmit_active(card))
0850             break;
0851         /* wait a while */
0852         udelay(50);
0853         counter--;
0854         if (counter <= 0)
0855             netdev_err(card->dev,
0856                    "Transmitter failed to deactivate\n");
0857     }
0858 }
0859 
0860 
0861 /*
0862 enable_transmit_interrupt enables the transmit interrupt
0863 
0864 must be called with the lock held and interrupts disabled.
0865 */
0866 static void enable_transmit_interrupt(struct xircom_private *card)
0867 {
0868     void __iomem *ioaddr = card->ioaddr;
0869     unsigned int val;
0870 
0871     val = xr32(CSR7);   /* Interrupt enable register */
0872     val |= 1;       /* enable the transmit interrupt */
0873     xw32(CSR7, val);
0874 }
0875 
0876 
0877 /*
0878 enable_receive_interrupt enables the receive interrupt
0879 
0880 must be called with the lock held and interrupts disabled.
0881 */
0882 static void enable_receive_interrupt(struct xircom_private *card)
0883 {
0884     void __iomem *ioaddr = card->ioaddr;
0885     unsigned int val;
0886 
0887     val = xr32(CSR7);   /* Interrupt enable register */
0888     val = val | (1 << 6);   /* enable the receive interrupt */
0889     xw32(CSR7, val);
0890 }
0891 
0892 /*
0893 enable_link_interrupt enables the link status change interrupt
0894 
0895 must be called with the lock held and interrupts disabled.
0896 */
0897 static void enable_link_interrupt(struct xircom_private *card)
0898 {
0899     void __iomem *ioaddr = card->ioaddr;
0900     unsigned int val;
0901 
0902     val = xr32(CSR7);   /* Interrupt enable register */
0903     val = val | (1 << 27);  /* enable the link status chage interrupt */
0904     xw32(CSR7, val);
0905 }
0906 
0907 
0908 
0909 /*
0910 disable_all_interrupts disables all interrupts
0911 
0912 must be called with the lock held and interrupts disabled.
0913 */
0914 static void disable_all_interrupts(struct xircom_private *card)
0915 {
0916     void __iomem *ioaddr = card->ioaddr;
0917 
0918     xw32(CSR7, 0);
0919 }
0920 
0921 /*
0922 enable_common_interrupts enables several weird interrupts
0923 
0924 must be called with the lock held and interrupts disabled.
0925 */
0926 static void enable_common_interrupts(struct xircom_private *card)
0927 {
0928     void __iomem *ioaddr = card->ioaddr;
0929     unsigned int val;
0930 
0931     val = xr32(CSR7);   /* Interrupt enable register */
0932     val |= (1<<16); /* Normal Interrupt Summary */
0933     val |= (1<<15); /* Abnormal Interrupt Summary */
0934     val |= (1<<13); /* Fatal bus error */
0935     val |= (1<<8);  /* Receive Process Stopped */
0936     val |= (1<<7);  /* Receive Buffer Unavailable */
0937     val |= (1<<5);  /* Transmit Underflow */
0938     val |= (1<<2);  /* Transmit Buffer Unavailable */
0939     val |= (1<<1);  /* Transmit Process Stopped */
0940     xw32(CSR7, val);
0941 }
0942 
0943 /*
0944 enable_promisc starts promisc mode
0945 
0946 must be called with the lock held and interrupts disabled.
0947 */
0948 static int enable_promisc(struct xircom_private *card)
0949 {
0950     void __iomem *ioaddr = card->ioaddr;
0951     unsigned int val;
0952 
0953     val = xr32(CSR6);
0954     val = val | (1 << 6);
0955     xw32(CSR6, val);
0956 
0957     return 1;
0958 }
0959 
0960 
0961 
0962 
0963 /*
0964 link_status() checks the links status and will return 0 for no link, 10 for 10mbit link and 100 for.. guess what.
0965 
0966 Must be called in locked state with interrupts disabled
0967 */
0968 static int link_status(struct xircom_private *card)
0969 {
0970     void __iomem *ioaddr = card->ioaddr;
0971     u8 val;
0972 
0973     val = xr8(CSR12);
0974 
0975     /* bit 2 is 0 for 10mbit link, 1 for not an 10mbit link */
0976     if (!(val & (1 << 2)))
0977         return 10;
0978     /* bit 1 is 0 for 100mbit link, 1 for not an 100mbit link */
0979     if (!(val & (1 << 1)))
0980         return 100;
0981 
0982     /* If we get here -> no link at all */
0983 
0984     return 0;
0985 }
0986 
0987 
0988 
0989 
0990 
0991 /*
0992   read_mac_address() reads the MAC address from the NIC and stores it in the "dev" structure.
0993 
0994   This function will take the spinlock itself and can, as a result, not be called with the lock helt.
0995  */
0996 static void read_mac_address(struct xircom_private *card)
0997 {
0998     void __iomem *ioaddr = card->ioaddr;
0999     unsigned long flags;
1000     u8 link;
1001     int i;
1002 
1003     spin_lock_irqsave(&card->lock, flags);
1004 
1005     xw32(CSR9, 1 << 12);    /* enable boot rom access */
1006     for (i = 0x100; i < 0x1f7; i += link + 2) {
1007         u8 tuple, data_id, data_count;
1008 
1009         xw32(CSR10, i);
1010         tuple = xr32(CSR9);
1011         xw32(CSR10, i + 1);
1012         link = xr32(CSR9);
1013         xw32(CSR10, i + 2);
1014         data_id = xr32(CSR9);
1015         xw32(CSR10, i + 3);
1016         data_count = xr32(CSR9);
1017         if ((tuple == 0x22) && (data_id == 0x04) && (data_count == 0x06)) {
1018             u8 addr[ETH_ALEN];
1019             int j;
1020 
1021             for (j = 0; j < 6; j++) {
1022                 xw32(CSR10, i + j + 4);
1023                 addr[j] = xr32(CSR9) & 0xff;
1024             }
1025             eth_hw_addr_set(card->dev, addr);
1026             break;
1027         } else if (link == 0) {
1028             break;
1029         }
1030     }
1031     spin_unlock_irqrestore(&card->lock, flags);
1032     pr_debug(" %pM\n", card->dev->dev_addr);
1033 }
1034 
1035 
1036 /*
1037  transceiver_voodoo() enables the external UTP plug thingy.
1038  it's called voodoo as I stole this code and cannot cross-reference
1039  it with the specification.
1040  */
1041 static void transceiver_voodoo(struct xircom_private *card)
1042 {
1043     void __iomem *ioaddr = card->ioaddr;
1044     unsigned long flags;
1045 
1046     /* disable all powermanagement */
1047     pci_write_config_dword(card->pdev, PCI_POWERMGMT, 0x0000);
1048 
1049     setup_descriptors(card);
1050 
1051     spin_lock_irqsave(&card->lock, flags);
1052 
1053     xw32(CSR15, 0x0008);
1054     udelay(25);
1055     xw32(CSR15, 0xa8050000);
1056     udelay(25);
1057     xw32(CSR15, 0xa00f0000);
1058     udelay(25);
1059 
1060     spin_unlock_irqrestore(&card->lock, flags);
1061 
1062     netif_start_queue(card->dev);
1063 }
1064 
1065 
1066 static void xircom_up(struct xircom_private *card)
1067 {
1068     unsigned long flags;
1069     int i;
1070 
1071     /* disable all powermanagement */
1072     pci_write_config_dword(card->pdev, PCI_POWERMGMT, 0x0000);
1073 
1074     setup_descriptors(card);
1075 
1076     spin_lock_irqsave(&card->lock, flags);
1077 
1078 
1079     enable_link_interrupt(card);
1080     enable_transmit_interrupt(card);
1081     enable_receive_interrupt(card);
1082     enable_common_interrupts(card);
1083     enable_promisc(card);
1084 
1085     /* The card can have received packets already, read them away now */
1086     for (i=0;i<NUMDESCRIPTORS;i++)
1087         investigate_read_descriptor(card->dev,card,i,bufferoffsets[i]);
1088 
1089 
1090     spin_unlock_irqrestore(&card->lock, flags);
1091     trigger_receive(card);
1092     trigger_transmit(card);
1093     netif_start_queue(card->dev);
1094 }
1095 
1096 /* Bufferoffset is in BYTES */
1097 static void
1098 investigate_read_descriptor(struct net_device *dev, struct xircom_private *card,
1099                 int descnr, unsigned int bufferoffset)
1100 {
1101     int status;
1102 
1103     status = le32_to_cpu(card->rx_buffer[4*descnr]);
1104 
1105     if (status > 0) {       /* packet received */
1106 
1107         /* TODO: discard error packets */
1108 
1109         short pkt_len = ((status >> 16) & 0x7ff) - 4;
1110                     /* minus 4, we don't want the CRC */
1111         struct sk_buff *skb;
1112 
1113         if (pkt_len > 1518) {
1114             netdev_err(dev, "Packet length %i is bogus\n", pkt_len);
1115             pkt_len = 1518;
1116         }
1117 
1118         skb = netdev_alloc_skb(dev, pkt_len + 2);
1119         if (skb == NULL) {
1120             dev->stats.rx_dropped++;
1121             goto out;
1122         }
1123         skb_reserve(skb, 2);
1124         skb_copy_to_linear_data(skb,
1125                     &card->rx_buffer[bufferoffset / 4],
1126                     pkt_len);
1127         skb_put(skb, pkt_len);
1128         skb->protocol = eth_type_trans(skb, dev);
1129         netif_rx(skb);
1130         dev->stats.rx_packets++;
1131         dev->stats.rx_bytes += pkt_len;
1132 
1133 out:
1134         /* give the buffer back to the card */
1135         card->rx_buffer[4*descnr] = cpu_to_le32(0x80000000);
1136         trigger_receive(card);
1137     }
1138 }
1139 
1140 
1141 /* Bufferoffset is in BYTES */
1142 static void
1143 investigate_write_descriptor(struct net_device *dev,
1144                  struct xircom_private *card,
1145                  int descnr, unsigned int bufferoffset)
1146 {
1147     int status;
1148 
1149     status = le32_to_cpu(card->tx_buffer[4*descnr]);
1150 #if 0
1151     if (status & 0x8000) {  /* Major error */
1152         pr_err("Major transmit error status %x\n", status);
1153         card->tx_buffer[4*descnr] = 0;
1154         netif_wake_queue (dev);
1155     }
1156 #endif
1157     if (status > 0) {   /* bit 31 is 0 when done */
1158         if (card->tx_skb[descnr]!=NULL) {
1159             dev->stats.tx_bytes += card->tx_skb[descnr]->len;
1160             dev_kfree_skb_irq(card->tx_skb[descnr]);
1161         }
1162         card->tx_skb[descnr] = NULL;
1163         /* Bit 8 in the status field is 1 if there was a collision */
1164         if (status & (1 << 8))
1165             dev->stats.collisions++;
1166         card->tx_buffer[4*descnr] = 0; /* descriptor is free again */
1167         netif_wake_queue (dev);
1168         dev->stats.tx_packets++;
1169     }
1170 }
1171 
1172 module_pci_driver(xircom_ops);
[ Source navigation ] [ Diff markup ] [ Identifier search ] [ general search ]

This page was automatically generated by the 2.1.0 LXR engine.

The LXR team
Valid CSS 2.1! Valid HTML 4.01!