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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.
0004  * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
0005  */
0006 
0007 #include <linux/kernel.h>
0008 #include <linux/errno.h>
0009 #include <linux/types.h>
0010 #include <linux/pci.h>
0011 #include <linux/delay.h>
0012 #include <linux/if_ether.h>
0013 
0014 #include "vnic_resource.h"
0015 #include "vnic_devcmd.h"
0016 #include "vnic_dev.h"
0017 #include "vnic_wq.h"
0018 #include "vnic_stats.h"
0019 #include "enic.h"
0020 
0021 #define VNIC_MAX_RES_HDR_SIZE \
0022     (sizeof(struct vnic_resource_header) + \
0023     sizeof(struct vnic_resource) * RES_TYPE_MAX)
0024 #define VNIC_RES_STRIDE 128
0025 
0026 void *vnic_dev_priv(struct vnic_dev *vdev)
0027 {
0028     return vdev->priv;
0029 }
0030 
0031 static int vnic_dev_discover_res(struct vnic_dev *vdev,
0032     struct vnic_dev_bar *bar, unsigned int num_bars)
0033 {
0034     struct vnic_resource_header __iomem *rh;
0035     struct mgmt_barmap_hdr __iomem *mrh;
0036     struct vnic_resource __iomem *r;
0037     u8 type;
0038 
0039     if (num_bars == 0)
0040         return -EINVAL;
0041 
0042     if (bar->len < VNIC_MAX_RES_HDR_SIZE) {
0043         vdev_err(vdev, "vNIC BAR0 res hdr length error\n");
0044         return -EINVAL;
0045     }
0046 
0047     rh  = bar->vaddr;
0048     mrh = bar->vaddr;
0049     if (!rh) {
0050         vdev_err(vdev, "vNIC BAR0 res hdr not mem-mapped\n");
0051         return -EINVAL;
0052     }
0053 
0054     /* Check for mgmt vnic in addition to normal vnic */
0055     if ((ioread32(&rh->magic) != VNIC_RES_MAGIC) ||
0056         (ioread32(&rh->version) != VNIC_RES_VERSION)) {
0057         if ((ioread32(&mrh->magic) != MGMTVNIC_MAGIC) ||
0058             (ioread32(&mrh->version) != MGMTVNIC_VERSION)) {
0059             vdev_err(vdev, "vNIC BAR0 res magic/version error exp (%lx/%lx) or (%lx/%lx), curr (%x/%x)\n",
0060                  VNIC_RES_MAGIC, VNIC_RES_VERSION,
0061                  MGMTVNIC_MAGIC, MGMTVNIC_VERSION,
0062                  ioread32(&rh->magic), ioread32(&rh->version));
0063             return -EINVAL;
0064         }
0065     }
0066 
0067     if (ioread32(&mrh->magic) == MGMTVNIC_MAGIC)
0068         r = (struct vnic_resource __iomem *)(mrh + 1);
0069     else
0070         r = (struct vnic_resource __iomem *)(rh + 1);
0071 
0072 
0073     while ((type = ioread8(&r->type)) != RES_TYPE_EOL) {
0074 
0075         u8 bar_num = ioread8(&r->bar);
0076         u32 bar_offset = ioread32(&r->bar_offset);
0077         u32 count = ioread32(&r->count);
0078         u32 len;
0079 
0080         r++;
0081 
0082         if (bar_num >= num_bars)
0083             continue;
0084 
0085         if (!bar[bar_num].len || !bar[bar_num].vaddr)
0086             continue;
0087 
0088         switch (type) {
0089         case RES_TYPE_WQ:
0090         case RES_TYPE_RQ:
0091         case RES_TYPE_CQ:
0092         case RES_TYPE_INTR_CTRL:
0093             /* each count is stride bytes long */
0094             len = count * VNIC_RES_STRIDE;
0095             if (len + bar_offset > bar[bar_num].len) {
0096                 vdev_err(vdev, "vNIC BAR0 resource %d out-of-bounds, offset 0x%x + size 0x%x > bar len 0x%lx\n",
0097                      type, bar_offset, len,
0098                      bar[bar_num].len);
0099                 return -EINVAL;
0100             }
0101             break;
0102         case RES_TYPE_INTR_PBA_LEGACY:
0103         case RES_TYPE_DEVCMD:
0104         case RES_TYPE_DEVCMD2:
0105             len = count;
0106             break;
0107         default:
0108             continue;
0109         }
0110 
0111         vdev->res[type].count = count;
0112         vdev->res[type].vaddr = (char __iomem *)bar[bar_num].vaddr +
0113             bar_offset;
0114         vdev->res[type].bus_addr = bar[bar_num].bus_addr + bar_offset;
0115     }
0116 
0117     return 0;
0118 }
0119 
0120 unsigned int vnic_dev_get_res_count(struct vnic_dev *vdev,
0121     enum vnic_res_type type)
0122 {
0123     return vdev->res[type].count;
0124 }
0125 EXPORT_SYMBOL(vnic_dev_get_res_count);
0126 
0127 void __iomem *vnic_dev_get_res(struct vnic_dev *vdev, enum vnic_res_type type,
0128     unsigned int index)
0129 {
0130     if (!vdev->res[type].vaddr)
0131         return NULL;
0132 
0133     switch (type) {
0134     case RES_TYPE_WQ:
0135     case RES_TYPE_RQ:
0136     case RES_TYPE_CQ:
0137     case RES_TYPE_INTR_CTRL:
0138         return (char __iomem *)vdev->res[type].vaddr +
0139             index * VNIC_RES_STRIDE;
0140     default:
0141         return (char __iomem *)vdev->res[type].vaddr;
0142     }
0143 }
0144 EXPORT_SYMBOL(vnic_dev_get_res);
0145 
0146 static unsigned int vnic_dev_desc_ring_size(struct vnic_dev_ring *ring,
0147     unsigned int desc_count, unsigned int desc_size)
0148 {
0149     /* The base address of the desc rings must be 512 byte aligned.
0150      * Descriptor count is aligned to groups of 32 descriptors.  A
0151      * count of 0 means the maximum 4096 descriptors.  Descriptor
0152      * size is aligned to 16 bytes.
0153      */
0154 
0155     unsigned int count_align = 32;
0156     unsigned int desc_align = 16;
0157 
0158     ring->base_align = 512;
0159 
0160     if (desc_count == 0)
0161         desc_count = 4096;
0162 
0163     ring->desc_count = ALIGN(desc_count, count_align);
0164 
0165     ring->desc_size = ALIGN(desc_size, desc_align);
0166 
0167     ring->size = ring->desc_count * ring->desc_size;
0168     ring->size_unaligned = ring->size + ring->base_align;
0169 
0170     return ring->size_unaligned;
0171 }
0172 
0173 void vnic_dev_clear_desc_ring(struct vnic_dev_ring *ring)
0174 {
0175     memset(ring->descs, 0, ring->size);
0176 }
0177 
0178 int vnic_dev_alloc_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring,
0179     unsigned int desc_count, unsigned int desc_size)
0180 {
0181     vnic_dev_desc_ring_size(ring, desc_count, desc_size);
0182 
0183     ring->descs_unaligned = dma_alloc_coherent(&vdev->pdev->dev,
0184                            ring->size_unaligned,
0185                            &ring->base_addr_unaligned,
0186                            GFP_KERNEL);
0187 
0188     if (!ring->descs_unaligned) {
0189         vdev_err(vdev, "Failed to allocate ring (size=%d), aborting\n",
0190              (int)ring->size);
0191         return -ENOMEM;
0192     }
0193 
0194     ring->base_addr = ALIGN(ring->base_addr_unaligned,
0195         ring->base_align);
0196     ring->descs = (u8 *)ring->descs_unaligned +
0197         (ring->base_addr - ring->base_addr_unaligned);
0198 
0199     vnic_dev_clear_desc_ring(ring);
0200 
0201     ring->desc_avail = ring->desc_count - 1;
0202 
0203     return 0;
0204 }
0205 
0206 void vnic_dev_free_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring)
0207 {
0208     if (ring->descs) {
0209         dma_free_coherent(&vdev->pdev->dev, ring->size_unaligned,
0210                   ring->descs_unaligned,
0211                   ring->base_addr_unaligned);
0212         ring->descs = NULL;
0213     }
0214 }
0215 
0216 static int _vnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
0217     int wait)
0218 {
0219     struct vnic_devcmd __iomem *devcmd = vdev->devcmd;
0220     unsigned int i;
0221     int delay;
0222     u32 status;
0223     int err;
0224 
0225     status = ioread32(&devcmd->status);
0226     if (status == 0xFFFFFFFF) {
0227         /* PCI-e target device is gone */
0228         return -ENODEV;
0229     }
0230     if (status & STAT_BUSY) {
0231         vdev_neterr(vdev, "Busy devcmd %d\n", _CMD_N(cmd));
0232         return -EBUSY;
0233     }
0234 
0235     if (_CMD_DIR(cmd) & _CMD_DIR_WRITE) {
0236         for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
0237             writeq(vdev->args[i], &devcmd->args[i]);
0238         wmb();
0239     }
0240 
0241     iowrite32(cmd, &devcmd->cmd);
0242 
0243     if ((_CMD_FLAGS(cmd) & _CMD_FLAGS_NOWAIT))
0244         return 0;
0245 
0246     for (delay = 0; delay < wait; delay++) {
0247 
0248         udelay(100);
0249 
0250         status = ioread32(&devcmd->status);
0251         if (status == 0xFFFFFFFF) {
0252             /* PCI-e target device is gone */
0253             return -ENODEV;
0254         }
0255 
0256         if (!(status & STAT_BUSY)) {
0257 
0258             if (status & STAT_ERROR) {
0259                 err = (int)readq(&devcmd->args[0]);
0260                 if (err == ERR_EINVAL &&
0261                     cmd == CMD_CAPABILITY)
0262                     return -err;
0263                 if (err != ERR_ECMDUNKNOWN ||
0264                     cmd != CMD_CAPABILITY)
0265                     vdev_neterr(vdev, "Error %d devcmd %d\n",
0266                             err, _CMD_N(cmd));
0267                 return -err;
0268             }
0269 
0270             if (_CMD_DIR(cmd) & _CMD_DIR_READ) {
0271                 rmb();
0272                 for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
0273                     vdev->args[i] = readq(&devcmd->args[i]);
0274             }
0275 
0276             return 0;
0277         }
0278     }
0279 
0280     vdev_neterr(vdev, "Timedout devcmd %d\n", _CMD_N(cmd));
0281     return -ETIMEDOUT;
0282 }
0283 
0284 static int _vnic_dev_cmd2(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
0285               int wait)
0286 {
0287     struct devcmd2_controller *dc2c = vdev->devcmd2;
0288     struct devcmd2_result *result;
0289     u8 color;
0290     unsigned int i;
0291     int delay, err;
0292     u32 fetch_index, new_posted;
0293     u32 posted = dc2c->posted;
0294 
0295     fetch_index = ioread32(&dc2c->wq_ctrl->fetch_index);
0296 
0297     if (fetch_index == 0xFFFFFFFF)
0298         return -ENODEV;
0299 
0300     new_posted = (posted + 1) % DEVCMD2_RING_SIZE;
0301 
0302     if (new_posted == fetch_index) {
0303         vdev_neterr(vdev, "devcmd2 %d: wq is full. fetch index: %u, posted index: %u\n",
0304                 _CMD_N(cmd), fetch_index, posted);
0305         return -EBUSY;
0306     }
0307     dc2c->cmd_ring[posted].cmd = cmd;
0308     dc2c->cmd_ring[posted].flags = 0;
0309 
0310     if ((_CMD_FLAGS(cmd) & _CMD_FLAGS_NOWAIT))
0311         dc2c->cmd_ring[posted].flags |= DEVCMD2_FNORESULT;
0312     if (_CMD_DIR(cmd) & _CMD_DIR_WRITE)
0313         for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
0314             dc2c->cmd_ring[posted].args[i] = vdev->args[i];
0315 
0316     /* Adding write memory barrier prevents compiler and/or CPU reordering,
0317      * thus avoiding descriptor posting before descriptor is initialized.
0318      * Otherwise, hardware can read stale descriptor fields.
0319      */
0320     wmb();
0321     iowrite32(new_posted, &dc2c->wq_ctrl->posted_index);
0322     dc2c->posted = new_posted;
0323 
0324     if (dc2c->cmd_ring[posted].flags & DEVCMD2_FNORESULT)
0325         return 0;
0326 
0327     result = dc2c->result + dc2c->next_result;
0328     color = dc2c->color;
0329 
0330     dc2c->next_result++;
0331     if (dc2c->next_result == dc2c->result_size) {
0332         dc2c->next_result = 0;
0333         dc2c->color = dc2c->color ? 0 : 1;
0334     }
0335 
0336     for (delay = 0; delay < wait; delay++) {
0337         if (result->color == color) {
0338             if (result->error) {
0339                 err = result->error;
0340                 if (err != ERR_ECMDUNKNOWN ||
0341                     cmd != CMD_CAPABILITY)
0342                     vdev_neterr(vdev, "Error %d devcmd %d\n",
0343                             err, _CMD_N(cmd));
0344                 return -err;
0345             }
0346             if (_CMD_DIR(cmd) & _CMD_DIR_READ)
0347                 for (i = 0; i < VNIC_DEVCMD2_NARGS; i++)
0348                     vdev->args[i] = result->results[i];
0349 
0350             return 0;
0351         }
0352         udelay(100);
0353     }
0354 
0355     vdev_neterr(vdev, "devcmd %d timed out\n", _CMD_N(cmd));
0356 
0357     return -ETIMEDOUT;
0358 }
0359 
0360 static int vnic_dev_init_devcmd1(struct vnic_dev *vdev)
0361 {
0362     vdev->devcmd = vnic_dev_get_res(vdev, RES_TYPE_DEVCMD, 0);
0363     if (!vdev->devcmd)
0364         return -ENODEV;
0365     vdev->devcmd_rtn = _vnic_dev_cmd;
0366 
0367     return 0;
0368 }
0369 
0370 static int vnic_dev_init_devcmd2(struct vnic_dev *vdev)
0371 {
0372     int err;
0373     unsigned int fetch_index;
0374 
0375     if (vdev->devcmd2)
0376         return 0;
0377 
0378     vdev->devcmd2 = kzalloc(sizeof(*vdev->devcmd2), GFP_KERNEL);
0379     if (!vdev->devcmd2)
0380         return -ENOMEM;
0381 
0382     vdev->devcmd2->color = 1;
0383     vdev->devcmd2->result_size = DEVCMD2_RING_SIZE;
0384     err = enic_wq_devcmd2_alloc(vdev, &vdev->devcmd2->wq, DEVCMD2_RING_SIZE,
0385                     DEVCMD2_DESC_SIZE);
0386     if (err)
0387         goto err_free_devcmd2;
0388 
0389     fetch_index = ioread32(&vdev->devcmd2->wq.ctrl->fetch_index);
0390     if (fetch_index == 0xFFFFFFFF) { /* check for hardware gone  */
0391         vdev_err(vdev, "Fatal error in devcmd2 init - hardware surprise removal\n");
0392         err = -ENODEV;
0393         goto err_free_wq;
0394     }
0395 
0396     enic_wq_init_start(&vdev->devcmd2->wq, 0, fetch_index, fetch_index, 0,
0397                0);
0398     vdev->devcmd2->posted = fetch_index;
0399     vnic_wq_enable(&vdev->devcmd2->wq);
0400 
0401     err = vnic_dev_alloc_desc_ring(vdev, &vdev->devcmd2->results_ring,
0402                        DEVCMD2_RING_SIZE, DEVCMD2_DESC_SIZE);
0403     if (err)
0404         goto err_disable_wq;
0405 
0406     vdev->devcmd2->result = vdev->devcmd2->results_ring.descs;
0407     vdev->devcmd2->cmd_ring = vdev->devcmd2->wq.ring.descs;
0408     vdev->devcmd2->wq_ctrl = vdev->devcmd2->wq.ctrl;
0409     vdev->args[0] = (u64)vdev->devcmd2->results_ring.base_addr |
0410             VNIC_PADDR_TARGET;
0411     vdev->args[1] = DEVCMD2_RING_SIZE;
0412 
0413     err = _vnic_dev_cmd2(vdev, CMD_INITIALIZE_DEVCMD2, 1000);
0414     if (err)
0415         goto err_free_desc_ring;
0416 
0417     vdev->devcmd_rtn = _vnic_dev_cmd2;
0418 
0419     return 0;
0420 
0421 err_free_desc_ring:
0422     vnic_dev_free_desc_ring(vdev, &vdev->devcmd2->results_ring);
0423 err_disable_wq:
0424     vnic_wq_disable(&vdev->devcmd2->wq);
0425 err_free_wq:
0426     vnic_wq_free(&vdev->devcmd2->wq);
0427 err_free_devcmd2:
0428     kfree(vdev->devcmd2);
0429     vdev->devcmd2 = NULL;
0430 
0431     return err;
0432 }
0433 
0434 static void vnic_dev_deinit_devcmd2(struct vnic_dev *vdev)
0435 {
0436     vnic_dev_free_desc_ring(vdev, &vdev->devcmd2->results_ring);
0437     vnic_wq_disable(&vdev->devcmd2->wq);
0438     vnic_wq_free(&vdev->devcmd2->wq);
0439     kfree(vdev->devcmd2);
0440 }
0441 
0442 static int vnic_dev_cmd_proxy(struct vnic_dev *vdev,
0443     enum vnic_devcmd_cmd proxy_cmd, enum vnic_devcmd_cmd cmd,
0444     u64 *a0, u64 *a1, int wait)
0445 {
0446     u32 status;
0447     int err;
0448 
0449     memset(vdev->args, 0, sizeof(vdev->args));
0450 
0451     vdev->args[0] = vdev->proxy_index;
0452     vdev->args[1] = cmd;
0453     vdev->args[2] = *a0;
0454     vdev->args[3] = *a1;
0455 
0456     err = vdev->devcmd_rtn(vdev, proxy_cmd, wait);
0457     if (err)
0458         return err;
0459 
0460     status = (u32)vdev->args[0];
0461     if (status & STAT_ERROR) {
0462         err = (int)vdev->args[1];
0463         if (err != ERR_ECMDUNKNOWN ||
0464             cmd != CMD_CAPABILITY)
0465             vdev_neterr(vdev, "Error %d proxy devcmd %d\n",
0466                     err, _CMD_N(cmd));
0467         return err;
0468     }
0469 
0470     *a0 = vdev->args[1];
0471     *a1 = vdev->args[2];
0472 
0473     return 0;
0474 }
0475 
0476 static int vnic_dev_cmd_no_proxy(struct vnic_dev *vdev,
0477     enum vnic_devcmd_cmd cmd, u64 *a0, u64 *a1, int wait)
0478 {
0479     int err;
0480 
0481     vdev->args[0] = *a0;
0482     vdev->args[1] = *a1;
0483 
0484     err = vdev->devcmd_rtn(vdev, cmd, wait);
0485 
0486     *a0 = vdev->args[0];
0487     *a1 = vdev->args[1];
0488 
0489     return err;
0490 }
0491 
0492 void vnic_dev_cmd_proxy_by_index_start(struct vnic_dev *vdev, u16 index)
0493 {
0494     vdev->proxy = PROXY_BY_INDEX;
0495     vdev->proxy_index = index;
0496 }
0497 
0498 void vnic_dev_cmd_proxy_end(struct vnic_dev *vdev)
0499 {
0500     vdev->proxy = PROXY_NONE;
0501     vdev->proxy_index = 0;
0502 }
0503 
0504 int vnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
0505     u64 *a0, u64 *a1, int wait)
0506 {
0507     memset(vdev->args, 0, sizeof(vdev->args));
0508 
0509     switch (vdev->proxy) {
0510     case PROXY_BY_INDEX:
0511         return vnic_dev_cmd_proxy(vdev, CMD_PROXY_BY_INDEX, cmd,
0512                 a0, a1, wait);
0513     case PROXY_BY_BDF:
0514         return vnic_dev_cmd_proxy(vdev, CMD_PROXY_BY_BDF, cmd,
0515                 a0, a1, wait);
0516     case PROXY_NONE:
0517     default:
0518         return vnic_dev_cmd_no_proxy(vdev, cmd, a0, a1, wait);
0519     }
0520 }
0521 
0522 static int vnic_dev_capable(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd)
0523 {
0524     u64 a0 = (u32)cmd, a1 = 0;
0525     int wait = 1000;
0526     int err;
0527 
0528     err = vnic_dev_cmd(vdev, CMD_CAPABILITY, &a0, &a1, wait);
0529 
0530     return !(err || a0);
0531 }
0532 
0533 int vnic_dev_fw_info(struct vnic_dev *vdev,
0534     struct vnic_devcmd_fw_info **fw_info)
0535 {
0536     u64 a0, a1 = 0;
0537     int wait = 1000;
0538     int err = 0;
0539 
0540     if (!vdev->fw_info) {
0541         vdev->fw_info = dma_alloc_coherent(&vdev->pdev->dev,
0542                            sizeof(struct vnic_devcmd_fw_info),
0543                            &vdev->fw_info_pa, GFP_ATOMIC);
0544         if (!vdev->fw_info)
0545             return -ENOMEM;
0546 
0547         a0 = vdev->fw_info_pa;
0548         a1 = sizeof(struct vnic_devcmd_fw_info);
0549 
0550         /* only get fw_info once and cache it */
0551         if (vnic_dev_capable(vdev, CMD_MCPU_FW_INFO))
0552             err = vnic_dev_cmd(vdev, CMD_MCPU_FW_INFO,
0553                 &a0, &a1, wait);
0554         else
0555             err = vnic_dev_cmd(vdev, CMD_MCPU_FW_INFO_OLD,
0556                 &a0, &a1, wait);
0557     }
0558 
0559     *fw_info = vdev->fw_info;
0560 
0561     return err;
0562 }
0563 
0564 int vnic_dev_spec(struct vnic_dev *vdev, unsigned int offset, unsigned int size,
0565     void *value)
0566 {
0567     u64 a0, a1;
0568     int wait = 1000;
0569     int err;
0570 
0571     a0 = offset;
0572     a1 = size;
0573 
0574     err = vnic_dev_cmd(vdev, CMD_DEV_SPEC, &a0, &a1, wait);
0575 
0576     switch (size) {
0577     case 1: *(u8 *)value = (u8)a0; break;
0578     case 2: *(u16 *)value = (u16)a0; break;
0579     case 4: *(u32 *)value = (u32)a0; break;
0580     case 8: *(u64 *)value = a0; break;
0581     default: BUG(); break;
0582     }
0583 
0584     return err;
0585 }
0586 
0587 int vnic_dev_stats_dump(struct vnic_dev *vdev, struct vnic_stats **stats)
0588 {
0589     u64 a0, a1;
0590     int wait = 1000;
0591 
0592     if (!vdev->stats) {
0593         vdev->stats = dma_alloc_coherent(&vdev->pdev->dev,
0594                          sizeof(struct vnic_stats),
0595                          &vdev->stats_pa, GFP_ATOMIC);
0596         if (!vdev->stats)
0597             return -ENOMEM;
0598     }
0599 
0600     *stats = vdev->stats;
0601     a0 = vdev->stats_pa;
0602     a1 = sizeof(struct vnic_stats);
0603 
0604     return vnic_dev_cmd(vdev, CMD_STATS_DUMP, &a0, &a1, wait);
0605 }
0606 
0607 int vnic_dev_close(struct vnic_dev *vdev)
0608 {
0609     u64 a0 = 0, a1 = 0;
0610     int wait = 1000;
0611     return vnic_dev_cmd(vdev, CMD_CLOSE, &a0, &a1, wait);
0612 }
0613 
0614 int vnic_dev_enable_wait(struct vnic_dev *vdev)
0615 {
0616     u64 a0 = 0, a1 = 0;
0617     int wait = 1000;
0618 
0619     if (vnic_dev_capable(vdev, CMD_ENABLE_WAIT))
0620         return vnic_dev_cmd(vdev, CMD_ENABLE_WAIT, &a0, &a1, wait);
0621     else
0622         return vnic_dev_cmd(vdev, CMD_ENABLE, &a0, &a1, wait);
0623 }
0624 
0625 int vnic_dev_disable(struct vnic_dev *vdev)
0626 {
0627     u64 a0 = 0, a1 = 0;
0628     int wait = 1000;
0629     return vnic_dev_cmd(vdev, CMD_DISABLE, &a0, &a1, wait);
0630 }
0631 
0632 int vnic_dev_open(struct vnic_dev *vdev, int arg)
0633 {
0634     u64 a0 = (u32)arg, a1 = 0;
0635     int wait = 1000;
0636     return vnic_dev_cmd(vdev, CMD_OPEN, &a0, &a1, wait);
0637 }
0638 
0639 int vnic_dev_open_done(struct vnic_dev *vdev, int *done)
0640 {
0641     u64 a0 = 0, a1 = 0;
0642     int wait = 1000;
0643     int err;
0644 
0645     *done = 0;
0646 
0647     err = vnic_dev_cmd(vdev, CMD_OPEN_STATUS, &a0, &a1, wait);
0648     if (err)
0649         return err;
0650 
0651     *done = (a0 == 0);
0652 
0653     return 0;
0654 }
0655 
0656 int vnic_dev_soft_reset(struct vnic_dev *vdev, int arg)
0657 {
0658     u64 a0 = (u32)arg, a1 = 0;
0659     int wait = 1000;
0660     return vnic_dev_cmd(vdev, CMD_SOFT_RESET, &a0, &a1, wait);
0661 }
0662 
0663 int vnic_dev_soft_reset_done(struct vnic_dev *vdev, int *done)
0664 {
0665     u64 a0 = 0, a1 = 0;
0666     int wait = 1000;
0667     int err;
0668 
0669     *done = 0;
0670 
0671     err = vnic_dev_cmd(vdev, CMD_SOFT_RESET_STATUS, &a0, &a1, wait);
0672     if (err)
0673         return err;
0674 
0675     *done = (a0 == 0);
0676 
0677     return 0;
0678 }
0679 
0680 int vnic_dev_hang_reset(struct vnic_dev *vdev, int arg)
0681 {
0682     u64 a0 = (u32)arg, a1 = 0;
0683     int wait = 1000;
0684     int err;
0685 
0686     if (vnic_dev_capable(vdev, CMD_HANG_RESET)) {
0687         return vnic_dev_cmd(vdev, CMD_HANG_RESET,
0688                 &a0, &a1, wait);
0689     } else {
0690         err = vnic_dev_soft_reset(vdev, arg);
0691         if (err)
0692             return err;
0693         return vnic_dev_init(vdev, 0);
0694     }
0695 }
0696 
0697 int vnic_dev_hang_reset_done(struct vnic_dev *vdev, int *done)
0698 {
0699     u64 a0 = 0, a1 = 0;
0700     int wait = 1000;
0701     int err;
0702 
0703     *done = 0;
0704 
0705     if (vnic_dev_capable(vdev, CMD_HANG_RESET_STATUS)) {
0706         err = vnic_dev_cmd(vdev, CMD_HANG_RESET_STATUS,
0707                 &a0, &a1, wait);
0708         if (err)
0709             return err;
0710     } else {
0711         return vnic_dev_soft_reset_done(vdev, done);
0712     }
0713 
0714     *done = (a0 == 0);
0715 
0716     return 0;
0717 }
0718 
0719 int vnic_dev_hang_notify(struct vnic_dev *vdev)
0720 {
0721     u64 a0, a1;
0722     int wait = 1000;
0723     return vnic_dev_cmd(vdev, CMD_HANG_NOTIFY, &a0, &a1, wait);
0724 }
0725 
0726 int vnic_dev_get_mac_addr(struct vnic_dev *vdev, u8 *mac_addr)
0727 {
0728     u64 a0, a1;
0729     int wait = 1000;
0730     int err, i;
0731 
0732     for (i = 0; i < ETH_ALEN; i++)
0733         mac_addr[i] = 0;
0734 
0735     err = vnic_dev_cmd(vdev, CMD_GET_MAC_ADDR, &a0, &a1, wait);
0736     if (err)
0737         return err;
0738 
0739     for (i = 0; i < ETH_ALEN; i++)
0740         mac_addr[i] = ((u8 *)&a0)[i];
0741 
0742     return 0;
0743 }
0744 
0745 int vnic_dev_packet_filter(struct vnic_dev *vdev, int directed, int multicast,
0746     int broadcast, int promisc, int allmulti)
0747 {
0748     u64 a0, a1 = 0;
0749     int wait = 1000;
0750     int err;
0751 
0752     a0 = (directed ? CMD_PFILTER_DIRECTED : 0) |
0753          (multicast ? CMD_PFILTER_MULTICAST : 0) |
0754          (broadcast ? CMD_PFILTER_BROADCAST : 0) |
0755          (promisc ? CMD_PFILTER_PROMISCUOUS : 0) |
0756          (allmulti ? CMD_PFILTER_ALL_MULTICAST : 0);
0757 
0758     err = vnic_dev_cmd(vdev, CMD_PACKET_FILTER, &a0, &a1, wait);
0759     if (err)
0760         vdev_neterr(vdev, "Can't set packet filter\n");
0761 
0762     return err;
0763 }
0764 
0765 int vnic_dev_add_addr(struct vnic_dev *vdev, const u8 *addr)
0766 {
0767     u64 a0 = 0, a1 = 0;
0768     int wait = 1000;
0769     int err;
0770     int i;
0771 
0772     for (i = 0; i < ETH_ALEN; i++)
0773         ((u8 *)&a0)[i] = addr[i];
0774 
0775     err = vnic_dev_cmd(vdev, CMD_ADDR_ADD, &a0, &a1, wait);
0776     if (err)
0777         vdev_neterr(vdev, "Can't add addr [%pM], %d\n", addr, err);
0778 
0779     return err;
0780 }
0781 
0782 int vnic_dev_del_addr(struct vnic_dev *vdev, const u8 *addr)
0783 {
0784     u64 a0 = 0, a1 = 0;
0785     int wait = 1000;
0786     int err;
0787     int i;
0788 
0789     for (i = 0; i < ETH_ALEN; i++)
0790         ((u8 *)&a0)[i] = addr[i];
0791 
0792     err = vnic_dev_cmd(vdev, CMD_ADDR_DEL, &a0, &a1, wait);
0793     if (err)
0794         vdev_neterr(vdev, "Can't del addr [%pM], %d\n", addr, err);
0795 
0796     return err;
0797 }
0798 
0799 int vnic_dev_set_ig_vlan_rewrite_mode(struct vnic_dev *vdev,
0800     u8 ig_vlan_rewrite_mode)
0801 {
0802     u64 a0 = ig_vlan_rewrite_mode, a1 = 0;
0803     int wait = 1000;
0804 
0805     if (vnic_dev_capable(vdev, CMD_IG_VLAN_REWRITE_MODE))
0806         return vnic_dev_cmd(vdev, CMD_IG_VLAN_REWRITE_MODE,
0807                 &a0, &a1, wait);
0808     else
0809         return 0;
0810 }
0811 
0812 static int vnic_dev_notify_setcmd(struct vnic_dev *vdev,
0813     void *notify_addr, dma_addr_t notify_pa, u16 intr)
0814 {
0815     u64 a0, a1;
0816     int wait = 1000;
0817     int r;
0818 
0819     memset(notify_addr, 0, sizeof(struct vnic_devcmd_notify));
0820     vdev->notify = notify_addr;
0821     vdev->notify_pa = notify_pa;
0822 
0823     a0 = (u64)notify_pa;
0824     a1 = ((u64)intr << 32) & 0x0000ffff00000000ULL;
0825     a1 += sizeof(struct vnic_devcmd_notify);
0826 
0827     r = vnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);
0828     vdev->notify_sz = (r == 0) ? (u32)a1 : 0;
0829     return r;
0830 }
0831 
0832 int vnic_dev_notify_set(struct vnic_dev *vdev, u16 intr)
0833 {
0834     void *notify_addr;
0835     dma_addr_t notify_pa;
0836 
0837     if (vdev->notify || vdev->notify_pa) {
0838         vdev_neterr(vdev, "notify block %p still allocated\n",
0839                 vdev->notify);
0840         return -EINVAL;
0841     }
0842 
0843     notify_addr = dma_alloc_coherent(&vdev->pdev->dev,
0844                      sizeof(struct vnic_devcmd_notify),
0845                      &notify_pa, GFP_ATOMIC);
0846     if (!notify_addr)
0847         return -ENOMEM;
0848 
0849     return vnic_dev_notify_setcmd(vdev, notify_addr, notify_pa, intr);
0850 }
0851 
0852 static int vnic_dev_notify_unsetcmd(struct vnic_dev *vdev)
0853 {
0854     u64 a0, a1;
0855     int wait = 1000;
0856     int err;
0857 
0858     a0 = 0;  /* paddr = 0 to unset notify buffer */
0859     a1 = 0x0000ffff00000000ULL; /* intr num = -1 to unreg for intr */
0860     a1 += sizeof(struct vnic_devcmd_notify);
0861 
0862     err = vnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);
0863     vdev->notify = NULL;
0864     vdev->notify_pa = 0;
0865     vdev->notify_sz = 0;
0866 
0867     return err;
0868 }
0869 
0870 int vnic_dev_notify_unset(struct vnic_dev *vdev)
0871 {
0872     if (vdev->notify) {
0873         dma_free_coherent(&vdev->pdev->dev,
0874                   sizeof(struct vnic_devcmd_notify),
0875                   vdev->notify, vdev->notify_pa);
0876     }
0877 
0878     return vnic_dev_notify_unsetcmd(vdev);
0879 }
0880 
0881 static int vnic_dev_notify_ready(struct vnic_dev *vdev)
0882 {
0883     u32 *words;
0884     unsigned int nwords = vdev->notify_sz / 4;
0885     unsigned int i;
0886     u32 csum;
0887 
0888     if (!vdev->notify || !vdev->notify_sz)
0889         return 0;
0890 
0891     do {
0892         csum = 0;
0893         memcpy(&vdev->notify_copy, vdev->notify, vdev->notify_sz);
0894         words = (u32 *)&vdev->notify_copy;
0895         for (i = 1; i < nwords; i++)
0896             csum += words[i];
0897     } while (csum != words[0]);
0898 
0899     return 1;
0900 }
0901 
0902 int vnic_dev_init(struct vnic_dev *vdev, int arg)
0903 {
0904     u64 a0 = (u32)arg, a1 = 0;
0905     int wait = 1000;
0906     int r = 0;
0907 
0908     if (vnic_dev_capable(vdev, CMD_INIT))
0909         r = vnic_dev_cmd(vdev, CMD_INIT, &a0, &a1, wait);
0910     else {
0911         vnic_dev_cmd(vdev, CMD_INIT_v1, &a0, &a1, wait);
0912         if (a0 & CMD_INITF_DEFAULT_MAC) {
0913             /* Emulate these for old CMD_INIT_v1 which
0914              * didn't pass a0 so no CMD_INITF_*.
0915              */
0916             vnic_dev_cmd(vdev, CMD_GET_MAC_ADDR, &a0, &a1, wait);
0917             vnic_dev_cmd(vdev, CMD_ADDR_ADD, &a0, &a1, wait);
0918         }
0919     }
0920     return r;
0921 }
0922 
0923 int vnic_dev_deinit(struct vnic_dev *vdev)
0924 {
0925     u64 a0 = 0, a1 = 0;
0926     int wait = 1000;
0927 
0928     return vnic_dev_cmd(vdev, CMD_DEINIT, &a0, &a1, wait);
0929 }
0930 
0931 void vnic_dev_intr_coal_timer_info_default(struct vnic_dev *vdev)
0932 {
0933     /* Default: hardware intr coal timer is in units of 1.5 usecs */
0934     vdev->intr_coal_timer_info.mul = 2;
0935     vdev->intr_coal_timer_info.div = 3;
0936     vdev->intr_coal_timer_info.max_usec =
0937         vnic_dev_intr_coal_timer_hw_to_usec(vdev, 0xffff);
0938 }
0939 
0940 int vnic_dev_intr_coal_timer_info(struct vnic_dev *vdev)
0941 {
0942     int wait = 1000;
0943     int err;
0944 
0945     memset(vdev->args, 0, sizeof(vdev->args));
0946 
0947     if (vnic_dev_capable(vdev, CMD_INTR_COAL_CONVERT))
0948         err = vdev->devcmd_rtn(vdev, CMD_INTR_COAL_CONVERT, wait);
0949     else
0950         err = ERR_ECMDUNKNOWN;
0951 
0952     /* Use defaults when firmware doesn't support the devcmd at all or
0953      * supports it for only specific hardware
0954      */
0955     if ((err == ERR_ECMDUNKNOWN) ||
0956         (!err && !(vdev->args[0] && vdev->args[1] && vdev->args[2]))) {
0957         vdev_netwarn(vdev, "Using default conversion factor for interrupt coalesce timer\n");
0958         vnic_dev_intr_coal_timer_info_default(vdev);
0959         return 0;
0960     }
0961 
0962     if (!err) {
0963         vdev->intr_coal_timer_info.mul = (u32) vdev->args[0];
0964         vdev->intr_coal_timer_info.div = (u32) vdev->args[1];
0965         vdev->intr_coal_timer_info.max_usec = (u32) vdev->args[2];
0966     }
0967 
0968     return err;
0969 }
0970 
0971 int vnic_dev_link_status(struct vnic_dev *vdev)
0972 {
0973     if (!vnic_dev_notify_ready(vdev))
0974         return 0;
0975 
0976     return vdev->notify_copy.link_state;
0977 }
0978 
0979 u32 vnic_dev_port_speed(struct vnic_dev *vdev)
0980 {
0981     if (!vnic_dev_notify_ready(vdev))
0982         return 0;
0983 
0984     return vdev->notify_copy.port_speed;
0985 }
0986 
0987 u32 vnic_dev_msg_lvl(struct vnic_dev *vdev)
0988 {
0989     if (!vnic_dev_notify_ready(vdev))
0990         return 0;
0991 
0992     return vdev->notify_copy.msglvl;
0993 }
0994 
0995 u32 vnic_dev_mtu(struct vnic_dev *vdev)
0996 {
0997     if (!vnic_dev_notify_ready(vdev))
0998         return 0;
0999 
1000     return vdev->notify_copy.mtu;
1001 }
1002 
1003 void vnic_dev_set_intr_mode(struct vnic_dev *vdev,
1004     enum vnic_dev_intr_mode intr_mode)
1005 {
1006     vdev->intr_mode = intr_mode;
1007 }
1008 
1009 enum vnic_dev_intr_mode vnic_dev_get_intr_mode(
1010     struct vnic_dev *vdev)
1011 {
1012     return vdev->intr_mode;
1013 }
1014 
1015 u32 vnic_dev_intr_coal_timer_usec_to_hw(struct vnic_dev *vdev, u32 usec)
1016 {
1017     return (usec * vdev->intr_coal_timer_info.mul) /
1018         vdev->intr_coal_timer_info.div;
1019 }
1020 
1021 u32 vnic_dev_intr_coal_timer_hw_to_usec(struct vnic_dev *vdev, u32 hw_cycles)
1022 {
1023     return (hw_cycles * vdev->intr_coal_timer_info.div) /
1024         vdev->intr_coal_timer_info.mul;
1025 }
1026 
1027 u32 vnic_dev_get_intr_coal_timer_max(struct vnic_dev *vdev)
1028 {
1029     return vdev->intr_coal_timer_info.max_usec;
1030 }
1031 
1032 void vnic_dev_unregister(struct vnic_dev *vdev)
1033 {
1034     if (vdev) {
1035         if (vdev->notify)
1036             dma_free_coherent(&vdev->pdev->dev,
1037                       sizeof(struct vnic_devcmd_notify),
1038                       vdev->notify, vdev->notify_pa);
1039         if (vdev->stats)
1040             dma_free_coherent(&vdev->pdev->dev,
1041                       sizeof(struct vnic_stats),
1042                       vdev->stats, vdev->stats_pa);
1043         if (vdev->fw_info)
1044             dma_free_coherent(&vdev->pdev->dev,
1045                       sizeof(struct vnic_devcmd_fw_info),
1046                       vdev->fw_info, vdev->fw_info_pa);
1047         if (vdev->devcmd2)
1048             vnic_dev_deinit_devcmd2(vdev);
1049 
1050         kfree(vdev);
1051     }
1052 }
1053 EXPORT_SYMBOL(vnic_dev_unregister);
1054 
1055 struct vnic_dev *vnic_dev_register(struct vnic_dev *vdev,
1056     void *priv, struct pci_dev *pdev, struct vnic_dev_bar *bar,
1057     unsigned int num_bars)
1058 {
1059     if (!vdev) {
1060         vdev = kzalloc(sizeof(struct vnic_dev), GFP_KERNEL);
1061         if (!vdev)
1062             return NULL;
1063     }
1064 
1065     vdev->priv = priv;
1066     vdev->pdev = pdev;
1067 
1068     if (vnic_dev_discover_res(vdev, bar, num_bars))
1069         goto err_out;
1070 
1071     return vdev;
1072 
1073 err_out:
1074     vnic_dev_unregister(vdev);
1075     return NULL;
1076 }
1077 EXPORT_SYMBOL(vnic_dev_register);
1078 
1079 struct pci_dev *vnic_dev_get_pdev(struct vnic_dev *vdev)
1080 {
1081     return vdev->pdev;
1082 }
1083 EXPORT_SYMBOL(vnic_dev_get_pdev);
1084 
1085 int vnic_devcmd_init(struct vnic_dev *vdev)
1086 {
1087     void __iomem *res;
1088     int err;
1089 
1090     res = vnic_dev_get_res(vdev, RES_TYPE_DEVCMD2, 0);
1091     if (res) {
1092         err = vnic_dev_init_devcmd2(vdev);
1093         if (err)
1094             vdev_warn(vdev, "DEVCMD2 init failed: %d, Using DEVCMD1\n",
1095                   err);
1096         else
1097             return 0;
1098     } else {
1099         vdev_warn(vdev, "DEVCMD2 resource not found (old firmware?) Using DEVCMD1\n");
1100     }
1101     err = vnic_dev_init_devcmd1(vdev);
1102     if (err)
1103         vdev_err(vdev, "DEVCMD1 initialization failed: %d\n", err);
1104 
1105     return err;
1106 }
1107 
1108 int vnic_dev_init_prov2(struct vnic_dev *vdev, u8 *buf, u32 len)
1109 {
1110     u64 a0, a1 = len;
1111     int wait = 1000;
1112     dma_addr_t prov_pa;
1113     void *prov_buf;
1114     int ret;
1115 
1116     prov_buf = dma_alloc_coherent(&vdev->pdev->dev, len, &prov_pa, GFP_ATOMIC);
1117     if (!prov_buf)
1118         return -ENOMEM;
1119 
1120     memcpy(prov_buf, buf, len);
1121 
1122     a0 = prov_pa;
1123 
1124     ret = vnic_dev_cmd(vdev, CMD_INIT_PROV_INFO2, &a0, &a1, wait);
1125 
1126     dma_free_coherent(&vdev->pdev->dev, len, prov_buf, prov_pa);
1127 
1128     return ret;
1129 }
1130 
1131 int vnic_dev_enable2(struct vnic_dev *vdev, int active)
1132 {
1133     u64 a0, a1 = 0;
1134     int wait = 1000;
1135 
1136     a0 = (active ? CMD_ENABLE2_ACTIVE : 0);
1137 
1138     return vnic_dev_cmd(vdev, CMD_ENABLE2, &a0, &a1, wait);
1139 }
1140 
1141 static int vnic_dev_cmd_status(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
1142     int *status)
1143 {
1144     u64 a0 = cmd, a1 = 0;
1145     int wait = 1000;
1146     int ret;
1147 
1148     ret = vnic_dev_cmd(vdev, CMD_STATUS, &a0, &a1, wait);
1149     if (!ret)
1150         *status = (int)a0;
1151 
1152     return ret;
1153 }
1154 
1155 int vnic_dev_enable2_done(struct vnic_dev *vdev, int *status)
1156 {
1157     return vnic_dev_cmd_status(vdev, CMD_ENABLE2, status);
1158 }
1159 
1160 int vnic_dev_deinit_done(struct vnic_dev *vdev, int *status)
1161 {
1162     return vnic_dev_cmd_status(vdev, CMD_DEINIT, status);
1163 }
1164 
1165 int vnic_dev_set_mac_addr(struct vnic_dev *vdev, u8 *mac_addr)
1166 {
1167     u64 a0, a1;
1168     int wait = 1000;
1169     int i;
1170 
1171     for (i = 0; i < ETH_ALEN; i++)
1172         ((u8 *)&a0)[i] = mac_addr[i];
1173 
1174     return vnic_dev_cmd(vdev, CMD_SET_MAC_ADDR, &a0, &a1, wait);
1175 }
1176 
1177 /* vnic_dev_classifier: Add/Delete classifier entries
1178  * @vdev: vdev of the device
1179  * @cmd: CLSF_ADD for Add filter
1180  *   CLSF_DEL for Delete filter
1181  * @entry: In case of ADD filter, the caller passes the RQ number in this
1182  *     variable.
1183  *
1184  *     This function stores the filter_id returned by the firmware in the
1185  *     same variable before return;
1186  *
1187  *     In case of DEL filter, the caller passes the RQ number. Return
1188  *     value is irrelevant.
1189  * @data: filter data
1190  */
1191 int vnic_dev_classifier(struct vnic_dev *vdev, u8 cmd, u16 *entry,
1192             struct filter *data)
1193 {
1194     u64 a0, a1;
1195     int wait = 1000;
1196     dma_addr_t tlv_pa;
1197     int ret = -EINVAL;
1198     struct filter_tlv *tlv, *tlv_va;
1199     struct filter_action *action;
1200     u64 tlv_size;
1201 
1202     if (cmd == CLSF_ADD) {
1203         tlv_size = sizeof(struct filter) +
1204                sizeof(struct filter_action) +
1205                2 * sizeof(struct filter_tlv);
1206         tlv_va = dma_alloc_coherent(&vdev->pdev->dev, tlv_size,
1207                         &tlv_pa, GFP_ATOMIC);
1208         if (!tlv_va)
1209             return -ENOMEM;
1210         tlv = tlv_va;
1211         a0 = tlv_pa;
1212         a1 = tlv_size;
1213         memset(tlv, 0, tlv_size);
1214         tlv->type = CLSF_TLV_FILTER;
1215         tlv->length = sizeof(struct filter);
1216         *(struct filter *)&tlv->val = *data;
1217 
1218         tlv = (struct filter_tlv *)((char *)tlv +
1219                         sizeof(struct filter_tlv) +
1220                         sizeof(struct filter));
1221 
1222         tlv->type = CLSF_TLV_ACTION;
1223         tlv->length = sizeof(struct filter_action);
1224         action = (struct filter_action *)&tlv->val;
1225         action->type = FILTER_ACTION_RQ_STEERING;
1226         action->u.rq_idx = *entry;
1227 
1228         ret = vnic_dev_cmd(vdev, CMD_ADD_FILTER, &a0, &a1, wait);
1229         *entry = (u16)a0;
1230         dma_free_coherent(&vdev->pdev->dev, tlv_size, tlv_va, tlv_pa);
1231     } else if (cmd == CLSF_DEL) {
1232         a0 = *entry;
1233         ret = vnic_dev_cmd(vdev, CMD_DEL_FILTER, &a0, &a1, wait);
1234     }
1235 
1236     return ret;
1237 }
1238 
1239 int vnic_dev_overlay_offload_ctrl(struct vnic_dev *vdev, u8 overlay, u8 config)
1240 {
1241     u64 a0 = overlay;
1242     u64 a1 = config;
1243     int wait = 1000;
1244 
1245     return vnic_dev_cmd(vdev, CMD_OVERLAY_OFFLOAD_CTRL, &a0, &a1, wait);
1246 }
1247 
1248 int vnic_dev_overlay_offload_cfg(struct vnic_dev *vdev, u8 overlay,
1249                  u16 vxlan_udp_port_number)
1250 {
1251     u64 a1 = vxlan_udp_port_number;
1252     u64 a0 = overlay;
1253     int wait = 1000;
1254 
1255     return vnic_dev_cmd(vdev, CMD_OVERLAY_OFFLOAD_CFG, &a0, &a1, wait);
1256 }
1257 
1258 int vnic_dev_get_supported_feature_ver(struct vnic_dev *vdev, u8 feature,
1259                        u64 *supported_versions, u64 *a1)
1260 {
1261     u64 a0 = feature;
1262     int wait = 1000;
1263     int ret;
1264 
1265     ret = vnic_dev_cmd(vdev, CMD_GET_SUPP_FEATURE_VER, &a0, a1, wait);
1266     if (!ret)
1267         *supported_versions = a0;
1268 
1269     return ret;
1270 }
1271 
1272 int vnic_dev_capable_rss_hash_type(struct vnic_dev *vdev, u8 *rss_hash_type)
1273 {
1274     u64 a0 = CMD_NIC_CFG, a1 = 0;
1275     int wait = 1000;
1276     int err;
1277 
1278     err = vnic_dev_cmd(vdev, CMD_CAPABILITY, &a0, &a1, wait);
1279     /* rss_hash_type is valid only when a0 is 1. Adapter which does not
1280      * support CMD_CAPABILITY for rss_hash_type has a0 = 0
1281      */
1282     if (err || (a0 != 1))
1283         return -EOPNOTSUPP;
1284 
1285     a1 = (a1 >> NIC_CFG_RSS_HASH_TYPE_SHIFT) &
1286          NIC_CFG_RSS_HASH_TYPE_MASK_FIELD;
1287 
1288     *rss_hash_type = (u8)a1;
1289 
1290     return 0;
1291 }
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