cisco/enic/vnic_cq.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.
0004  * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
0005  */
0006
0007 #include <linux/kernel.h>
0008 #include <linux/errno.h>
0009 #include <linux/types.h>
0010 #include <linux/pci.h>
0011
0012 #include "vnic_dev.h"
0013 #include "vnic_cq.h"
0014 #include "enic.h"
0015
0016 void vnic_cq_free(struct vnic_cq *cq)
0017 {
0018     vnic_dev_free_desc_ring(cq->vdev, &cq->ring);
0019
0020     cq->ctrl = NULL;
0021 }
0022
0023 int vnic_cq_alloc(struct vnic_dev *vdev, struct vnic_cq *cq, unsigned int index,
0024     unsigned int desc_count, unsigned int desc_size)
0025 {
0026     cq->index = index;
0027     cq->vdev = vdev;
0028
0029     cq->ctrl = vnic_dev_get_res(vdev, RES_TYPE_CQ, index);
0030     if (!cq->ctrl) {
0031         vdev_err(vdev, "Failed to hook CQ[%d] resource\n", index);
0032         return -EINVAL;
0033     }
0034
0035     return vnic_dev_alloc_desc_ring(vdev, &cq->ring, desc_count, desc_size);
0036 }
0037
0038 void vnic_cq_init(struct vnic_cq *cq, unsigned int flow_control_enable,
0039     unsigned int color_enable, unsigned int cq_head, unsigned int cq_tail,
0040     unsigned int cq_tail_color, unsigned int interrupt_enable,
0041     unsigned int cq_entry_enable, unsigned int cq_message_enable,
0042     unsigned int interrupt_offset, u64 cq_message_addr)
0043 {
0044     u64 paddr;
0045
0046     paddr = (u64)cq->ring.base_addr | VNIC_PADDR_TARGET;
0047     writeq(paddr, &cq->ctrl->ring_base);
0048     iowrite32(cq->ring.desc_count, &cq->ctrl->ring_size);
0049     iowrite32(flow_control_enable, &cq->ctrl->flow_control_enable);
0050     iowrite32(color_enable, &cq->ctrl->color_enable);
0051     iowrite32(cq_head, &cq->ctrl->cq_head);
0052     iowrite32(cq_tail, &cq->ctrl->cq_tail);
0053     iowrite32(cq_tail_color, &cq->ctrl->cq_tail_color);
0054     iowrite32(interrupt_enable, &cq->ctrl->interrupt_enable);
0055     iowrite32(cq_entry_enable, &cq->ctrl->cq_entry_enable);
0056     iowrite32(cq_message_enable, &cq->ctrl->cq_message_enable);
0057     iowrite32(interrupt_offset, &cq->ctrl->interrupt_offset);
0058     writeq(cq_message_addr, &cq->ctrl->cq_message_addr);
0059
0060     cq->interrupt_offset = interrupt_offset;
0061 }
0062
0063 void vnic_cq_clean(struct vnic_cq *cq)
0064 {
0065     cq->to_clean = 0;
0066     cq->last_color = 0;
0067
0068     iowrite32(0, &cq->ctrl->cq_head);
0069     iowrite32(0, &cq->ctrl->cq_tail);
0070     iowrite32(1, &cq->ctrl->cq_tail_color);
0071
0072     vnic_dev_clear_desc_ring(&cq->ring);
0073 }