cisco/enic/enic.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.
0004  * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
0005  */
0006
0007 #ifndef _ENIC_H_
0008 #define _ENIC_H_
0009
0010 #include "vnic_enet.h"
0011 #include "vnic_dev.h"
0012 #include "vnic_wq.h"
0013 #include "vnic_rq.h"
0014 #include "vnic_cq.h"
0015 #include "vnic_intr.h"
0016 #include "vnic_stats.h"
0017 #include "vnic_nic.h"
0018 #include "vnic_rss.h"
0019 #include <linux/irq.h>
0020
0021 #define DRV_NAME        "enic"
0022 #define DRV_DESCRIPTION     "Cisco VIC Ethernet NIC Driver"
0023
0024 #define ENIC_BARS_MAX       6
0025
0026 #define ENIC_WQ_MAX     8
0027 #define ENIC_RQ_MAX     8
0028 #define ENIC_CQ_MAX     (ENIC_WQ_MAX + ENIC_RQ_MAX)
0029 #define ENIC_INTR_MAX       (ENIC_CQ_MAX + 2)
0030
0031 #define ENIC_WQ_NAPI_BUDGET 256
0032
0033 #define ENIC_AIC_LARGE_PKT_DIFF 3
0034
0035 struct enic_msix_entry {
0036     int requested;
0037     char devname[IFNAMSIZ + 8];
0038     irqreturn_t (*isr)(int, void *);
0039     void *devid;
0040     cpumask_var_t affinity_mask;
0041 };
0042
0043 /* Store only the lower range.  Higher range is given by fw. */
0044 struct enic_intr_mod_range {
0045     u32 small_pkt_range_start;
0046     u32 large_pkt_range_start;
0047 };
0048
0049 struct enic_intr_mod_table {
0050     u32 rx_rate;
0051     u32 range_percent;
0052 };
0053
0054 #define ENIC_MAX_LINK_SPEEDS        3
0055 #define ENIC_LINK_SPEED_10G     10000
0056 #define ENIC_LINK_SPEED_4G      4000
0057 #define ENIC_LINK_40G_INDEX     2
0058 #define ENIC_LINK_10G_INDEX     1
0059 #define ENIC_LINK_4G_INDEX      0
0060 #define ENIC_RX_COALESCE_RANGE_END  125
0061 #define ENIC_AIC_TS_BREAK       100
0062
0063 struct enic_rx_coal {
0064     u32 small_pkt_range_start;
0065     u32 large_pkt_range_start;
0066     u32 range_end;
0067     u32 use_adaptive_rx_coalesce;
0068 };
0069
0070 /* priv_flags */
0071 #define ENIC_SRIOV_ENABLED      (1 << 0)
0072
0073 /* enic port profile set flags */
0074 #define ENIC_PORT_REQUEST_APPLIED   (1 << 0)
0075 #define ENIC_SET_REQUEST        (1 << 1)
0076 #define ENIC_SET_NAME           (1 << 2)
0077 #define ENIC_SET_INSTANCE       (1 << 3)
0078 #define ENIC_SET_HOST           (1 << 4)
0079
0080 struct enic_port_profile {
0081     u32 set;
0082     u8 request;
0083     char name[PORT_PROFILE_MAX];
0084     u8 instance_uuid[PORT_UUID_MAX];
0085     u8 host_uuid[PORT_UUID_MAX];
0086     u8 vf_mac[ETH_ALEN];
0087     u8 mac_addr[ETH_ALEN];
0088 };
0089
0090 /* enic_rfs_fltr_node - rfs filter node in hash table
0091  *  @@keys: IPv4 5 tuple
0092  *  @flow_id: flow_id of clsf filter provided by kernel
0093  *  @fltr_id: filter id of clsf filter returned by adaptor
0094  *  @rq_id: desired rq index
0095  *  @node: hlist_node
0096  */
0097 struct enic_rfs_fltr_node {
0098     struct flow_keys keys;
0099     u32 flow_id;
0100     u16 fltr_id;
0101     u16 rq_id;
0102     struct hlist_node node;
0103 };
0104
0105 /* enic_rfs_flw_tbl - rfs flow table
0106  *  @max: Maximum number of filters vNIC supports
0107  *  @free: Number of free filters available
0108  *  @toclean: hash table index to clean next
0109  *  @ht_head: hash table list head
0110  *  @lock: spin lock
0111  *  @rfs_may_expire: timer function for enic_rps_may_expire_flow
0112  */
0113 struct enic_rfs_flw_tbl {
0114     u16 max;
0115     int free;
0116
0117 #define ENIC_RFS_FLW_BITSHIFT   (10)
0118 #define ENIC_RFS_FLW_MASK   ((1 << ENIC_RFS_FLW_BITSHIFT) - 1)
0119     u16 toclean:ENIC_RFS_FLW_BITSHIFT;
0120     struct hlist_head ht_head[1 << ENIC_RFS_FLW_BITSHIFT];
0121     spinlock_t lock;
0122     struct timer_list rfs_may_expire;
0123 };
0124
0125 struct vxlan_offload {
0126     u16 vxlan_udp_port_number;
0127     u8 patch_level;
0128     u8 flags;
0129 };
0130
0131 /* Per-instance private data structure */
0132 struct enic {
0133     struct net_device *netdev;
0134     struct pci_dev *pdev;
0135     struct vnic_enet_config config;
0136     struct vnic_dev_bar bar[ENIC_BARS_MAX];
0137     struct vnic_dev *vdev;
0138     struct timer_list notify_timer;
0139     struct work_struct reset;
0140     struct work_struct tx_hang_reset;
0141     struct work_struct change_mtu_work;
0142     struct msix_entry msix_entry[ENIC_INTR_MAX];
0143     struct enic_msix_entry msix[ENIC_INTR_MAX];
0144     u32 msg_enable;
0145     spinlock_t devcmd_lock;
0146     u8 mac_addr[ETH_ALEN];
0147     unsigned int flags;
0148     unsigned int priv_flags;
0149     unsigned int mc_count;
0150     unsigned int uc_count;
0151     u32 port_mtu;
0152     struct enic_rx_coal rx_coalesce_setting;
0153     u32 rx_coalesce_usecs;
0154     u32 tx_coalesce_usecs;
0155 #ifdef CONFIG_PCI_IOV
0156     u16 num_vfs;
0157 #endif
0158     spinlock_t enic_api_lock;
0159     bool enic_api_busy;
0160     struct enic_port_profile *pp;
0161
0162     /* work queue cache line section */
0163     ____cacheline_aligned struct vnic_wq wq[ENIC_WQ_MAX];
0164     spinlock_t wq_lock[ENIC_WQ_MAX];
0165     unsigned int wq_count;
0166     u16 loop_enable;
0167     u16 loop_tag;
0168
0169     /* receive queue cache line section */
0170     ____cacheline_aligned struct vnic_rq rq[ENIC_RQ_MAX];
0171     unsigned int rq_count;
0172     struct vxlan_offload vxlan;
0173     u64 rq_truncated_pkts;
0174     u64 rq_bad_fcs;
0175     struct napi_struct napi[ENIC_RQ_MAX + ENIC_WQ_MAX];
0176
0177     /* interrupt resource cache line section */
0178     ____cacheline_aligned struct vnic_intr intr[ENIC_INTR_MAX];
0179     unsigned int intr_count;
0180     u32 __iomem *legacy_pba;        /* memory-mapped */
0181
0182     /* completion queue cache line section */
0183     ____cacheline_aligned struct vnic_cq cq[ENIC_CQ_MAX];
0184     unsigned int cq_count;
0185     struct enic_rfs_flw_tbl rfs_h;
0186     u32 rx_copybreak;
0187     u8 rss_key[ENIC_RSS_LEN];
0188     struct vnic_gen_stats gen_stats;
0189 };
0190
0191 static inline struct net_device *vnic_get_netdev(struct vnic_dev *vdev)
0192 {
0193     struct enic *enic = vdev->priv;
0194
0195     return enic->netdev;
0196 }
0197
0198 /* wrappers function for kernel log
0199  */
0200 #define vdev_err(vdev, fmt, ...)                    \
0201     dev_err(&(vdev)->pdev->dev, fmt, ##__VA_ARGS__)
0202 #define vdev_warn(vdev, fmt, ...)                   \
0203     dev_warn(&(vdev)->pdev->dev, fmt, ##__VA_ARGS__)
0204 #define vdev_info(vdev, fmt, ...)                   \
0205     dev_info(&(vdev)->pdev->dev, fmt, ##__VA_ARGS__)
0206
0207 #define vdev_neterr(vdev, fmt, ...)                 \
0208     netdev_err(vnic_get_netdev(vdev), fmt, ##__VA_ARGS__)
0209 #define vdev_netwarn(vdev, fmt, ...)                    \
0210     netdev_warn(vnic_get_netdev(vdev), fmt, ##__VA_ARGS__)
0211 #define vdev_netinfo(vdev, fmt, ...)                    \
0212     netdev_info(vnic_get_netdev(vdev), fmt, ##__VA_ARGS__)
0213
0214 static inline struct device *enic_get_dev(struct enic *enic)
0215 {
0216     return &(enic->pdev->dev);
0217 }
0218
0219 static inline unsigned int enic_cq_rq(struct enic *enic, unsigned int rq)
0220 {
0221     return rq;
0222 }
0223
0224 static inline unsigned int enic_cq_wq(struct enic *enic, unsigned int wq)
0225 {
0226     return enic->rq_count + wq;
0227 }
0228
0229 static inline unsigned int enic_legacy_io_intr(void)
0230 {
0231     return 0;
0232 }
0233
0234 static inline unsigned int enic_legacy_err_intr(void)
0235 {
0236     return 1;
0237 }
0238
0239 static inline unsigned int enic_legacy_notify_intr(void)
0240 {
0241     return 2;
0242 }
0243
0244 static inline unsigned int enic_msix_rq_intr(struct enic *enic,
0245     unsigned int rq)
0246 {
0247     return enic->cq[enic_cq_rq(enic, rq)].interrupt_offset;
0248 }
0249
0250 static inline unsigned int enic_msix_wq_intr(struct enic *enic,
0251     unsigned int wq)
0252 {
0253     return enic->cq[enic_cq_wq(enic, wq)].interrupt_offset;
0254 }
0255
0256 static inline unsigned int enic_msix_err_intr(struct enic *enic)
0257 {
0258     return enic->rq_count + enic->wq_count;
0259 }
0260
0261 static inline unsigned int enic_msix_notify_intr(struct enic *enic)
0262 {
0263     return enic->rq_count + enic->wq_count + 1;
0264 }
0265
0266 static inline bool enic_is_err_intr(struct enic *enic, int intr)
0267 {
0268     switch (vnic_dev_get_intr_mode(enic->vdev)) {
0269     case VNIC_DEV_INTR_MODE_INTX:
0270         return intr == enic_legacy_err_intr();
0271     case VNIC_DEV_INTR_MODE_MSIX:
0272         return intr == enic_msix_err_intr(enic);
0273     case VNIC_DEV_INTR_MODE_MSI:
0274     default:
0275         return false;
0276     }
0277 }
0278
0279 static inline bool enic_is_notify_intr(struct enic *enic, int intr)
0280 {
0281     switch (vnic_dev_get_intr_mode(enic->vdev)) {
0282     case VNIC_DEV_INTR_MODE_INTX:
0283         return intr == enic_legacy_notify_intr();
0284     case VNIC_DEV_INTR_MODE_MSIX:
0285         return intr == enic_msix_notify_intr(enic);
0286     case VNIC_DEV_INTR_MODE_MSI:
0287     default:
0288         return false;
0289     }
0290 }
0291
0292 static inline int enic_dma_map_check(struct enic *enic, dma_addr_t dma_addr)
0293 {
0294     if (unlikely(dma_mapping_error(&enic->pdev->dev, dma_addr))) {
0295         net_warn_ratelimited("%s: PCI dma mapping failed!\n",
0296                      enic->netdev->name);
0297         enic->gen_stats.dma_map_error++;
0298
0299         return -ENOMEM;
0300     }
0301
0302     return 0;
0303 }
0304
0305 void enic_reset_addr_lists(struct enic *enic);
0306 int enic_sriov_enabled(struct enic *enic);
0307 int enic_is_valid_vf(struct enic *enic, int vf);
0308 int enic_is_dynamic(struct enic *enic);
0309 void enic_set_ethtool_ops(struct net_device *netdev);
0310 int __enic_set_rsskey(struct enic *enic);
0311
0312 #endif /* _ENIC_H_ */