chelsio/cxgb4vf/t4vf_common.h

0001 /*
0002  * This file is part of the Chelsio T4 PCI-E SR-IOV Virtual Function Ethernet
0003  * driver for Linux.
0004  *
0005  * Copyright (c) 2009-2010 Chelsio Communications, Inc. All rights reserved.
0006  *
0007  * This software is available to you under a choice of one of two
0008  * licenses.  You may choose to be licensed under the terms of the GNU
0009  * General Public License (GPL) Version 2, available from the file
0010  * COPYING in the main directory of this source tree, or the
0011  * OpenIB.org BSD license below:
0012  *
0013  *     Redistribution and use in source and binary forms, with or
0014  *     without modification, are permitted provided that the following
0015  *     conditions are met:
0016  *
0017  *      - Redistributions of source code must retain the above
0018  *        copyright notice, this list of conditions and the following
0019  *        disclaimer.
0020  *
0021  *      - Redistributions in binary form must reproduce the above
0022  *        copyright notice, this list of conditions and the following
0023  *        disclaimer in the documentation and/or other materials
0024  *        provided with the distribution.
0025  *
0026  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
0027  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
0028  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
0029  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
0030  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
0031  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
0032  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
0033  * SOFTWARE.
0034  */
0035
0036 #ifndef __T4VF_COMMON_H__
0037 #define __T4VF_COMMON_H__
0038
0039 #include "../cxgb4/t4_hw.h"
0040 #include "../cxgb4/t4fw_api.h"
0041
0042 #define CHELSIO_CHIP_CODE(version, revision) (((version) << 4) | (revision))
0043 #define CHELSIO_CHIP_VERSION(code) (((code) >> 4) & 0xf)
0044 #define CHELSIO_CHIP_RELEASE(code) ((code) & 0xf)
0045
0046 /* All T4 and later chips have their PCI-E Device IDs encoded as 0xVFPP where:
0047  *
0048  *   V  = "4" for T4; "5" for T5, etc. or
0049  *      = "a" for T4 FPGA; "b" for T4 FPGA, etc.
0050  *   F  = "0" for PF 0..3; "4".."7" for PF4..7; and "8" for VFs
0051  *   PP = adapter product designation
0052  */
0053 #define CHELSIO_T4      0x4
0054 #define CHELSIO_T5      0x5
0055 #define CHELSIO_T6      0x6
0056
0057 enum chip_type {
0058     T4_A1 = CHELSIO_CHIP_CODE(CHELSIO_T4, 1),
0059     T4_A2 = CHELSIO_CHIP_CODE(CHELSIO_T4, 2),
0060     T4_FIRST_REV    = T4_A1,
0061     T4_LAST_REV = T4_A2,
0062
0063     T5_A0 = CHELSIO_CHIP_CODE(CHELSIO_T5, 0),
0064     T5_A1 = CHELSIO_CHIP_CODE(CHELSIO_T5, 1),
0065     T5_FIRST_REV    = T5_A0,
0066     T5_LAST_REV = T5_A1,
0067 };
0068
0069 /*
0070  * The "len16" field of a Firmware Command Structure ...
0071  */
0072 #define FW_LEN16(fw_struct) FW_CMD_LEN16_V(sizeof(fw_struct) / 16)
0073
0074 /*
0075  * Per-VF statistics.
0076  */
0077 struct t4vf_port_stats {
0078     /*
0079      * TX statistics.
0080      */
0081     u64 tx_bcast_bytes;     /* broadcast */
0082     u64 tx_bcast_frames;
0083     u64 tx_mcast_bytes;     /* multicast */
0084     u64 tx_mcast_frames;
0085     u64 tx_ucast_bytes;     /* unicast */
0086     u64 tx_ucast_frames;
0087     u64 tx_drop_frames;     /* TX dropped frames */
0088     u64 tx_offload_bytes;       /* offload */
0089     u64 tx_offload_frames;
0090
0091     /*
0092      * RX statistics.
0093      */
0094     u64 rx_bcast_bytes;     /* broadcast */
0095     u64 rx_bcast_frames;
0096     u64 rx_mcast_bytes;     /* multicast */
0097     u64 rx_mcast_frames;
0098     u64 rx_ucast_bytes;
0099     u64 rx_ucast_frames;        /* unicast */
0100
0101     u64 rx_err_frames;      /* RX error frames */
0102 };
0103
0104 /*
0105  * Per-"port" (Virtual Interface) link configuration ...
0106  */
0107 typedef u16 fw_port_cap16_t;    /* 16-bit Port Capabilities integral value */
0108 typedef u32 fw_port_cap32_t;    /* 32-bit Port Capabilities integral value */
0109
0110 enum fw_caps {
0111     FW_CAPS_UNKNOWN = 0,    /* 0'ed out initial state */
0112     FW_CAPS16   = 1,    /* old Firmware: 16-bit Port Capabilities */
0113     FW_CAPS32   = 2,    /* new Firmware: 32-bit Port Capabilities */
0114 };
0115
0116 enum cc_pause {
0117     PAUSE_RX    = 1 << 0,
0118     PAUSE_TX    = 1 << 1,
0119     PAUSE_AUTONEG   = 1 << 2
0120 };
0121
0122 enum cc_fec {
0123     FEC_AUTO    = 1 << 0,   /* IEEE 802.3 "automatic" */
0124     FEC_RS      = 1 << 1,   /* Reed-Solomon */
0125     FEC_BASER_RS    = 1 << 2,   /* BaseR/Reed-Solomon */
0126 };
0127
0128 struct link_config {
0129     fw_port_cap32_t pcaps;      /* link capabilities */
0130     fw_port_cap32_t acaps;      /* advertised capabilities */
0131     fw_port_cap32_t lpacaps;    /* peer advertised capabilities */
0132
0133     fw_port_cap32_t speed_caps; /* speed(s) user has requested */
0134     u32     speed;      /* actual link speed */
0135
0136     enum cc_pause   requested_fc;   /* flow control user has requested */
0137     enum cc_pause   fc;     /* actual link flow control */
0138     enum cc_pause   advertised_fc;  /* actual advertised flow control */
0139
0140     enum cc_fec auto_fec;   /* Forward Error Correction: */
0141     enum cc_fec requested_fec;  /*   "automatic" (IEEE 802.3), */
0142     enum cc_fec fec;        /*   requested, and actual in use */
0143
0144     unsigned char   autoneg;    /* autonegotiating? */
0145
0146     unsigned char   link_ok;    /* link up? */
0147     unsigned char   link_down_rc;   /* link down reason */
0148 };
0149
0150 /* Return true if the Link Configuration supports "High Speeds" (those greater
0151  * than 1Gb/s).
0152  */
0153 static inline bool is_x_10g_port(const struct link_config *lc)
0154 {
0155     fw_port_cap32_t speeds, high_speeds;
0156
0157     speeds = FW_PORT_CAP32_SPEED_V(FW_PORT_CAP32_SPEED_G(lc->pcaps));
0158     high_speeds =
0159         speeds & ~(FW_PORT_CAP32_SPEED_100M | FW_PORT_CAP32_SPEED_1G);
0160
0161     return high_speeds != 0;
0162 }
0163
0164 /*
0165  * General device parameters ...
0166  */
0167 struct dev_params {
0168     u32 fwrev;          /* firmware version */
0169     u32 tprev;          /* TP Microcode Version */
0170 };
0171
0172 /*
0173  * Scatter Gather Engine parameters.  These are almost all determined by the
0174  * Physical Function Driver.  We just need to grab them to see within which
0175  * environment we're playing ...
0176  */
0177 struct sge_params {
0178     u32 sge_control;        /* padding, boundaries, lengths, etc. */
0179     u32 sge_control2;       /* T5: more of the same */
0180     u32 sge_host_page_size;     /* PF0-7 page sizes */
0181     u32 sge_egress_queues_per_page; /* PF0-7 egress queues/page */
0182     u32 sge_ingress_queues_per_page;/* PF0-7 ingress queues/page */
0183     u32 sge_vf_hps;                 /* host page size for our vf */
0184     u32 sge_vf_eq_qpp;      /* egress queues/page for our VF */
0185     u32 sge_vf_iq_qpp;      /* ingress queues/page for our VF */
0186     u32 sge_fl_buffer_size[16]; /* free list buffer sizes */
0187     u32 sge_ingress_rx_threshold;   /* RX counter interrupt threshold[4] */
0188     u32 sge_congestion_control;     /* congestion thresholds, etc. */
0189     u32 sge_timer_value_0_and_1;    /* interrupt coalescing timer values */
0190     u32 sge_timer_value_2_and_3;
0191     u32 sge_timer_value_4_and_5;
0192 };
0193
0194 /*
0195  * Vital Product Data parameters.
0196  */
0197 struct vpd_params {
0198     u32 cclk;           /* Core Clock (KHz) */
0199 };
0200
0201 /* Stores chip specific parameters */
0202 struct arch_specific_params {
0203     u32 sge_fl_db;
0204     u16 mps_tcam_size;
0205 };
0206
0207 /*
0208  * Global Receive Side Scaling (RSS) parameters in host-native format.
0209  */
0210 struct rss_params {
0211     unsigned int mode;      /* RSS mode */
0212     union {
0213         struct {
0214         unsigned int synmapen:1;    /* SYN Map Enable */
0215         unsigned int syn4tupenipv6:1;   /* enable hashing 4-tuple IPv6 SYNs */
0216         unsigned int syn2tupenipv6:1;   /* enable hashing 2-tuple IPv6 SYNs */
0217         unsigned int syn4tupenipv4:1;   /* enable hashing 4-tuple IPv4 SYNs */
0218         unsigned int syn2tupenipv4:1;   /* enable hashing 2-tuple IPv4 SYNs */
0219         unsigned int ofdmapen:1;    /* Offload Map Enable */
0220         unsigned int tnlmapen:1;    /* Tunnel Map Enable */
0221         unsigned int tnlalllookup:1;    /* Tunnel All Lookup */
0222         unsigned int hashtoeplitz:1;    /* use Toeplitz hash */
0223         } basicvirtual;
0224     } u;
0225 };
0226
0227 /*
0228  * Virtual Interface RSS Configuration in host-native format.
0229  */
0230 union rss_vi_config {
0231     struct {
0232     u16 defaultq;           /* Ingress Queue ID for !tnlalllookup */
0233     unsigned int ip6fourtupen:1;    /* hash 4-tuple IPv6 ingress packets */
0234     unsigned int ip6twotupen:1; /* hash 2-tuple IPv6 ingress packets */
0235     unsigned int ip4fourtupen:1;    /* hash 4-tuple IPv4 ingress packets */
0236     unsigned int ip4twotupen:1; /* hash 2-tuple IPv4 ingress packets */
0237     int udpen;          /* hash 4-tuple UDP ingress packets */
0238     } basicvirtual;
0239 };
0240
0241 /*
0242  * Maximum resources provisioned for a PCI VF.
0243  */
0244 struct vf_resources {
0245     unsigned int nvi;       /* N virtual interfaces */
0246     unsigned int neq;       /* N egress Qs */
0247     unsigned int nethctrl;      /* N egress ETH or CTRL Qs */
0248     unsigned int niqflint;      /* N ingress Qs/w free list(s) & intr */
0249     unsigned int niq;       /* N ingress Qs */
0250     unsigned int tc;        /* PCI-E traffic class */
0251     unsigned int pmask;     /* port access rights mask */
0252     unsigned int nexactf;       /* N exact MPS filters */
0253     unsigned int r_caps;        /* read capabilities */
0254     unsigned int wx_caps;       /* write/execute capabilities */
0255 };
0256
0257 /*
0258  * Per-"adapter" (Virtual Function) parameters.
0259  */
0260 struct adapter_params {
0261     struct dev_params dev;      /* general device parameters */
0262     struct sge_params sge;      /* Scatter Gather Engine */
0263     struct vpd_params vpd;      /* Vital Product Data */
0264     struct rss_params rss;      /* Receive Side Scaling */
0265     struct vf_resources vfres;  /* Virtual Function Resource limits */
0266     struct arch_specific_params arch; /* chip specific params */
0267     enum chip_type chip;        /* chip code */
0268     u8 nports;          /* # of Ethernet "ports" */
0269     u8 fw_caps_support;     /* 32-bit Port Capabilities */
0270 };
0271
0272 /* Firmware Mailbox Command/Reply log.  All values are in Host-Endian format.
0273  * The access and execute times are signed in order to accommodate negative
0274  * error returns.
0275  */
0276 struct mbox_cmd {
0277     u64 cmd[MBOX_LEN / 8];      /* a Firmware Mailbox Command/Reply */
0278     u64 timestamp;          /* OS-dependent timestamp */
0279     u32 seqno;          /* sequence number */
0280     s16 access;         /* time (ms) to access mailbox */
0281     s16 execute;            /* time (ms) to execute */
0282 };
0283
0284 struct mbox_cmd_log {
0285     unsigned int size;      /* number of entries in the log */
0286     unsigned int cursor;        /* next position in the log to write */
0287     u32 seqno;          /* next sequence number */
0288     /* variable length mailbox command log starts here */
0289 };
0290
0291 /* Given a pointer to a Firmware Mailbox Command Log and a log entry index,
0292  * return a pointer to the specified entry.
0293  */
0294 static inline struct mbox_cmd *mbox_cmd_log_entry(struct mbox_cmd_log *log,
0295                           unsigned int entry_idx)
0296 {
0297     return &((struct mbox_cmd *)&(log)[1])[entry_idx];
0298 }
0299
0300 #include "adapter.h"
0301
0302 #ifndef PCI_VENDOR_ID_CHELSIO
0303 # define PCI_VENDOR_ID_CHELSIO 0x1425
0304 #endif
0305
0306 #define for_each_port(adapter, iter) \
0307     for (iter = 0; iter < (adapter)->params.nports; iter++)
0308
0309 static inline unsigned int core_ticks_per_usec(const struct adapter *adapter)
0310 {
0311     return adapter->params.vpd.cclk / 1000;
0312 }
0313
0314 static inline unsigned int us_to_core_ticks(const struct adapter *adapter,
0315                         unsigned int us)
0316 {
0317     return (us * adapter->params.vpd.cclk) / 1000;
0318 }
0319
0320 static inline unsigned int core_ticks_to_us(const struct adapter *adapter,
0321                         unsigned int ticks)
0322 {
0323     return (ticks * 1000) / adapter->params.vpd.cclk;
0324 }
0325
0326 int t4vf_wr_mbox_core(struct adapter *, const void *, int, void *, bool);
0327
0328 static inline int t4vf_wr_mbox(struct adapter *adapter, const void *cmd,
0329                    int size, void *rpl)
0330 {
0331     return t4vf_wr_mbox_core(adapter, cmd, size, rpl, true);
0332 }
0333
0334 static inline int t4vf_wr_mbox_ns(struct adapter *adapter, const void *cmd,
0335                   int size, void *rpl)
0336 {
0337     return t4vf_wr_mbox_core(adapter, cmd, size, rpl, false);
0338 }
0339
0340 #define CHELSIO_PCI_ID_VER(dev_id)  ((dev_id) >> 12)
0341
0342 static inline int is_t4(enum chip_type chip)
0343 {
0344     return CHELSIO_CHIP_VERSION(chip) == CHELSIO_T4;
0345 }
0346
0347 /**
0348  *  hash_mac_addr - return the hash value of a MAC address
0349  *  @addr: the 48-bit Ethernet MAC address
0350  *
0351  *  Hashes a MAC address according to the hash function used by hardware
0352  *  inexact (hash) address matching.
0353  */
0354 static inline int hash_mac_addr(const u8 *addr)
0355 {
0356     u32 a = ((u32)addr[0] << 16) | ((u32)addr[1] << 8) | addr[2];
0357     u32 b = ((u32)addr[3] << 16) | ((u32)addr[4] << 8) | addr[5];
0358
0359     a ^= b;
0360     a ^= (a >> 12);
0361     a ^= (a >> 6);
0362     return a & 0x3f;
0363 }
0364
0365 int t4vf_wait_dev_ready(struct adapter *);
0366 int t4vf_port_init(struct adapter *, int);
0367
0368 int t4vf_fw_reset(struct adapter *);
0369 int t4vf_set_params(struct adapter *, unsigned int, const u32 *, const u32 *);
0370
0371 int t4vf_fl_pkt_align(struct adapter *adapter);
0372 enum t4_bar2_qtype { T4_BAR2_QTYPE_EGRESS, T4_BAR2_QTYPE_INGRESS };
0373 int t4vf_bar2_sge_qregs(struct adapter *adapter,
0374             unsigned int qid,
0375             enum t4_bar2_qtype qtype,
0376             u64 *pbar2_qoffset,
0377             unsigned int *pbar2_qid);
0378
0379 unsigned int t4vf_get_pf_from_vf(struct adapter *);
0380 int t4vf_get_sge_params(struct adapter *);
0381 int t4vf_get_vpd_params(struct adapter *);
0382 int t4vf_get_dev_params(struct adapter *);
0383 int t4vf_get_rss_glb_config(struct adapter *);
0384 int t4vf_get_vfres(struct adapter *);
0385
0386 int t4vf_read_rss_vi_config(struct adapter *, unsigned int,
0387                 union rss_vi_config *);
0388 int t4vf_write_rss_vi_config(struct adapter *, unsigned int,
0389                  union rss_vi_config *);
0390 int t4vf_config_rss_range(struct adapter *, unsigned int, int, int,
0391               const u16 *, int);
0392
0393 int t4vf_alloc_vi(struct adapter *, int);
0394 int t4vf_free_vi(struct adapter *, int);
0395 int t4vf_enable_vi(struct adapter *adapter, unsigned int viid, bool rx_en,
0396            bool tx_en);
0397 int t4vf_enable_pi(struct adapter *adapter, struct port_info *pi, bool rx_en,
0398            bool tx_en);
0399 int t4vf_identify_port(struct adapter *, unsigned int, unsigned int);
0400
0401 int t4vf_set_rxmode(struct adapter *, unsigned int, int, int, int, int, int,
0402             bool);
0403 int t4vf_alloc_mac_filt(struct adapter *, unsigned int, bool, unsigned int,
0404             const u8 **, u16 *, u64 *, bool);
0405 int t4vf_free_mac_filt(struct adapter *, unsigned int, unsigned int naddr,
0406                const u8 **, bool);
0407 int t4vf_change_mac(struct adapter *, unsigned int, int, const u8 *, bool);
0408 int t4vf_set_addr_hash(struct adapter *, unsigned int, bool, u64, bool);
0409 int t4vf_get_port_stats(struct adapter *, int, struct t4vf_port_stats *);
0410
0411 int t4vf_iq_free(struct adapter *, unsigned int, unsigned int, unsigned int,
0412          unsigned int);
0413 int t4vf_eth_eq_free(struct adapter *, unsigned int);
0414
0415 int t4vf_update_port_info(struct port_info *pi);
0416 int t4vf_handle_fw_rpl(struct adapter *, const __be64 *);
0417 int t4vf_prep_adapter(struct adapter *);
0418 int t4vf_get_vf_mac_acl(struct adapter *adapter, unsigned int port,
0419             unsigned int *naddr, u8 *addr);
0420 int t4vf_get_vf_vlan_acl(struct adapter *adapter);
0421
0422 #endif /* __T4VF_COMMON_H__ */