chelsio/cxgb4vf/adapter.h

0001 /*
0002  * This file is part of the Chelsio T4 PCI-E SR-IOV Virtual Function Ethernet
0003  * driver for Linux.
0004  *
0005  * Copyright (c) 2009-2010 Chelsio Communications, Inc. All rights reserved.
0006  *
0007  * This software is available to you under a choice of one of two
0008  * licenses.  You may choose to be licensed under the terms of the GNU
0009  * General Public License (GPL) Version 2, available from the file
0010  * COPYING in the main directory of this source tree, or the
0011  * OpenIB.org BSD license below:
0012  *
0013  *     Redistribution and use in source and binary forms, with or
0014  *     without modification, are permitted provided that the following
0015  *     conditions are met:
0016  *
0017  *      - Redistributions of source code must retain the above
0018  *        copyright notice, this list of conditions and the following
0019  *        disclaimer.
0020  *
0021  *      - Redistributions in binary form must reproduce the above
0022  *        copyright notice, this list of conditions and the following
0023  *        disclaimer in the documentation and/or other materials
0024  *        provided with the distribution.
0025  *
0026  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
0027  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
0028  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
0029  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
0030  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
0031  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
0032  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
0033  * SOFTWARE.
0034  */
0035
0036 /*
0037  * This file should not be included directly.  Include t4vf_common.h instead.
0038  */
0039
0040 #ifndef __CXGB4VF_ADAPTER_H__
0041 #define __CXGB4VF_ADAPTER_H__
0042
0043 #include <linux/etherdevice.h>
0044 #include <linux/interrupt.h>
0045 #include <linux/pci.h>
0046 #include <linux/spinlock.h>
0047 #include <linux/skbuff.h>
0048 #include <linux/if_ether.h>
0049 #include <linux/netdevice.h>
0050
0051 #include "../cxgb4/t4_hw.h"
0052
0053 /*
0054  * Constants of the implementation.
0055  */
0056 enum {
0057     MAX_NPORTS  = 1,        /* max # of "ports" */
0058     MAX_PORT_QSETS  = 8,        /* max # of Queue Sets / "port" */
0059     MAX_ETH_QSETS   = MAX_NPORTS*MAX_PORT_QSETS,
0060
0061     /*
0062      * MSI-X interrupt index usage.
0063      */
0064     MSIX_FW     = 0,        /* MSI-X index for firmware Q */
0065     MSIX_IQFLINT    = 1,        /* MSI-X index base for Ingress Qs */
0066     MSIX_EXTRAS = 1,
0067     MSIX_ENTRIES    = MAX_ETH_QSETS + MSIX_EXTRAS,
0068
0069     /*
0070      * The maximum number of Ingress and Egress Queues is determined by
0071      * the maximum number of "Queue Sets" which we support plus any
0072      * ancillary queues.  Each "Queue Set" requires one Ingress Queue
0073      * for RX Packet Ingress Event notifications and two Egress Queues for
0074      * a Free List and an Ethernet TX list.
0075      */
0076     INGQ_EXTRAS = 2,        /* firmware event queue and */
0077                     /*   forwarded interrupts */
0078     MAX_INGQ    = MAX_ETH_QSETS+INGQ_EXTRAS,
0079     MAX_EGRQ    = MAX_ETH_QSETS*2,
0080 };
0081
0082 /*
0083  * Forward structure definition references.
0084  */
0085 struct adapter;
0086 struct sge_eth_rxq;
0087 struct sge_rspq;
0088
0089 /*
0090  * Per-"port" information.  This is really per-Virtual Interface information
0091  * but the use of the "port" nomanclature makes it easier to go back and forth
0092  * between the PF and VF drivers ...
0093  */
0094 struct port_info {
0095     struct adapter *adapter;    /* our adapter */
0096     u32 vlan_id;            /* vlan id for VST */
0097     u16 viid;           /* virtual interface ID */
0098     int xact_addr_filt;     /* index of our MAC address filter */
0099     u16 rss_size;           /* size of VI's RSS table slice */
0100     u8 pidx;            /* index into adapter port[] */
0101     s8 mdio_addr;
0102     u8 port_type;           /* firmware port type */
0103     u8 mod_type;            /* firmware module type */
0104     u8 port_id;         /* physical port ID */
0105     u8 nqsets;          /* # of "Queue Sets" */
0106     u8 first_qset;          /* index of first "Queue Set" */
0107     struct link_config link_cfg;    /* physical port configuration */
0108 };
0109
0110 /*
0111  * Scatter Gather Engine resources for the "adapter".  Our ingress and egress
0112  * queues are organized into "Queue Sets" with one ingress and one egress
0113  * queue per Queue Set.  These Queue Sets are aportionable between the "ports"
0114  * (Virtual Interfaces).  One extra ingress queue is used to receive
0115  * asynchronous messages from the firmware.  Note that the "Queue IDs" that we
0116  * use here are really "Relative Queue IDs" which are returned as part of the
0117  * firmware command to allocate queues.  These queue IDs are relative to the
0118  * absolute Queue ID base of the section of the Queue ID space allocated to
0119  * the PF/VF.
0120  */
0121
0122 /*
0123  * SGE free-list queue state.
0124  */
0125 struct rx_sw_desc;
0126 struct sge_fl {
0127     unsigned int avail;     /* # of available RX buffers */
0128     unsigned int pend_cred;     /* new buffers since last FL DB ring */
0129     unsigned int cidx;      /* consumer index */
0130     unsigned int pidx;      /* producer index */
0131     unsigned long alloc_failed; /* # of buffer allocation failures */
0132     unsigned long large_alloc_failed;
0133     unsigned long starving;     /* # of times FL was found starving */
0134
0135     /*
0136      * Write-once/infrequently fields.
0137      * -------------------------------
0138      */
0139
0140     unsigned int cntxt_id;      /* SGE relative QID for the free list */
0141     unsigned int abs_id;        /* SGE absolute QID for the free list */
0142     unsigned int size;      /* capacity of free list */
0143     struct rx_sw_desc *sdesc;   /* address of SW RX descriptor ring */
0144     __be64 *desc;           /* address of HW RX descriptor ring */
0145     dma_addr_t addr;        /* PCI bus address of hardware ring */
0146     void __iomem *bar2_addr;    /* address of BAR2 Queue registers */
0147     unsigned int bar2_qid;      /* Queue ID for BAR2 Queue registers */
0148 };
0149
0150 /*
0151  * An ingress packet gather list.
0152  */
0153 struct pkt_gl {
0154     struct page_frag frags[MAX_SKB_FRAGS];
0155     void *va;           /* virtual address of first byte */
0156     unsigned int nfrags;        /* # of fragments */
0157     unsigned int tot_len;       /* total length of fragments */
0158 };
0159
0160 typedef int (*rspq_handler_t)(struct sge_rspq *, const __be64 *,
0161                   const struct pkt_gl *);
0162
0163 /*
0164  * State for an SGE Response Queue.
0165  */
0166 struct sge_rspq {
0167     struct napi_struct napi;    /* NAPI scheduling control */
0168     const __be64 *cur_desc;     /* current descriptor in queue */
0169     unsigned int cidx;      /* consumer index */
0170     u8 gen;             /* current generation bit */
0171     u8 next_intr_params;        /* holdoff params for next interrupt */
0172     int offset;         /* offset into current FL buffer */
0173
0174     unsigned int unhandled_irqs;    /* bogus interrupts */
0175
0176     /*
0177      * Write-once/infrequently fields.
0178      * -------------------------------
0179      */
0180
0181     u8 intr_params;         /* interrupt holdoff parameters */
0182     u8 pktcnt_idx;          /* interrupt packet threshold */
0183     u8 idx;             /* queue index within its group */
0184     u16 cntxt_id;           /* SGE rel QID for the response Q */
0185     u16 abs_id;         /* SGE abs QID for the response Q */
0186     __be64 *desc;           /* address of hardware response ring */
0187     dma_addr_t phys_addr;       /* PCI bus address of ring */
0188     void __iomem *bar2_addr;    /* address of BAR2 Queue registers */
0189     unsigned int bar2_qid;      /* Queue ID for BAR2 Queue registers */
0190     unsigned int iqe_len;       /* entry size */
0191     unsigned int size;      /* capcity of response Q */
0192     struct adapter *adapter;    /* our adapter */
0193     struct net_device *netdev;  /* associated net device */
0194     rspq_handler_t handler;     /* the handler for this response Q */
0195 };
0196
0197 /*
0198  * Ethernet queue statistics
0199  */
0200 struct sge_eth_stats {
0201     unsigned long pkts;     /* # of ethernet packets */
0202     unsigned long lro_pkts;     /* # of LRO super packets */
0203     unsigned long lro_merged;   /* # of wire packets merged by LRO */
0204     unsigned long rx_cso;       /* # of Rx checksum offloads */
0205     unsigned long vlan_ex;      /* # of Rx VLAN extractions */
0206     unsigned long rx_drops;     /* # of packets dropped due to no mem */
0207 };
0208
0209 /*
0210  * State for an Ethernet Receive Queue.
0211  */
0212 struct sge_eth_rxq {
0213     struct sge_rspq rspq;       /* Response Queue */
0214     struct sge_fl fl;       /* Free List */
0215     struct sge_eth_stats stats; /* receive statistics */
0216 };
0217
0218 /*
0219  * SGE Transmit Queue state.  This contains all of the resources associated
0220  * with the hardware status of a TX Queue which is a circular ring of hardware
0221  * TX Descriptors.  For convenience, it also contains a pointer to a parallel
0222  * "Software Descriptor" array but we don't know anything about it here other
0223  * than its type name.
0224  */
0225 struct tx_desc {
0226     /*
0227      * Egress Queues are measured in units of SGE_EQ_IDXSIZE by the
0228      * hardware: Sizes, Producer and Consumer indices, etc.
0229      */
0230     __be64 flit[SGE_EQ_IDXSIZE/sizeof(__be64)];
0231 };
0232 struct tx_sw_desc;
0233 struct sge_txq {
0234     unsigned int in_use;        /* # of in-use TX descriptors */
0235     unsigned int size;      /* # of descriptors */
0236     unsigned int cidx;      /* SW consumer index */
0237     unsigned int pidx;      /* producer index */
0238     unsigned long stops;        /* # of times queue has been stopped */
0239     unsigned long restarts;     /* # of queue restarts */
0240
0241     /*
0242      * Write-once/infrequently fields.
0243      * -------------------------------
0244      */
0245
0246     unsigned int cntxt_id;      /* SGE relative QID for the TX Q */
0247     unsigned int abs_id;        /* SGE absolute QID for the TX Q */
0248     struct tx_desc *desc;       /* address of HW TX descriptor ring */
0249     struct tx_sw_desc *sdesc;   /* address of SW TX descriptor ring */
0250     struct sge_qstat *stat;     /* queue status entry */
0251     dma_addr_t phys_addr;       /* PCI bus address of hardware ring */
0252     void __iomem *bar2_addr;    /* address of BAR2 Queue registers */
0253     unsigned int bar2_qid;      /* Queue ID for BAR2 Queue registers */
0254 };
0255
0256 /*
0257  * State for an Ethernet Transmit Queue.
0258  */
0259 struct sge_eth_txq {
0260     struct sge_txq q;       /* SGE TX Queue */
0261     struct netdev_queue *txq;   /* associated netdev TX queue */
0262     unsigned long tso;      /* # of TSO requests */
0263     unsigned long tx_cso;       /* # of TX checksum offloads */
0264     unsigned long vlan_ins;     /* # of TX VLAN insertions */
0265     unsigned long mapping_err;  /* # of I/O MMU packet mapping errors */
0266 };
0267
0268 /*
0269  * The complete set of Scatter/Gather Engine resources.
0270  */
0271 struct sge {
0272     /*
0273      * Our "Queue Sets" ...
0274      */
0275     struct sge_eth_txq ethtxq[MAX_ETH_QSETS];
0276     struct sge_eth_rxq ethrxq[MAX_ETH_QSETS];
0277
0278     /*
0279      * Extra ingress queues for asynchronous firmware events and
0280      * forwarded interrupts (when in MSI mode).
0281      */
0282     struct sge_rspq fw_evtq ____cacheline_aligned_in_smp;
0283
0284     struct sge_rspq intrq ____cacheline_aligned_in_smp;
0285     spinlock_t intrq_lock;
0286
0287     /*
0288      * State for managing "starving Free Lists" -- Free Lists which have
0289      * fallen below a certain threshold of buffers available to the
0290      * hardware and attempts to refill them up to that threshold have
0291      * failed.  We have a regular "slow tick" timer process which will
0292      * make periodic attempts to refill these starving Free Lists ...
0293      */
0294     DECLARE_BITMAP(starving_fl, MAX_EGRQ);
0295     struct timer_list rx_timer;
0296
0297     /*
0298      * State for cleaning up completed TX descriptors.
0299      */
0300     struct timer_list tx_timer;
0301
0302     /*
0303      * Write-once/infrequently fields.
0304      * -------------------------------
0305      */
0306
0307     u16 max_ethqsets;       /* # of available Ethernet queue sets */
0308     u16 ethqsets;           /* # of active Ethernet queue sets */
0309     u16 ethtxq_rover;       /* Tx queue to clean up next */
0310     u16 timer_val[SGE_NTIMERS]; /* interrupt holdoff timer array */
0311     u8 counter_val[SGE_NCOUNTERS];  /* interrupt RX threshold array */
0312
0313     /* Decoded Adapter Parameters.
0314      */
0315     u32 fl_pg_order;        /* large page allocation size */
0316     u32 stat_len;           /* length of status page at ring end */
0317     u32 pktshift;           /* padding between CPL & packet data */
0318     u32 fl_align;           /* response queue message alignment */
0319     u32 fl_starve_thres;        /* Free List starvation threshold */
0320
0321     /*
0322      * Reverse maps from Absolute Queue IDs to associated queue pointers.
0323      * The absolute Queue IDs are in a compact range which start at a
0324      * [potentially large] Base Queue ID.  We perform the reverse map by
0325      * first converting the Absolute Queue ID into a Relative Queue ID by
0326      * subtracting off the Base Queue ID and then use a Relative Queue ID
0327      * indexed table to get the pointer to the corresponding software
0328      * queue structure.
0329      */
0330     unsigned int egr_base;
0331     unsigned int ingr_base;
0332     void *egr_map[MAX_EGRQ];
0333     struct sge_rspq *ingr_map[MAX_INGQ];
0334 };
0335
0336 /*
0337  * Utility macros to convert Absolute- to Relative-Queue indices and Egress-
0338  * and Ingress-Queues.  The EQ_MAP() and IQ_MAP() macros which provide
0339  * pointers to Ingress- and Egress-Queues can be used as both L- and R-values
0340  */
0341 #define EQ_IDX(s, abs_id) ((unsigned int)((abs_id) - (s)->egr_base))
0342 #define IQ_IDX(s, abs_id) ((unsigned int)((abs_id) - (s)->ingr_base))
0343
0344 #define EQ_MAP(s, abs_id) ((s)->egr_map[EQ_IDX(s, abs_id)])
0345 #define IQ_MAP(s, abs_id) ((s)->ingr_map[IQ_IDX(s, abs_id)])
0346
0347 /*
0348  * Macro to iterate across Queue Sets ("rxq" is a historic misnomer).
0349  */
0350 #define for_each_ethrxq(sge, iter) \
0351     for (iter = 0; iter < (sge)->ethqsets; iter++)
0352
0353 struct hash_mac_addr {
0354     struct list_head list;
0355     u8 addr[ETH_ALEN];
0356     unsigned int iface_mac;
0357 };
0358
0359 struct mbox_list {
0360     struct list_head list;
0361 };
0362
0363 /*
0364  * Per-"adapter" (Virtual Function) information.
0365  */
0366 struct adapter {
0367     /* PCI resources */
0368     void __iomem *regs;
0369     void __iomem *bar2;
0370     struct pci_dev *pdev;
0371     struct device *pdev_dev;
0372
0373     /* "adapter" resources */
0374     unsigned long registered_device_map;
0375     unsigned long open_device_map;
0376     unsigned long flags;
0377     struct adapter_params params;
0378
0379     /* queue and interrupt resources */
0380     struct {
0381         unsigned short vec;
0382         char desc[22];
0383     } msix_info[MSIX_ENTRIES];
0384     struct sge sge;
0385
0386     /* Linux network device resources */
0387     struct net_device *port[MAX_NPORTS];
0388     const char *name;
0389     unsigned int msg_enable;
0390
0391     /* debugfs resources */
0392     struct dentry *debugfs_root;
0393
0394     /* various locks */
0395     spinlock_t stats_lock;
0396
0397     /* lock for mailbox cmd list */
0398     spinlock_t mbox_lock;
0399     struct mbox_list mlist;
0400
0401     /* support for mailbox command/reply logging */
0402 #define T4VF_OS_LOG_MBOX_CMDS 256
0403     struct mbox_cmd_log *mbox_log;
0404
0405     /* list of MAC addresses in MPS Hash */
0406     struct list_head mac_hlist;
0407 };
0408
0409 enum { /* adapter flags */
0410     CXGB4VF_FULL_INIT_DONE          = (1UL << 0),
0411     CXGB4VF_USING_MSI           = (1UL << 1),
0412     CXGB4VF_USING_MSIX          = (1UL << 2),
0413     CXGB4VF_QUEUES_BOUND            = (1UL << 3),
0414     CXGB4VF_ROOT_NO_RELAXED_ORDERING    = (1UL << 4),
0415     CXGB4VF_FW_OK               = (1UL << 5),
0416 };
0417
0418 /*
0419  * The following register read/write routine definitions are required by
0420  * the common code.
0421  */
0422
0423 /**
0424  * t4_read_reg - read a HW register
0425  * @adapter: the adapter
0426  * @reg_addr: the register address
0427  *
0428  * Returns the 32-bit value of the given HW register.
0429  */
0430 static inline u32 t4_read_reg(struct adapter *adapter, u32 reg_addr)
0431 {
0432     return readl(adapter->regs + reg_addr);
0433 }
0434
0435 /**
0436  * t4_write_reg - write a HW register
0437  * @adapter: the adapter
0438  * @reg_addr: the register address
0439  * @val: the value to write
0440  *
0441  * Write a 32-bit value into the given HW register.
0442  */
0443 static inline void t4_write_reg(struct adapter *adapter, u32 reg_addr, u32 val)
0444 {
0445     writel(val, adapter->regs + reg_addr);
0446 }
0447
0448 #ifndef readq
0449 static inline u64 readq(const volatile void __iomem *addr)
0450 {
0451     return readl(addr) + ((u64)readl(addr + 4) << 32);
0452 }
0453
0454 static inline void writeq(u64 val, volatile void __iomem *addr)
0455 {
0456     writel(val, addr);
0457     writel(val >> 32, addr + 4);
0458 }
0459 #endif
0460
0461 /**
0462  * t4_read_reg64 - read a 64-bit HW register
0463  * @adapter: the adapter
0464  * @reg_addr: the register address
0465  *
0466  * Returns the 64-bit value of the given HW register.
0467  */
0468 static inline u64 t4_read_reg64(struct adapter *adapter, u32 reg_addr)
0469 {
0470     return readq(adapter->regs + reg_addr);
0471 }
0472
0473 /**
0474  * t4_write_reg64 - write a 64-bit HW register
0475  * @adapter: the adapter
0476  * @reg_addr: the register address
0477  * @val: the value to write
0478  *
0479  * Write a 64-bit value into the given HW register.
0480  */
0481 static inline void t4_write_reg64(struct adapter *adapter, u32 reg_addr,
0482                   u64 val)
0483 {
0484     writeq(val, adapter->regs + reg_addr);
0485 }
0486
0487 /**
0488  * port_name - return the string name of a port
0489  * @adapter: the adapter
0490  * @pidx: the port index
0491  *
0492  * Return the string name of the selected port.
0493  */
0494 static inline const char *port_name(struct adapter *adapter, int pidx)
0495 {
0496     return adapter->port[pidx]->name;
0497 }
0498
0499 /**
0500  * t4_os_set_hw_addr - store a port's MAC address in SW
0501  * @adapter: the adapter
0502  * @pidx: the port index
0503  * @hw_addr: the Ethernet address
0504  *
0505  * Store the Ethernet address of the given port in SW.  Called by the common
0506  * code when it retrieves a port's Ethernet address from EEPROM.
0507  */
0508 static inline void t4_os_set_hw_addr(struct adapter *adapter, int pidx,
0509                      u8 hw_addr[])
0510 {
0511     eth_hw_addr_set(adapter->port[pidx], hw_addr);
0512 }
0513
0514 /**
0515  * netdev2pinfo - return the port_info structure associated with a net_device
0516  * @dev: the netdev
0517  *
0518  * Return the struct port_info associated with a net_device
0519  */
0520 static inline struct port_info *netdev2pinfo(const struct net_device *dev)
0521 {
0522     return netdev_priv(dev);
0523 }
0524
0525 /**
0526  * adap2pinfo - return the port_info of a port
0527  * @adap: the adapter
0528  * @pidx: the port index
0529  *
0530  * Return the port_info structure for the adapter.
0531  */
0532 static inline struct port_info *adap2pinfo(struct adapter *adapter, int pidx)
0533 {
0534     return netdev_priv(adapter->port[pidx]);
0535 }
0536
0537 /**
0538  * netdev2adap - return the adapter structure associated with a net_device
0539  * @dev: the netdev
0540  *
0541  * Return the struct adapter associated with a net_device
0542  */
0543 static inline struct adapter *netdev2adap(const struct net_device *dev)
0544 {
0545     return netdev2pinfo(dev)->adapter;
0546 }
0547
0548 /*
0549  * OS "Callback" function declarations.  These are functions that the OS code
0550  * is "contracted" to provide for the common code.
0551  */
0552 void t4vf_os_link_changed(struct adapter *, int, int);
0553 void t4vf_os_portmod_changed(struct adapter *, int);
0554
0555 /*
0556  * SGE function prototype declarations.
0557  */
0558 int t4vf_sge_alloc_rxq(struct adapter *, struct sge_rspq *, bool,
0559                struct net_device *, int,
0560                struct sge_fl *, rspq_handler_t);
0561 int t4vf_sge_alloc_eth_txq(struct adapter *, struct sge_eth_txq *,
0562                struct net_device *, struct netdev_queue *,
0563                unsigned int);
0564 void t4vf_free_sge_resources(struct adapter *);
0565
0566 netdev_tx_t t4vf_eth_xmit(struct sk_buff *, struct net_device *);
0567 int t4vf_ethrx_handler(struct sge_rspq *, const __be64 *,
0568                const struct pkt_gl *);
0569
0570 irq_handler_t t4vf_intr_handler(struct adapter *);
0571 irqreturn_t t4vf_sge_intr_msix(int, void *);
0572
0573 int t4vf_sge_init(struct adapter *);
0574 void t4vf_sge_start(struct adapter *);
0575 void t4vf_sge_stop(struct adapter *);
0576
0577 #endif /* __CXGB4VF_ADAPTER_H__ */