0001
0002
0003
0004 #ifndef __CXGB4_TC_MQPRIO_H__
0005 #define __CXGB4_TC_MQPRIO_H__
0006
0007 #include <net/pkt_cls.h>
0008
0009 #define CXGB4_EOSW_TXQ_DEFAULT_DESC_NUM 128
0010
0011 #define CXGB4_EOHW_TXQ_DEFAULT_DESC_NUM 1024
0012
0013 #define CXGB4_EOHW_RXQ_DEFAULT_DESC_NUM 1024
0014 #define CXGB4_EOHW_RXQ_DEFAULT_DESC_SIZE 64
0015 #define CXGB4_EOHW_RXQ_DEFAULT_INTR_USEC 5
0016 #define CXGB4_EOHW_RXQ_DEFAULT_PKT_CNT 8
0017
0018 #define CXGB4_EOHW_FLQ_DEFAULT_DESC_NUM 72
0019
0020 #define CXGB4_FLOWC_WAIT_TIMEOUT (5 * HZ)
0021
0022 enum cxgb4_mqprio_state {
0023 CXGB4_MQPRIO_STATE_DISABLED = 0,
0024 CXGB4_MQPRIO_STATE_ACTIVE,
0025 };
0026
0027 struct cxgb4_tc_port_mqprio {
0028 enum cxgb4_mqprio_state state;
0029 struct tc_mqprio_qopt_offload mqprio;
0030 struct sge_eosw_txq *eosw_txq;
0031 u8 tc_hwtc_map[TC_QOPT_MAX_QUEUE];
0032 };
0033
0034 struct cxgb4_tc_mqprio {
0035 refcount_t refcnt;
0036 struct mutex mqprio_mutex;
0037 struct cxgb4_tc_port_mqprio *port_mqprio;
0038 };
0039
0040 int cxgb4_setup_tc_mqprio(struct net_device *dev,
0041 struct tc_mqprio_qopt_offload *mqprio);
0042 void cxgb4_mqprio_stop_offload(struct adapter *adap);
0043 int cxgb4_init_tc_mqprio(struct adapter *adap);
0044 void cxgb4_cleanup_tc_mqprio(struct adapter *adap);
0045 #endif