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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * This file is automatically generated --- any changes will be lost.
0004  */
0005 
0006 #ifndef _SGE_DEFS_H
0007 #define _SGE_DEFS_H
0008 
0009 #define S_EC_CREDITS    0
0010 #define M_EC_CREDITS    0x7FFF
0011 #define V_EC_CREDITS(x) ((x) << S_EC_CREDITS)
0012 #define G_EC_CREDITS(x) (((x) >> S_EC_CREDITS) & M_EC_CREDITS)
0013 
0014 #define S_EC_GTS    15
0015 #define V_EC_GTS(x) ((x) << S_EC_GTS)
0016 #define F_EC_GTS    V_EC_GTS(1U)
0017 
0018 #define S_EC_INDEX    16
0019 #define M_EC_INDEX    0xFFFF
0020 #define V_EC_INDEX(x) ((x) << S_EC_INDEX)
0021 #define G_EC_INDEX(x) (((x) >> S_EC_INDEX) & M_EC_INDEX)
0022 
0023 #define S_EC_SIZE    0
0024 #define M_EC_SIZE    0xFFFF
0025 #define V_EC_SIZE(x) ((x) << S_EC_SIZE)
0026 #define G_EC_SIZE(x) (((x) >> S_EC_SIZE) & M_EC_SIZE)
0027 
0028 #define S_EC_BASE_LO    16
0029 #define M_EC_BASE_LO    0xFFFF
0030 #define V_EC_BASE_LO(x) ((x) << S_EC_BASE_LO)
0031 #define G_EC_BASE_LO(x) (((x) >> S_EC_BASE_LO) & M_EC_BASE_LO)
0032 
0033 #define S_EC_BASE_HI    0
0034 #define M_EC_BASE_HI    0xF
0035 #define V_EC_BASE_HI(x) ((x) << S_EC_BASE_HI)
0036 #define G_EC_BASE_HI(x) (((x) >> S_EC_BASE_HI) & M_EC_BASE_HI)
0037 
0038 #define S_EC_RESPQ    4
0039 #define M_EC_RESPQ    0x7
0040 #define V_EC_RESPQ(x) ((x) << S_EC_RESPQ)
0041 #define G_EC_RESPQ(x) (((x) >> S_EC_RESPQ) & M_EC_RESPQ)
0042 
0043 #define S_EC_TYPE    7
0044 #define M_EC_TYPE    0x7
0045 #define V_EC_TYPE(x) ((x) << S_EC_TYPE)
0046 #define G_EC_TYPE(x) (((x) >> S_EC_TYPE) & M_EC_TYPE)
0047 
0048 #define S_EC_GEN    10
0049 #define V_EC_GEN(x) ((x) << S_EC_GEN)
0050 #define F_EC_GEN    V_EC_GEN(1U)
0051 
0052 #define S_EC_UP_TOKEN    11
0053 #define M_EC_UP_TOKEN    0xFFFFF
0054 #define V_EC_UP_TOKEN(x) ((x) << S_EC_UP_TOKEN)
0055 #define G_EC_UP_TOKEN(x) (((x) >> S_EC_UP_TOKEN) & M_EC_UP_TOKEN)
0056 
0057 #define S_EC_VALID    31
0058 #define V_EC_VALID(x) ((x) << S_EC_VALID)
0059 #define F_EC_VALID    V_EC_VALID(1U)
0060 
0061 #define S_RQ_MSI_VEC    20
0062 #define M_RQ_MSI_VEC    0x3F
0063 #define V_RQ_MSI_VEC(x) ((x) << S_RQ_MSI_VEC)
0064 #define G_RQ_MSI_VEC(x) (((x) >> S_RQ_MSI_VEC) & M_RQ_MSI_VEC)
0065 
0066 #define S_RQ_INTR_EN    26
0067 #define V_RQ_INTR_EN(x) ((x) << S_RQ_INTR_EN)
0068 #define F_RQ_INTR_EN    V_RQ_INTR_EN(1U)
0069 
0070 #define S_RQ_GEN    28
0071 #define V_RQ_GEN(x) ((x) << S_RQ_GEN)
0072 #define F_RQ_GEN    V_RQ_GEN(1U)
0073 
0074 #define S_CQ_INDEX    0
0075 #define M_CQ_INDEX    0xFFFF
0076 #define V_CQ_INDEX(x) ((x) << S_CQ_INDEX)
0077 #define G_CQ_INDEX(x) (((x) >> S_CQ_INDEX) & M_CQ_INDEX)
0078 
0079 #define S_CQ_SIZE    16
0080 #define M_CQ_SIZE    0xFFFF
0081 #define V_CQ_SIZE(x) ((x) << S_CQ_SIZE)
0082 #define G_CQ_SIZE(x) (((x) >> S_CQ_SIZE) & M_CQ_SIZE)
0083 
0084 #define S_CQ_BASE_HI    0
0085 #define M_CQ_BASE_HI    0xFFFFF
0086 #define V_CQ_BASE_HI(x) ((x) << S_CQ_BASE_HI)
0087 #define G_CQ_BASE_HI(x) (((x) >> S_CQ_BASE_HI) & M_CQ_BASE_HI)
0088 
0089 #define S_CQ_RSPQ    20
0090 #define M_CQ_RSPQ    0x3F
0091 #define V_CQ_RSPQ(x) ((x) << S_CQ_RSPQ)
0092 #define G_CQ_RSPQ(x) (((x) >> S_CQ_RSPQ) & M_CQ_RSPQ)
0093 
0094 #define S_CQ_ASYNC_NOTIF    26
0095 #define V_CQ_ASYNC_NOTIF(x) ((x) << S_CQ_ASYNC_NOTIF)
0096 #define F_CQ_ASYNC_NOTIF    V_CQ_ASYNC_NOTIF(1U)
0097 
0098 #define S_CQ_ARMED    27
0099 #define V_CQ_ARMED(x) ((x) << S_CQ_ARMED)
0100 #define F_CQ_ARMED    V_CQ_ARMED(1U)
0101 
0102 #define S_CQ_ASYNC_NOTIF_SOL    28
0103 #define V_CQ_ASYNC_NOTIF_SOL(x) ((x) << S_CQ_ASYNC_NOTIF_SOL)
0104 #define F_CQ_ASYNC_NOTIF_SOL    V_CQ_ASYNC_NOTIF_SOL(1U)
0105 
0106 #define S_CQ_GEN    29
0107 #define V_CQ_GEN(x) ((x) << S_CQ_GEN)
0108 #define F_CQ_GEN    V_CQ_GEN(1U)
0109 
0110 #define S_CQ_ERR    30
0111 #define V_CQ_ERR(x) ((x) << S_CQ_ERR)
0112 #define F_CQ_ERR    V_CQ_ERR(1U)
0113 
0114 #define S_CQ_OVERFLOW_MODE    31
0115 #define V_CQ_OVERFLOW_MODE(x) ((x) << S_CQ_OVERFLOW_MODE)
0116 #define F_CQ_OVERFLOW_MODE    V_CQ_OVERFLOW_MODE(1U)
0117 
0118 #define S_CQ_CREDITS    0
0119 #define M_CQ_CREDITS    0xFFFF
0120 #define V_CQ_CREDITS(x) ((x) << S_CQ_CREDITS)
0121 #define G_CQ_CREDITS(x) (((x) >> S_CQ_CREDITS) & M_CQ_CREDITS)
0122 
0123 #define S_CQ_CREDIT_THRES    16
0124 #define M_CQ_CREDIT_THRES    0x1FFF
0125 #define V_CQ_CREDIT_THRES(x) ((x) << S_CQ_CREDIT_THRES)
0126 #define G_CQ_CREDIT_THRES(x) (((x) >> S_CQ_CREDIT_THRES) & M_CQ_CREDIT_THRES)
0127 
0128 #define S_FL_BASE_HI    0
0129 #define M_FL_BASE_HI    0xFFFFF
0130 #define V_FL_BASE_HI(x) ((x) << S_FL_BASE_HI)
0131 #define G_FL_BASE_HI(x) (((x) >> S_FL_BASE_HI) & M_FL_BASE_HI)
0132 
0133 #define S_FL_INDEX_LO    20
0134 #define M_FL_INDEX_LO    0xFFF
0135 #define V_FL_INDEX_LO(x) ((x) << S_FL_INDEX_LO)
0136 #define G_FL_INDEX_LO(x) (((x) >> S_FL_INDEX_LO) & M_FL_INDEX_LO)
0137 
0138 #define S_FL_INDEX_HI    0
0139 #define M_FL_INDEX_HI    0xF
0140 #define V_FL_INDEX_HI(x) ((x) << S_FL_INDEX_HI)
0141 #define G_FL_INDEX_HI(x) (((x) >> S_FL_INDEX_HI) & M_FL_INDEX_HI)
0142 
0143 #define S_FL_SIZE    4
0144 #define M_FL_SIZE    0xFFFF
0145 #define V_FL_SIZE(x) ((x) << S_FL_SIZE)
0146 #define G_FL_SIZE(x) (((x) >> S_FL_SIZE) & M_FL_SIZE)
0147 
0148 #define S_FL_GEN    20
0149 #define V_FL_GEN(x) ((x) << S_FL_GEN)
0150 #define F_FL_GEN    V_FL_GEN(1U)
0151 
0152 #define S_FL_ENTRY_SIZE_LO    21
0153 #define M_FL_ENTRY_SIZE_LO    0x7FF
0154 #define V_FL_ENTRY_SIZE_LO(x) ((x) << S_FL_ENTRY_SIZE_LO)
0155 #define G_FL_ENTRY_SIZE_LO(x) (((x) >> S_FL_ENTRY_SIZE_LO) & M_FL_ENTRY_SIZE_LO)
0156 
0157 #define S_FL_ENTRY_SIZE_HI    0
0158 #define M_FL_ENTRY_SIZE_HI    0x1FFFFF
0159 #define V_FL_ENTRY_SIZE_HI(x) ((x) << S_FL_ENTRY_SIZE_HI)
0160 #define G_FL_ENTRY_SIZE_HI(x) (((x) >> S_FL_ENTRY_SIZE_HI) & M_FL_ENTRY_SIZE_HI)
0161 
0162 #define S_FL_CONG_THRES    21
0163 #define M_FL_CONG_THRES    0x3FF
0164 #define V_FL_CONG_THRES(x) ((x) << S_FL_CONG_THRES)
0165 #define G_FL_CONG_THRES(x) (((x) >> S_FL_CONG_THRES) & M_FL_CONG_THRES)
0166 
0167 #define S_FL_GTS    31
0168 #define V_FL_GTS(x) ((x) << S_FL_GTS)
0169 #define F_FL_GTS    V_FL_GTS(1U)
0170 
0171 #define S_FLD_GEN1    31
0172 #define V_FLD_GEN1(x) ((x) << S_FLD_GEN1)
0173 #define F_FLD_GEN1    V_FLD_GEN1(1U)
0174 
0175 #define S_FLD_GEN2    0
0176 #define V_FLD_GEN2(x) ((x) << S_FLD_GEN2)
0177 #define F_FLD_GEN2    V_FLD_GEN2(1U)
0178 
0179 #define S_RSPD_TXQ1_CR    0
0180 #define M_RSPD_TXQ1_CR    0x7F
0181 #define V_RSPD_TXQ1_CR(x) ((x) << S_RSPD_TXQ1_CR)
0182 #define G_RSPD_TXQ1_CR(x) (((x) >> S_RSPD_TXQ1_CR) & M_RSPD_TXQ1_CR)
0183 
0184 #define S_RSPD_TXQ1_GTS    7
0185 #define V_RSPD_TXQ1_GTS(x) ((x) << S_RSPD_TXQ1_GTS)
0186 #define F_RSPD_TXQ1_GTS    V_RSPD_TXQ1_GTS(1U)
0187 
0188 #define S_RSPD_TXQ2_CR    8
0189 #define M_RSPD_TXQ2_CR    0x7F
0190 #define V_RSPD_TXQ2_CR(x) ((x) << S_RSPD_TXQ2_CR)
0191 #define G_RSPD_TXQ2_CR(x) (((x) >> S_RSPD_TXQ2_CR) & M_RSPD_TXQ2_CR)
0192 
0193 #define S_RSPD_TXQ2_GTS    15
0194 #define V_RSPD_TXQ2_GTS(x) ((x) << S_RSPD_TXQ2_GTS)
0195 #define F_RSPD_TXQ2_GTS    V_RSPD_TXQ2_GTS(1U)
0196 
0197 #define S_RSPD_TXQ0_CR    16
0198 #define M_RSPD_TXQ0_CR    0x7F
0199 #define V_RSPD_TXQ0_CR(x) ((x) << S_RSPD_TXQ0_CR)
0200 #define G_RSPD_TXQ0_CR(x) (((x) >> S_RSPD_TXQ0_CR) & M_RSPD_TXQ0_CR)
0201 
0202 #define S_RSPD_TXQ0_GTS    23
0203 #define V_RSPD_TXQ0_GTS(x) ((x) << S_RSPD_TXQ0_GTS)
0204 #define F_RSPD_TXQ0_GTS    V_RSPD_TXQ0_GTS(1U)
0205 
0206 #define S_RSPD_EOP    24
0207 #define V_RSPD_EOP(x) ((x) << S_RSPD_EOP)
0208 #define F_RSPD_EOP    V_RSPD_EOP(1U)
0209 
0210 #define S_RSPD_SOP    25
0211 #define V_RSPD_SOP(x) ((x) << S_RSPD_SOP)
0212 #define F_RSPD_SOP    V_RSPD_SOP(1U)
0213 
0214 #define S_RSPD_ASYNC_NOTIF    26
0215 #define V_RSPD_ASYNC_NOTIF(x) ((x) << S_RSPD_ASYNC_NOTIF)
0216 #define F_RSPD_ASYNC_NOTIF    V_RSPD_ASYNC_NOTIF(1U)
0217 
0218 #define S_RSPD_FL0_GTS    27
0219 #define V_RSPD_FL0_GTS(x) ((x) << S_RSPD_FL0_GTS)
0220 #define F_RSPD_FL0_GTS    V_RSPD_FL0_GTS(1U)
0221 
0222 #define S_RSPD_FL1_GTS    28
0223 #define V_RSPD_FL1_GTS(x) ((x) << S_RSPD_FL1_GTS)
0224 #define F_RSPD_FL1_GTS    V_RSPD_FL1_GTS(1U)
0225 
0226 #define S_RSPD_IMM_DATA_VALID    29
0227 #define V_RSPD_IMM_DATA_VALID(x) ((x) << S_RSPD_IMM_DATA_VALID)
0228 #define F_RSPD_IMM_DATA_VALID    V_RSPD_IMM_DATA_VALID(1U)
0229 
0230 #define S_RSPD_OFFLOAD    30
0231 #define V_RSPD_OFFLOAD(x) ((x) << S_RSPD_OFFLOAD)
0232 #define F_RSPD_OFFLOAD    V_RSPD_OFFLOAD(1U)
0233 
0234 #define S_RSPD_GEN1    31
0235 #define V_RSPD_GEN1(x) ((x) << S_RSPD_GEN1)
0236 #define F_RSPD_GEN1    V_RSPD_GEN1(1U)
0237 
0238 #define S_RSPD_LEN    0
0239 #define M_RSPD_LEN    0x7FFFFFFF
0240 #define V_RSPD_LEN(x) ((x) << S_RSPD_LEN)
0241 #define G_RSPD_LEN(x) (((x) >> S_RSPD_LEN) & M_RSPD_LEN)
0242 
0243 #define S_RSPD_FLQ    31
0244 #define V_RSPD_FLQ(x) ((x) << S_RSPD_FLQ)
0245 #define F_RSPD_FLQ    V_RSPD_FLQ(1U)
0246 
0247 #define S_RSPD_GEN2    0
0248 #define V_RSPD_GEN2(x) ((x) << S_RSPD_GEN2)
0249 #define F_RSPD_GEN2    V_RSPD_GEN2(1U)
0250 
0251 #define S_RSPD_INR_VEC    1
0252 #define M_RSPD_INR_VEC    0x7F
0253 #define V_RSPD_INR_VEC(x) ((x) << S_RSPD_INR_VEC)
0254 #define G_RSPD_INR_VEC(x) (((x) >> S_RSPD_INR_VEC) & M_RSPD_INR_VEC)
0255 
0256 #endif              /* _SGE_DEFS_H */