chelsio/cxgb3/l2t.h

0001 /*
0002  * Copyright (c) 2003-2008 Chelsio, Inc. All rights reserved.
0003  *
0004  * This software is available to you under a choice of one of two
0005  * licenses.  You may choose to be licensed under the terms of the GNU
0006  * General Public License (GPL) Version 2, available from the file
0007  * COPYING in the main directory of this source tree, or the
0008  * OpenIB.org BSD license below:
0009  *
0010  *     Redistribution and use in source and binary forms, with or
0011  *     without modification, are permitted provided that the following
0012  *     conditions are met:
0013  *
0014  *      - Redistributions of source code must retain the above
0015  *        copyright notice, this list of conditions and the following
0016  *        disclaimer.
0017  *
0018  *      - Redistributions in binary form must reproduce the above
0019  *        copyright notice, this list of conditions and the following
0020  *        disclaimer in the documentation and/or other materials
0021  *        provided with the distribution.
0022  *
0023  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
0024  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
0025  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
0026  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
0027  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
0028  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
0029  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
0030  * SOFTWARE.
0031  */
0032 #ifndef _CHELSIO_L2T_H
0033 #define _CHELSIO_L2T_H
0034
0035 #include <linux/spinlock.h>
0036 #include "t3cdev.h"
0037 #include <linux/atomic.h>
0038
0039 enum {
0040     L2T_STATE_VALID,    /* entry is up to date */
0041     L2T_STATE_STALE,    /* entry may be used but needs revalidation */
0042     L2T_STATE_RESOLVING,    /* entry needs address resolution */
0043     L2T_STATE_UNUSED    /* entry not in use */
0044 };
0045
0046 struct neighbour;
0047 struct sk_buff;
0048
0049 /*
0050  * Each L2T entry plays multiple roles.  First of all, it keeps state for the
0051  * corresponding entry of the HW L2 table and maintains a queue of offload
0052  * packets awaiting address resolution.  Second, it is a node of a hash table
0053  * chain, where the nodes of the chain are linked together through their next
0054  * pointer.  Finally, each node is a bucket of a hash table, pointing to the
0055  * first element in its chain through its first pointer.
0056  */
0057 struct l2t_entry {
0058     u16 state;      /* entry state */
0059     u16 idx;        /* entry index */
0060     u32 addr;       /* dest IP address */
0061     int ifindex;        /* neighbor's net_device's ifindex */
0062     u16 smt_idx;        /* SMT index */
0063     u16 vlan;       /* VLAN TCI (id: bits 0-11, prio: 13-15 */
0064     struct neighbour *neigh;    /* associated neighbour */
0065     struct l2t_entry *first;    /* start of hash chain */
0066     struct l2t_entry *next; /* next l2t_entry on chain */
0067     struct sk_buff_head arpq;   /* queue of packets awaiting resolution */
0068     spinlock_t lock;
0069     atomic_t refcnt;    /* entry reference count */
0070     u8 dmac[6];     /* neighbour's MAC address */
0071 };
0072
0073 struct l2t_data {
0074     unsigned int nentries;  /* number of entries */
0075     struct l2t_entry *rover;    /* starting point for next allocation */
0076     atomic_t nfree;     /* number of free entries */
0077     rwlock_t lock;
0078     struct rcu_head rcu_head;   /* to handle rcu cleanup */
0079     struct l2t_entry l2tab[];
0080 };
0081
0082 typedef void (*arp_failure_handler_func)(struct t3cdev * dev,
0083                      struct sk_buff * skb);
0084
0085 /*
0086  * Callback stored in an skb to handle address resolution failure.
0087  */
0088 struct l2t_skb_cb {
0089     arp_failure_handler_func arp_failure_handler;
0090 };
0091
0092 #define L2T_SKB_CB(skb) ((struct l2t_skb_cb *)(skb)->cb)
0093
0094 static inline void set_arp_failure_handler(struct sk_buff *skb,
0095                        arp_failure_handler_func hnd)
0096 {
0097     L2T_SKB_CB(skb)->arp_failure_handler = hnd;
0098 }
0099
0100 /*
0101  * Getting to the L2 data from an offload device.
0102  */
0103 #define L2DATA(cdev) (rcu_dereference((cdev)->l2opt))
0104
0105 #define W_TCB_L2T_IX    0
0106 #define S_TCB_L2T_IX    7
0107 #define M_TCB_L2T_IX    0x7ffULL
0108 #define V_TCB_L2T_IX(x) ((x) << S_TCB_L2T_IX)
0109
0110 void t3_l2e_free(struct l2t_data *d, struct l2t_entry *e);
0111 void t3_l2t_update(struct t3cdev *dev, struct neighbour *neigh);
0112 struct l2t_entry *t3_l2t_get(struct t3cdev *cdev, struct dst_entry *dst,
0113                  struct net_device *dev, const void *daddr);
0114 int t3_l2t_send_slow(struct t3cdev *dev, struct sk_buff *skb,
0115              struct l2t_entry *e);
0116 void t3_l2t_send_event(struct t3cdev *dev, struct l2t_entry *e);
0117 struct l2t_data *t3_init_l2t(unsigned int l2t_capacity);
0118
0119 int cxgb3_ofld_send(struct t3cdev *dev, struct sk_buff *skb);
0120
0121 static inline int l2t_send(struct t3cdev *dev, struct sk_buff *skb,
0122                struct l2t_entry *e)
0123 {
0124     if (likely(e->state == L2T_STATE_VALID))
0125         return cxgb3_ofld_send(dev, skb);
0126     return t3_l2t_send_slow(dev, skb, e);
0127 }
0128
0129 static inline void l2t_release(struct t3cdev *t, struct l2t_entry *e)
0130 {
0131     struct l2t_data *d;
0132
0133     rcu_read_lock();
0134     d = L2DATA(t);
0135
0136     if (atomic_dec_and_test(&e->refcnt) && d)
0137         t3_l2e_free(d, e);
0138
0139     rcu_read_unlock();
0140 }
0141
0142 static inline void l2t_hold(struct l2t_data *d, struct l2t_entry *e)
0143 {
0144     if (d && atomic_add_return(1, &e->refcnt) == 1) /* 0 -> 1 transition */
0145         atomic_dec(&d->nfree);
0146 }
0147
0148 #endif