cavium/liquidio/response_manager.c

0001 /**********************************************************************
0002  * Author: Cavium, Inc.
0003  *
0004  * Contact: support@cavium.com
0005  *          Please include "LiquidIO" in the subject.
0006  *
0007  * Copyright (c) 2003-2016 Cavium, Inc.
0008  *
0009  * This file is free software; you can redistribute it and/or modify
0010  * it under the terms of the GNU General Public License, Version 2, as
0011  * published by the Free Software Foundation.
0012  *
0013  * This file is distributed in the hope that it will be useful, but
0014  * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
0015  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
0016  * NONINFRINGEMENT.  See the GNU General Public License for more
0017  * details.
0018  **********************************************************************/
0019 #include <linux/pci.h>
0020 #include <linux/netdevice.h>
0021 #include "liquidio_common.h"
0022 #include "octeon_droq.h"
0023 #include "octeon_iq.h"
0024 #include "response_manager.h"
0025 #include "octeon_device.h"
0026 #include "octeon_main.h"
0027
0028 static void oct_poll_req_completion(struct work_struct *work);
0029
0030 int octeon_setup_response_list(struct octeon_device *oct)
0031 {
0032     int i, ret = 0;
0033     struct cavium_wq *cwq;
0034
0035     for (i = 0; i < MAX_RESPONSE_LISTS; i++) {
0036         INIT_LIST_HEAD(&oct->response_list[i].head);
0037         spin_lock_init(&oct->response_list[i].lock);
0038         atomic_set(&oct->response_list[i].pending_req_count, 0);
0039     }
0040     spin_lock_init(&oct->cmd_resp_wqlock);
0041
0042     oct->dma_comp_wq.wq = alloc_workqueue("dma-comp", WQ_MEM_RECLAIM, 0);
0043     if (!oct->dma_comp_wq.wq) {
0044         dev_err(&oct->pci_dev->dev, "failed to create wq thread\n");
0045         return -ENOMEM;
0046     }
0047
0048     cwq = &oct->dma_comp_wq;
0049     INIT_DELAYED_WORK(&cwq->wk.work, oct_poll_req_completion);
0050     cwq->wk.ctxptr = oct;
0051     oct->cmd_resp_state = OCT_DRV_ONLINE;
0052
0053     return ret;
0054 }
0055
0056 void octeon_delete_response_list(struct octeon_device *oct)
0057 {
0058     cancel_delayed_work_sync(&oct->dma_comp_wq.wk.work);
0059     destroy_workqueue(oct->dma_comp_wq.wq);
0060 }
0061
0062 int lio_process_ordered_list(struct octeon_device *octeon_dev,
0063                  u32 force_quit)
0064 {
0065     struct octeon_response_list *ordered_sc_list;
0066     struct octeon_soft_command *sc;
0067     int request_complete = 0;
0068     int resp_to_process = MAX_ORD_REQS_TO_PROCESS;
0069     u32 status;
0070     u64 status64;
0071
0072     octeon_free_sc_done_list(octeon_dev);
0073
0074     ordered_sc_list = &octeon_dev->response_list[OCTEON_ORDERED_SC_LIST];
0075
0076     do {
0077         spin_lock_bh(&ordered_sc_list->lock);
0078
0079         if (list_empty(&ordered_sc_list->head)) {
0080             spin_unlock_bh(&ordered_sc_list->lock);
0081             return 1;
0082         }
0083
0084         sc = list_first_entry(&ordered_sc_list->head,
0085                       struct octeon_soft_command, node);
0086
0087         status = OCTEON_REQUEST_PENDING;
0088
0089         /* check if octeon has finished DMA'ing a response
0090          * to where rptr is pointing to
0091          */
0092         status64 = *sc->status_word;
0093
0094         if (status64 != COMPLETION_WORD_INIT) {
0095             /* This logic ensures that all 64b have been written.
0096              * 1. check byte 0 for non-FF
0097              * 2. if non-FF, then swap result from BE to host order
0098              * 3. check byte 7 (swapped to 0) for non-FF
0099              * 4. if non-FF, use the low 32-bit status code
0100              * 5. if either byte 0 or byte 7 is FF, don't use status
0101              */
0102             if ((status64 & 0xff) != 0xff) {
0103                 octeon_swap_8B_data(&status64, 1);
0104                 if (((status64 & 0xff) != 0xff)) {
0105                     /* retrieve 16-bit firmware status */
0106                     status = (u32)(status64 & 0xffffULL);
0107                     if (status) {
0108                         status =
0109                           FIRMWARE_STATUS_CODE(status);
0110                     } else {
0111                         /* i.e. no error */
0112                         status = OCTEON_REQUEST_DONE;
0113                     }
0114                 }
0115             }
0116         } else if (unlikely(force_quit) || (sc->expiry_time &&
0117             time_after(jiffies, (unsigned long)sc->expiry_time))) {
0118             struct octeon_instr_irh *irh =
0119                 (struct octeon_instr_irh *)&sc->cmd.cmd3.irh;
0120
0121             dev_err(&octeon_dev->pci_dev->dev, "%s: ", __func__);
0122             dev_err(&octeon_dev->pci_dev->dev,
0123                 "cmd %x/%x/%llx/%llx failed, ",
0124                 irh->opcode, irh->subcode,
0125                 sc->cmd.cmd3.ossp[0], sc->cmd.cmd3.ossp[1]);
0126             dev_err(&octeon_dev->pci_dev->dev,
0127                 "timeout (%ld, %ld)\n",
0128                 (long)jiffies, (long)sc->expiry_time);
0129             status = OCTEON_REQUEST_TIMEOUT;
0130         }
0131
0132         if (status != OCTEON_REQUEST_PENDING) {
0133             sc->sc_status = status;
0134
0135             /* we have received a response or we have timed out */
0136             /* remove node from linked list */
0137             list_del(&sc->node);
0138             atomic_dec(&octeon_dev->response_list
0139                    [OCTEON_ORDERED_SC_LIST].
0140                    pending_req_count);
0141
0142             if (!sc->callback) {
0143                 atomic_inc(&octeon_dev->response_list
0144                        [OCTEON_DONE_SC_LIST].
0145                        pending_req_count);
0146                 list_add_tail(&sc->node,
0147                           &octeon_dev->response_list
0148                           [OCTEON_DONE_SC_LIST].head);
0149
0150                 if (unlikely(READ_ONCE(sc->caller_is_done))) {
0151                     /* caller does not wait for response
0152                      * from firmware
0153                      */
0154                     if (status != OCTEON_REQUEST_DONE) {
0155                         struct octeon_instr_irh *irh;
0156
0157                         irh =
0158                             (struct octeon_instr_irh *)
0159                             &sc->cmd.cmd3.irh;
0160                         dev_dbg
0161                             (&octeon_dev->pci_dev->dev,
0162                             "%s: sc failed: opcode=%x, ",
0163                             __func__, irh->opcode);
0164                         dev_dbg
0165                             (&octeon_dev->pci_dev->dev,
0166                             "subcode=%x, ossp[0]=%llx, ",
0167                             irh->subcode,
0168                             sc->cmd.cmd3.ossp[0]);
0169                         dev_dbg
0170                             (&octeon_dev->pci_dev->dev,
0171                             "ossp[1]=%llx, status=%d\n",
0172                             sc->cmd.cmd3.ossp[1],
0173                             status);
0174                     }
0175                 } else {
0176                     complete(&sc->complete);
0177                 }
0178
0179                 spin_unlock_bh(&ordered_sc_list->lock);
0180             } else {
0181                 /* sc with callback function */
0182                 if (status == OCTEON_REQUEST_TIMEOUT) {
0183                     atomic_inc(&octeon_dev->response_list
0184                            [OCTEON_ZOMBIE_SC_LIST].
0185                            pending_req_count);
0186                     list_add_tail(&sc->node,
0187                               &octeon_dev->response_list
0188                               [OCTEON_ZOMBIE_SC_LIST].
0189                               head);
0190                 }
0191
0192                 spin_unlock_bh(&ordered_sc_list->lock);
0193
0194                 sc->callback(octeon_dev, status,
0195                          sc->callback_arg);
0196                 /* sc is freed by caller */
0197             }
0198
0199             request_complete++;
0200
0201         } else {
0202             /* no response yet */
0203             request_complete = 0;
0204             spin_unlock_bh
0205                 (&ordered_sc_list->lock);
0206         }
0207
0208         /* If we hit the Max Ordered requests to process every loop,
0209          * we quit
0210          * and let this function be invoked the next time the poll
0211          * thread runs
0212          * to process the remaining requests. This function can take up
0213          * the entire CPU if there is no upper limit to the requests
0214          * processed.
0215          */
0216         if (request_complete >= resp_to_process)
0217             break;
0218     } while (request_complete);
0219
0220     return 0;
0221 }
0222
0223 static void oct_poll_req_completion(struct work_struct *work)
0224 {
0225     struct cavium_wk *wk = (struct cavium_wk *)work;
0226     struct octeon_device *oct = (struct octeon_device *)wk->ctxptr;
0227     struct cavium_wq *cwq = &oct->dma_comp_wq;
0228
0229     lio_process_ordered_list(oct, 0);
0230
0231     if (atomic_read(&oct->response_list
0232             [OCTEON_ORDERED_SC_LIST].pending_req_count))
0233         queue_delayed_work(cwq->wq, &cwq->wk.work, msecs_to_jiffies(1));
0234 }