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OSCL-LXR

 
 

    


0001 /**********************************************************************
0002  * Author: Cavium, Inc.
0003  *
0004  * Contact: support@cavium.com
0005  *          Please include "LiquidIO" in the subject.
0006  *
0007  * Copyright (c) 2003-2016 Cavium, Inc.
0008  *
0009  * This file is free software; you can redistribute it and/or modify
0010  * it under the terms of the GNU General Public License, Version 2, as
0011  * published by the Free Software Foundation.
0012  *
0013  * This file is distributed in the hope that it will be useful, but
0014  * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
0015  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
0016  * NONINFRINGEMENT.  See the GNU General Public License for more details.
0017  ***********************************************************************/
0018 /*! \file cn68xx_regs.h
0019  *  \brief Host Driver: Register Address and Register Mask values for
0020  *  Octeon CN68XX devices. The register map for CN66XX is the same
0021  *  for most registers. This file has the other registers that are
0022  *  68XX-specific.
0023  */
0024 
0025 #ifndef __CN68XX_REGS_H__
0026 #define __CN68XX_REGS_H__
0027 
0028 /*###################### REQUEST QUEUE #########################*/
0029 
0030 #define    CN68XX_SLI_IQ_PORT0_PKIND             0x0800
0031 
0032 #define    CN68XX_SLI_IQ_PORT_PKIND(iq)           \
0033     (CN68XX_SLI_IQ_PORT0_PKIND + ((iq) * CN6XXX_IQ_OFFSET))
0034 
0035 /*############################ OUTPUT QUEUE #########################*/
0036 
0037 /* Starting pipe number and number of pipes used by the SLI packet output. */
0038 #define    CN68XX_SLI_TX_PIPE                    0x1230
0039 
0040 /*######################## INTERRUPTS #########################*/
0041 
0042 /*------------------ Interrupt Masks ----------------*/
0043 #define    CN68XX_INTR_PIPE_ERR                  BIT_ULL(61)
0044 
0045 #endif