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0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Linux network driver for QLogic BR-series Converged Network Adapter.
0004  */
0005 /*
0006  * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
0007  * Copyright (c) 2014-2015 QLogic Corporation
0008  * All rights reserved
0009  * www.qlogic.com
0010  */
0011 #ifndef __BFI_H__
0012 #define __BFI_H__
0013 
0014 #include "bfa_defs.h"
0015 
0016 /* BFI FW image type */
0017 #define BFI_FLASH_CHUNK_SZ          256 /*!< Flash chunk size */
0018 #define BFI_FLASH_CHUNK_SZ_WORDS    (BFI_FLASH_CHUNK_SZ/sizeof(u32))
0019 #define BFI_FLASH_IMAGE_SZ      0x100000
0020 
0021 /* Msg header common to all msgs */
0022 struct bfi_mhdr {
0023     u8      msg_class;  /*!< @ref enum bfi_mclass       */
0024     u8      msg_id;     /*!< msg opcode with in the class   */
0025     union {
0026         struct {
0027             u8  qid;
0028             u8  fn_lpu; /*!< msg destination            */
0029         } __packed h2i;
0030         u16 i2htok; /*!< token in msgs to host      */
0031     } __packed mtag;
0032 } __packed;
0033 
0034 #define bfi_fn_lpu(__fn, __lpu) ((__fn) << 1 | (__lpu))
0035 #define bfi_mhdr_2_fn(_mh)  ((_mh)->mtag.h2i.fn_lpu >> 1)
0036 #define bfi_mhdr_2_qid(_mh) ((_mh)->mtag.h2i.qid)
0037 
0038 #define bfi_h2i_set(_mh, _mc, _op, _fn_lpu) do {        \
0039     (_mh).msg_class         = (_mc);        \
0040     (_mh).msg_id            = (_op);        \
0041     (_mh).mtag.h2i.fn_lpu   = (_fn_lpu);            \
0042 } while (0)
0043 
0044 #define bfi_i2h_set(_mh, _mc, _op, _i2htok) do {        \
0045     (_mh).msg_class         = (_mc);        \
0046     (_mh).msg_id            = (_op);        \
0047     (_mh).mtag.i2htok       = (_i2htok);        \
0048 } while (0)
0049 
0050 /*
0051  * Message opcodes: 0-127 to firmware, 128-255 to host
0052  */
0053 #define BFI_I2H_OPCODE_BASE 128
0054 #define BFA_I2HM(_x)            ((_x) + BFI_I2H_OPCODE_BASE)
0055 
0056 /****************************************************************************
0057  *
0058  * Scatter Gather Element and Page definition
0059  *
0060  ****************************************************************************
0061  */
0062 
0063 /* DMA addresses */
0064 union bfi_addr_u {
0065     struct {
0066         u32 addr_lo;
0067         u32 addr_hi;
0068     } __packed a32;
0069 } __packed;
0070 
0071 /* Generic DMA addr-len pair. */
0072 struct bfi_alen {
0073     union bfi_addr_u    al_addr;    /* DMA addr of buffer   */
0074     u32         al_len;     /* length of buffer */
0075 } __packed;
0076 
0077 /*
0078  * Large Message structure - 128 Bytes size Msgs
0079  */
0080 #define BFI_LMSG_SZ     128
0081 #define BFI_LMSG_PL_WSZ \
0082             ((BFI_LMSG_SZ - sizeof(struct bfi_mhdr)) / 4)
0083 
0084 /* Mailbox message structure */
0085 #define BFI_MBMSG_SZ        7
0086 struct bfi_mbmsg {
0087     struct bfi_mhdr mh;
0088     u32     pl[BFI_MBMSG_SZ];
0089 } __packed;
0090 
0091 /* Supported PCI function class codes (personality) */
0092 enum bfi_pcifn_class {
0093     BFI_PCIFN_CLASS_FC  = 0x0c04,
0094     BFI_PCIFN_CLASS_ETH = 0x0200,
0095 };
0096 
0097 /* Message Classes */
0098 enum bfi_mclass {
0099     BFI_MC_IOC      = 1,    /*!< IO Controller (IOC)        */
0100     BFI_MC_DIAG     = 2,    /*!< Diagnostic Msgs            */
0101     BFI_MC_FLASH        = 3,    /*!< Flash message class        */
0102     BFI_MC_CEE      = 4,    /*!< CEE                */
0103     BFI_MC_FCPORT       = 5,    /*!< FC port                */
0104     BFI_MC_IOCFC        = 6,    /*!< FC - IO Controller (IOC)       */
0105     BFI_MC_LL       = 7,    /*!< Link Layer             */
0106     BFI_MC_UF       = 8,    /*!< Unsolicited frame receive      */
0107     BFI_MC_FCXP     = 9,    /*!< FC Transport           */
0108     BFI_MC_LPS      = 10,   /*!< lport fc login services        */
0109     BFI_MC_RPORT        = 11,   /*!< Remote port            */
0110     BFI_MC_ITNIM        = 12,   /*!< I-T nexus (Initiator mode)     */
0111     BFI_MC_IOIM_READ    = 13,   /*!< read IO (Initiator mode)       */
0112     BFI_MC_IOIM_WRITE   = 14,   /*!< write IO (Initiator mode)      */
0113     BFI_MC_IOIM_IO      = 15,   /*!< IO (Initiator mode)        */
0114     BFI_MC_IOIM     = 16,   /*!< IO (Initiator mode)        */
0115     BFI_MC_IOIM_IOCOM   = 17,   /*!< good IO completion         */
0116     BFI_MC_TSKIM        = 18,   /*!< Initiator Task management      */
0117     BFI_MC_SBOOT        = 19,   /*!< SAN boot services          */
0118     BFI_MC_IPFC     = 20,   /*!< IP over FC Msgs            */
0119     BFI_MC_PORT     = 21,   /*!< Physical port          */
0120     BFI_MC_SFP      = 22,   /*!< SFP module             */
0121     BFI_MC_MSGQ     = 23,   /*!< MSGQ               */
0122     BFI_MC_ENET     = 24,   /*!< ENET commands/responses        */
0123     BFI_MC_PHY      = 25,   /*!< External PHY message class     */
0124     BFI_MC_NBOOT        = 26,   /*!< Network Boot           */
0125     BFI_MC_TIO_READ     = 27,   /*!< read IO (Target mode)      */
0126     BFI_MC_TIO_WRITE    = 28,   /*!< write IO (Target mode)     */
0127     BFI_MC_TIO_DATA_XFERED  = 29,   /*!< ds transferred (target mode)   */
0128     BFI_MC_TIO_IO       = 30,   /*!< IO (Target mode)           */
0129     BFI_MC_TIO      = 31,   /*!< IO (target mode)           */
0130     BFI_MC_MFG      = 32,   /*!< MFG/ASIC block commands        */
0131     BFI_MC_EDMA     = 33,   /*!< EDMA copy commands         */
0132     BFI_MC_MAX      = 34
0133 };
0134 
0135 #define BFI_IOC_MSGLEN_MAX  32  /* 32 bytes */
0136 
0137 #define BFI_FWBOOT_ENV_OS       0
0138 
0139 /*----------------------------------------------------------------------
0140  *              IOC
0141  *----------------------------------------------------------------------
0142  */
0143 
0144 /* Different asic generations */
0145 enum bfi_asic_gen {
0146     BFI_ASIC_GEN_CB     = 1,
0147     BFI_ASIC_GEN_CT     = 2,
0148     BFI_ASIC_GEN_CT2    = 3,
0149 };
0150 
0151 enum bfi_asic_mode {
0152     BFI_ASIC_MODE_FC    = 1,    /* FC up to 8G speed        */
0153     BFI_ASIC_MODE_FC16  = 2,    /* FC up to 16G speed       */
0154     BFI_ASIC_MODE_ETH   = 3,    /* Ethernet ports       */
0155     BFI_ASIC_MODE_COMBO = 4,    /* FC 16G and Ethernet 10G port */
0156 };
0157 
0158 enum bfi_ioc_h2i_msgs {
0159     BFI_IOC_H2I_ENABLE_REQ      = 1,
0160     BFI_IOC_H2I_DISABLE_REQ     = 2,
0161     BFI_IOC_H2I_GETATTR_REQ     = 3,
0162     BFI_IOC_H2I_DBG_SYNC        = 4,
0163     BFI_IOC_H2I_DBG_DUMP        = 5,
0164 };
0165 
0166 enum bfi_ioc_i2h_msgs {
0167     BFI_IOC_I2H_ENABLE_REPLY    = BFA_I2HM(1),
0168     BFI_IOC_I2H_DISABLE_REPLY   = BFA_I2HM(2),
0169     BFI_IOC_I2H_GETATTR_REPLY   = BFA_I2HM(3),
0170     BFI_IOC_I2H_HBEAT       = BFA_I2HM(4),
0171 };
0172 
0173 /* BFI_IOC_H2I_GETATTR_REQ message */
0174 struct bfi_ioc_getattr_req {
0175     struct bfi_mhdr mh;
0176     union bfi_addr_u    attr_addr;
0177 } __packed;
0178 
0179 struct bfi_ioc_attr {
0180     u64     mfg_pwwn;   /*!< Mfg port wwn      */
0181     u64     mfg_nwwn;   /*!< Mfg node wwn      */
0182     u8      mfg_mac[ETH_ALEN]; /*!< Mfg mac        */
0183     u8      port_mode;  /* enum bfi_port_mode      */
0184     u8      rsvd_a;
0185     u64     pwwn;
0186     u64     nwwn;
0187     u8      mac[ETH_ALEN];  /*!< PBC or Mfg mac    */
0188     u16 rsvd_b;
0189     u8      fcoe_mac[ETH_ALEN];
0190     u16 rsvd_c;
0191     char        brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)];
0192     u8      pcie_gen;
0193     u8      pcie_lanes_orig;
0194     u8      pcie_lanes;
0195     u8      rx_bbcredit;    /*!< receive buffer credits */
0196     u32 adapter_prop;   /*!< adapter properties     */
0197     u16 maxfrsize;  /*!< max receive frame size */
0198     char        asic_rev;
0199     u8      rsvd_d;
0200     char        fw_version[BFA_VERSION_LEN];
0201     char        optrom_version[BFA_VERSION_LEN];
0202     struct bfa_mfg_vpd vpd;
0203     u32 card_type;  /*!< card type          */
0204 } __packed;
0205 
0206 /* BFI_IOC_I2H_GETATTR_REPLY message */
0207 struct bfi_ioc_getattr_reply {
0208     struct bfi_mhdr mh; /*!< Common msg header      */
0209     u8          status; /*!< cfg reply status       */
0210     u8          rsvd[3];
0211 } __packed;
0212 
0213 /* Firmware memory page offsets */
0214 #define BFI_IOC_SMEM_PG0_CB (0x40)
0215 #define BFI_IOC_SMEM_PG0_CT (0x180)
0216 
0217 /* Firmware statistic offset */
0218 #define BFI_IOC_FWSTATS_OFF (0x6B40)
0219 #define BFI_IOC_FWSTATS_SZ  (4096)
0220 
0221 /* Firmware trace offset */
0222 #define BFI_IOC_TRC_OFF     (0x4b00)
0223 #define BFI_IOC_TRC_ENTS    256
0224 #define BFI_IOC_TRC_ENT_SZ  16
0225 #define BFI_IOC_TRC_HDR_SZ  32
0226 
0227 #define BFI_IOC_FW_SIGNATURE    (0xbfadbfad)
0228 #define BFI_IOC_FW_INV_SIGN (0xdeaddead)
0229 #define BFI_IOC_MD5SUM_SZ   4
0230 
0231 struct bfi_ioc_fwver {
0232 #ifdef __BIG_ENDIAN
0233     u8 patch;
0234     u8 maint;
0235     u8 minor;
0236     u8 major;
0237     u8 rsvd[2];
0238     u8 build;
0239     u8 phase;
0240 #else
0241     u8 major;
0242     u8 minor;
0243     u8 maint;
0244     u8 patch;
0245     u8 phase;
0246     u8 build;
0247     u8 rsvd[2];
0248 #endif
0249 } __packed;
0250 
0251 struct bfi_ioc_image_hdr {
0252     u32 signature;  /*!< constant signature */
0253     u8  asic_gen;   /*!< asic generation */
0254     u8  asic_mode;
0255     u8  port0_mode; /*!< device mode for port 0 */
0256     u8  port1_mode; /*!< device mode for port 1 */
0257     u32 exec;       /*!< exec vector    */
0258     u32 bootenv;    /*!< firmware boot env */
0259     u32 rsvd_b[2];
0260     struct bfi_ioc_fwver fwver;
0261     u32 md5sum[BFI_IOC_MD5SUM_SZ];
0262 } __packed;
0263 
0264 enum bfi_ioc_img_ver_cmp {
0265     BFI_IOC_IMG_VER_INCOMP,
0266     BFI_IOC_IMG_VER_OLD,
0267     BFI_IOC_IMG_VER_SAME,
0268     BFI_IOC_IMG_VER_BETTER
0269 };
0270 
0271 #define BFI_FWBOOT_DEVMODE_OFF      4
0272 #define BFI_FWBOOT_TYPE_OFF     8
0273 #define BFI_FWBOOT_ENV_OFF      12
0274 #define BFI_FWBOOT_DEVMODE(__asic_gen, __asic_mode, __p0_mode, __p1_mode) \
0275     (((u32)(__asic_gen)) << 24 |    \
0276      ((u32)(__asic_mode)) << 16 |   \
0277      ((u32)(__p0_mode)) << 8 |  \
0278      ((u32)(__p1_mode)))
0279 
0280 enum bfi_fwboot_type {
0281     BFI_FWBOOT_TYPE_NORMAL  = 0,
0282     BFI_FWBOOT_TYPE_FLASH   = 1,
0283     BFI_FWBOOT_TYPE_MEMTEST = 2,
0284 };
0285 
0286 enum bfi_port_mode {
0287     BFI_PORT_MODE_FC    = 1,
0288     BFI_PORT_MODE_ETH   = 2,
0289 };
0290 
0291 struct bfi_ioc_hbeat {
0292     struct bfi_mhdr mh;     /*!< common msg header      */
0293     u32    hb_count;    /*!< current heart beat count   */
0294 } __packed;
0295 
0296 /* IOC hardware/firmware state */
0297 enum bfi_ioc_state {
0298     BFI_IOC_UNINIT      = 0,    /*!< not initialized             */
0299     BFI_IOC_INITING     = 1,    /*!< h/w is being initialized        */
0300     BFI_IOC_HWINIT      = 2,    /*!< h/w is initialized          */
0301     BFI_IOC_CFG     = 3,    /*!< IOC configuration in progress   */
0302     BFI_IOC_OP      = 4,    /*!< IOC is operational          */
0303     BFI_IOC_DISABLING   = 5,    /*!< IOC is being disabled       */
0304     BFI_IOC_DISABLED    = 6,    /*!< IOC is disabled             */
0305     BFI_IOC_CFG_DISABLED    = 7,    /*!< IOC is being disabled;transient */
0306     BFI_IOC_FAIL        = 8,    /*!< IOC heart-beat failure      */
0307     BFI_IOC_MEMTEST     = 9,    /*!< IOC is doing memtest        */
0308 };
0309 
0310 enum {
0311     BFI_ADAPTER_TYPE_FC = 0x01,     /*!< FC adapters       */
0312     BFI_ADAPTER_TYPE_MK = 0x0f0000, /*!< adapter type mask     */
0313     BFI_ADAPTER_TYPE_SH = 16,           /*!< adapter type shift    */
0314     BFI_ADAPTER_NPORTS_MK   = 0xff00,   /*!< number of ports mask  */
0315     BFI_ADAPTER_NPORTS_SH   = 8,            /*!< number of ports shift */
0316     BFI_ADAPTER_SPEED_MK    = 0xff,     /*!< adapter speed mask    */
0317     BFI_ADAPTER_SPEED_SH    = 0,            /*!< adapter speed shift   */
0318     BFI_ADAPTER_PROTO   = 0x100000, /*!< prototype adapaters   */
0319     BFI_ADAPTER_TTV     = 0x200000, /*!< TTV debug capable     */
0320     BFI_ADAPTER_UNSUPP  = 0x400000, /*!< unknown adapter type  */
0321 };
0322 
0323 #define BFI_ADAPTER_GETP(__prop, __adap_prop)           \
0324     (((__adap_prop) & BFI_ADAPTER_ ## __prop ## _MK) >> \
0325         BFI_ADAPTER_ ## __prop ## _SH)
0326 #define BFI_ADAPTER_SETP(__prop, __val)             \
0327     ((__val) << BFI_ADAPTER_ ## __prop ## _SH)
0328 #define BFI_ADAPTER_IS_SPECIAL(__adap_type)         \
0329     ((__adap_type) & (BFI_ADAPTER_TTV | BFI_ADAPTER_PROTO | \
0330             BFI_ADAPTER_UNSUPP))
0331 
0332 /* BFI_IOC_H2I_ENABLE_REQ & BFI_IOC_H2I_DISABLE_REQ messages */
0333 struct bfi_ioc_ctrl_req {
0334     struct bfi_mhdr mh;
0335     u16         clscode;
0336     u16         rsvd;
0337     u32     tv_sec;
0338 } __packed;
0339 
0340 /* BFI_IOC_I2H_ENABLE_REPLY & BFI_IOC_I2H_DISABLE_REPLY messages */
0341 struct bfi_ioc_ctrl_reply {
0342     struct bfi_mhdr mh;         /*!< Common msg header     */
0343     u8          status;     /*!< enable/disable status */
0344     u8          port_mode;  /*!< enum bfa_mode */
0345     u8          cap_bm;     /*!< capability bit mask */
0346     u8          rsvd;
0347 } __packed;
0348 
0349 #define BFI_IOC_MSGSZ   8
0350 /* H2I Messages */
0351 union bfi_ioc_h2i_msg_u {
0352     struct bfi_mhdr mh;
0353     struct bfi_ioc_ctrl_req enable_req;
0354     struct bfi_ioc_ctrl_req disable_req;
0355     struct bfi_ioc_getattr_req getattr_req;
0356     u32         mboxmsg[BFI_IOC_MSGSZ];
0357 } __packed;
0358 
0359 /* I2H Messages */
0360 union bfi_ioc_i2h_msg_u {
0361     struct bfi_mhdr mh;
0362     struct bfi_ioc_ctrl_reply fw_event;
0363     u32         mboxmsg[BFI_IOC_MSGSZ];
0364 } __packed;
0365 
0366 /*----------------------------------------------------------------------
0367  *              MSGQ
0368  *----------------------------------------------------------------------
0369  */
0370 
0371 enum bfi_msgq_h2i_msgs {
0372     BFI_MSGQ_H2I_INIT_REQ      = 1,
0373     BFI_MSGQ_H2I_DOORBELL_PI    = 2,
0374     BFI_MSGQ_H2I_DOORBELL_CI    = 3,
0375     BFI_MSGQ_H2I_CMDQ_COPY_RSP      = 4,
0376 };
0377 
0378 enum bfi_msgq_i2h_msgs {
0379     BFI_MSGQ_I2H_INIT_RSP      = BFA_I2HM(BFI_MSGQ_H2I_INIT_REQ),
0380     BFI_MSGQ_I2H_DOORBELL_PI    = BFA_I2HM(BFI_MSGQ_H2I_DOORBELL_PI),
0381     BFI_MSGQ_I2H_DOORBELL_CI    = BFA_I2HM(BFI_MSGQ_H2I_DOORBELL_CI),
0382     BFI_MSGQ_I2H_CMDQ_COPY_REQ      = BFA_I2HM(BFI_MSGQ_H2I_CMDQ_COPY_RSP),
0383 };
0384 
0385 /* Messages(commands/responsed/AENS will have the following header */
0386 struct bfi_msgq_mhdr {
0387     u8  msg_class;
0388     u8  msg_id;
0389     u16 msg_token;
0390     u16 num_entries;
0391     u8  enet_id;
0392     u8  rsvd;
0393 } __packed;
0394 
0395 #define bfi_msgq_mhdr_set(_mh, _mc, _mid, _tok, _enet_id) do {  \
0396     (_mh).msg_class  = (_mc);   \
0397     (_mh).msg_id        = (_mid);       \
0398     (_mh).msg_token  = (_tok);       \
0399     (_mh).enet_id      = (_enet_id);   \
0400 } while (0)
0401 
0402 /*
0403  * Mailbox  for messaging interface
0404  */
0405 #define BFI_MSGQ_CMD_ENTRY_SIZE  (64)    /* TBD */
0406 #define BFI_MSGQ_RSP_ENTRY_SIZE  (64)    /* TBD */
0407 
0408 #define bfi_msgq_num_cmd_entries(_size)              \
0409     (((_size) + BFI_MSGQ_CMD_ENTRY_SIZE - 1) / BFI_MSGQ_CMD_ENTRY_SIZE)
0410 
0411 struct bfi_msgq {
0412     union bfi_addr_u addr;
0413     u16 q_depth;     /* Total num of entries in the queue */
0414     u8 rsvd[2];
0415 } __packed;
0416 
0417 /* BFI_ENET_MSGQ_CFG_REQ TBD init or cfg? */
0418 struct bfi_msgq_cfg_req {
0419     struct bfi_mhdr mh;
0420     struct bfi_msgq cmdq;
0421     struct bfi_msgq rspq;
0422 } __packed;
0423 
0424 /* BFI_ENET_MSGQ_CFG_RSP */
0425 struct bfi_msgq_cfg_rsp {
0426     struct bfi_mhdr mh;
0427     u8 cmd_status;
0428     u8 rsvd[3];
0429 } __packed;
0430 
0431 /* BFI_MSGQ_H2I_DOORBELL */
0432 struct bfi_msgq_h2i_db {
0433     struct bfi_mhdr mh;
0434     union {
0435         u16 cmdq_pi;
0436         u16 rspq_ci;
0437     } __packed idx;
0438 } __packed;
0439 
0440 /* BFI_MSGQ_I2H_DOORBELL */
0441 struct bfi_msgq_i2h_db {
0442     struct bfi_mhdr mh;
0443     union {
0444         u16 rspq_pi;
0445         u16 cmdq_ci;
0446     } __packed idx;
0447 } __packed;
0448 
0449 #define BFI_CMD_COPY_SZ 28
0450 
0451 /* BFI_MSGQ_H2I_CMD_COPY_RSP */
0452 struct bfi_msgq_h2i_cmdq_copy_rsp {
0453     struct bfi_mhdr mh;
0454     u8        data[BFI_CMD_COPY_SZ];
0455 } __packed;
0456 
0457 /* BFI_MSGQ_I2H_CMD_COPY_REQ */
0458 struct bfi_msgq_i2h_cmdq_copy_req {
0459     struct bfi_mhdr mh;
0460     u16     offset;
0461     u16     len;
0462 } __packed;
0463 
0464 /*
0465  *      FLASH module specific
0466  */
0467 enum bfi_flash_h2i_msgs {
0468     BFI_FLASH_H2I_QUERY_REQ = 1,
0469     BFI_FLASH_H2I_ERASE_REQ = 2,
0470     BFI_FLASH_H2I_WRITE_REQ = 3,
0471     BFI_FLASH_H2I_READ_REQ = 4,
0472     BFI_FLASH_H2I_BOOT_VER_REQ = 5,
0473 };
0474 
0475 enum bfi_flash_i2h_msgs {
0476     BFI_FLASH_I2H_QUERY_RSP = BFA_I2HM(1),
0477     BFI_FLASH_I2H_ERASE_RSP = BFA_I2HM(2),
0478     BFI_FLASH_I2H_WRITE_RSP = BFA_I2HM(3),
0479     BFI_FLASH_I2H_READ_RSP = BFA_I2HM(4),
0480     BFI_FLASH_I2H_BOOT_VER_RSP = BFA_I2HM(5),
0481     BFI_FLASH_I2H_EVENT = BFA_I2HM(127),
0482 };
0483 
0484 /*
0485  * Flash query request
0486  */
0487 struct bfi_flash_query_req {
0488     struct bfi_mhdr mh;   /* Common msg header */
0489     struct bfi_alen alen;
0490 } __packed;
0491 
0492 /*
0493  * Flash write request
0494  */
0495 struct bfi_flash_write_req {
0496     struct bfi_mhdr mh; /* Common msg header */
0497     struct bfi_alen alen;
0498     u32 type;   /* partition type */
0499     u8  instance; /* partition instance */
0500     u8  last;
0501     u8  rsv[2];
0502     u32 offset;
0503     u32 length;
0504 } __packed;
0505 
0506 /*
0507  * Flash read request
0508  */
0509 struct bfi_flash_read_req {
0510     struct bfi_mhdr mh; /* Common msg header */
0511     u32 type;       /* partition type */
0512     u8  instance;   /* partition instance */
0513     u8  rsv[3];
0514     u32 offset;
0515     u32 length;
0516     struct bfi_alen alen;
0517 } __packed;
0518 
0519 /*
0520  * Flash query response
0521  */
0522 struct bfi_flash_query_rsp {
0523     struct bfi_mhdr mh; /* Common msg header */
0524     u32 status;
0525 } __packed;
0526 
0527 /*
0528  * Flash read response
0529  */
0530 struct bfi_flash_read_rsp {
0531     struct bfi_mhdr mh; /* Common msg header */
0532     u32 type;       /* partition type */
0533     u8  instance;   /* partition instance */
0534     u8  rsv[3];
0535     u32 status;
0536     u32 length;
0537 } __packed;
0538 
0539 /*
0540  * Flash write response
0541  */
0542 struct bfi_flash_write_rsp {
0543     struct bfi_mhdr mh; /* Common msg header */
0544     u32 type;       /* partition type */
0545     u8  instance;   /* partition instance */
0546     u8  rsv[3];
0547     u32 status;
0548     u32 length;
0549 } __packed;
0550 
0551 #endif /* __BFI_H__ */
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