0001
0002
0003
0004
0005
0006
0007
0008
0009
0010
0011 #ifndef __BFA_DEFS_MFG_COMM_H__
0012 #define __BFA_DEFS_MFG_COMM_H__
0013
0014 #include "bfa_defs.h"
0015
0016
0017 #define BFA_MFG_VERSION 3
0018 #define BFA_MFG_VERSION_UNINIT 0xFF
0019
0020
0021 #define BFA_MFG_ENC_VER 2
0022
0023
0024 #define BFA_MFG_VER1_LEN 128
0025
0026
0027 #define BFA_MFG_HDR_LEN 4
0028
0029 #define BFA_MFG_SERIALNUM_SIZE 11
0030 #define STRSZ(_n) (((_n) + 4) & ~3)
0031
0032
0033 enum {
0034 BFA_MFG_TYPE_CB_MAX = 825,
0035 BFA_MFG_TYPE_FC8P2 = 825,
0036 BFA_MFG_TYPE_FC8P1 = 815,
0037 BFA_MFG_TYPE_FC4P2 = 425,
0038 BFA_MFG_TYPE_FC4P1 = 415,
0039 BFA_MFG_TYPE_CNA10P2 = 1020,
0040 BFA_MFG_TYPE_CNA10P1 = 1010,
0041 BFA_MFG_TYPE_JAYHAWK = 804,
0042 BFA_MFG_TYPE_WANCHESE = 1007,
0043 BFA_MFG_TYPE_ASTRA = 807,
0044 BFA_MFG_TYPE_LIGHTNING_P0 = 902,
0045 BFA_MFG_TYPE_LIGHTNING = 1741,
0046 BFA_MFG_TYPE_PROWLER_F = 1560,
0047 BFA_MFG_TYPE_PROWLER_N = 1410,
0048 BFA_MFG_TYPE_PROWLER_C = 1710,
0049 BFA_MFG_TYPE_PROWLER_D = 1860,
0050 BFA_MFG_TYPE_CHINOOK = 1867,
0051 BFA_MFG_TYPE_INVALID = 0,
0052 };
0053
0054
0055 #define bfa_mfg_is_mezz(type) (( \
0056 (type) == BFA_MFG_TYPE_JAYHAWK || \
0057 (type) == BFA_MFG_TYPE_WANCHESE || \
0058 (type) == BFA_MFG_TYPE_ASTRA || \
0059 (type) == BFA_MFG_TYPE_LIGHTNING_P0 || \
0060 (type) == BFA_MFG_TYPE_LIGHTNING || \
0061 (type) == BFA_MFG_TYPE_CHINOOK))
0062
0063 enum {
0064 CB_GPIO_TTV = (1),
0065 CB_GPIO_FC8P2 = (2),
0066 CB_GPIO_FC8P1 = (3),
0067 CB_GPIO_FC4P2 = (4),
0068 CB_GPIO_FC4P1 = (5),
0069 CB_GPIO_DFLY = (6),
0070 CB_GPIO_PROTO = BIT(7)
0071 };
0072
0073 #define bfa_mfg_adapter_prop_init_gpio(gpio, card_type, prop) \
0074 do { \
0075 if ((gpio) & CB_GPIO_PROTO) { \
0076 (prop) |= BFI_ADAPTER_PROTO; \
0077 (gpio) &= ~CB_GPIO_PROTO; \
0078 } \
0079 switch (gpio) { \
0080 case CB_GPIO_TTV: \
0081 (prop) |= BFI_ADAPTER_TTV; \
0082 case CB_GPIO_DFLY: \
0083 case CB_GPIO_FC8P2: \
0084 (prop) |= BFI_ADAPTER_SETP(NPORTS, 2); \
0085 (prop) |= BFI_ADAPTER_SETP(SPEED, 8); \
0086 (card_type) = BFA_MFG_TYPE_FC8P2; \
0087 break; \
0088 case CB_GPIO_FC8P1: \
0089 (prop) |= BFI_ADAPTER_SETP(NPORTS, 1); \
0090 (prop) |= BFI_ADAPTER_SETP(SPEED, 8); \
0091 (card_type) = BFA_MFG_TYPE_FC8P1; \
0092 break; \
0093 case CB_GPIO_FC4P2: \
0094 (prop) |= BFI_ADAPTER_SETP(NPORTS, 2); \
0095 (prop) |= BFI_ADAPTER_SETP(SPEED, 4); \
0096 (card_type) = BFA_MFG_TYPE_FC4P2; \
0097 break; \
0098 case CB_GPIO_FC4P1: \
0099 (prop) |= BFI_ADAPTER_SETP(NPORTS, 1); \
0100 (prop) |= BFI_ADAPTER_SETP(SPEED, 4); \
0101 (card_type) = BFA_MFG_TYPE_FC4P1; \
0102 break; \
0103 default: \
0104 (prop) |= BFI_ADAPTER_UNSUPP; \
0105 (card_type) = BFA_MFG_TYPE_INVALID; \
0106 } \
0107 } while (0)
0108
0109
0110 #define BFA_MFG_VPD_LEN 512
0111 #define BFA_MFG_VPD_LEN_INVALID 0
0112
0113 #define BFA_MFG_VPD_PCI_HDR_OFF 137
0114 #define BFA_MFG_VPD_PCI_VER_MASK 0x07
0115 #define BFA_MFG_VPD_PCI_VDR_MASK 0xf8
0116
0117
0118 enum {
0119 BFA_MFG_VPD_UNKNOWN = 0,
0120 BFA_MFG_VPD_IBM = 1,
0121 BFA_MFG_VPD_HP = 2,
0122 BFA_MFG_VPD_DELL = 3,
0123 BFA_MFG_VPD_PCI_IBM = 0x08,
0124 BFA_MFG_VPD_PCI_HP = 0x10,
0125 BFA_MFG_VPD_PCI_DELL = 0x20,
0126 BFA_MFG_VPD_PCI_BRCD = 0xf8,
0127 };
0128
0129
0130
0131
0132
0133 struct bfa_mfg_vpd {
0134 u8 version;
0135 u8 vpd_sig[3];
0136 u8 chksum;
0137 u8 vendor;
0138 u8 len;
0139 u8 rsv;
0140 u8 data[BFA_MFG_VPD_LEN];
0141 } __packed;
0142
0143 #endif