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0011 #include <linux/ethtool.h>
0012 #include <linux/module.h>
0013 #include <linux/pci.h>
0014 #include <linux/netdevice.h>
0015 #include <linux/if_vlan.h>
0016 #include <linux/interrupt.h>
0017 #include <linux/etherdevice.h>
0018 #include "bnxt_hsi.h"
0019 #include "bnxt.h"
0020 #include "bnxt_hwrm.h"
0021 #include "bnxt_ulp.h"
0022 #include "bnxt_sriov.h"
0023 #include "bnxt_vfr.h"
0024 #include "bnxt_ethtool.h"
0025
0026 #ifdef CONFIG_BNXT_SRIOV
0027 static int bnxt_hwrm_fwd_async_event_cmpl(struct bnxt *bp,
0028 struct bnxt_vf_info *vf, u16 event_id)
0029 {
0030 struct hwrm_fwd_async_event_cmpl_input *req;
0031 struct hwrm_async_event_cmpl *async_cmpl;
0032 int rc = 0;
0033
0034 rc = hwrm_req_init(bp, req, HWRM_FWD_ASYNC_EVENT_CMPL);
0035 if (rc)
0036 goto exit;
0037
0038 if (vf)
0039 req->encap_async_event_target_id = cpu_to_le16(vf->fw_fid);
0040 else
0041
0042 req->encap_async_event_target_id = cpu_to_le16(0xffff);
0043 async_cmpl =
0044 (struct hwrm_async_event_cmpl *)req->encap_async_event_cmpl;
0045 async_cmpl->type = cpu_to_le16(ASYNC_EVENT_CMPL_TYPE_HWRM_ASYNC_EVENT);
0046 async_cmpl->event_id = cpu_to_le16(event_id);
0047
0048 rc = hwrm_req_send(bp, req);
0049 exit:
0050 if (rc)
0051 netdev_err(bp->dev, "hwrm_fwd_async_event_cmpl failed. rc:%d\n",
0052 rc);
0053 return rc;
0054 }
0055
0056 static int bnxt_vf_ndo_prep(struct bnxt *bp, int vf_id)
0057 {
0058 if (!bp->pf.active_vfs) {
0059 netdev_err(bp->dev, "vf ndo called though sriov is disabled\n");
0060 return -EINVAL;
0061 }
0062 if (vf_id >= bp->pf.active_vfs) {
0063 netdev_err(bp->dev, "Invalid VF id %d\n", vf_id);
0064 return -EINVAL;
0065 }
0066 return 0;
0067 }
0068
0069 int bnxt_set_vf_spoofchk(struct net_device *dev, int vf_id, bool setting)
0070 {
0071 struct bnxt *bp = netdev_priv(dev);
0072 struct hwrm_func_cfg_input *req;
0073 bool old_setting = false;
0074 struct bnxt_vf_info *vf;
0075 u32 func_flags;
0076 int rc;
0077
0078 if (bp->hwrm_spec_code < 0x10701)
0079 return -ENOTSUPP;
0080
0081 rc = bnxt_vf_ndo_prep(bp, vf_id);
0082 if (rc)
0083 return rc;
0084
0085 vf = &bp->pf.vf[vf_id];
0086 if (vf->flags & BNXT_VF_SPOOFCHK)
0087 old_setting = true;
0088 if (old_setting == setting)
0089 return 0;
0090
0091 if (setting)
0092 func_flags = FUNC_CFG_REQ_FLAGS_SRC_MAC_ADDR_CHECK_ENABLE;
0093 else
0094 func_flags = FUNC_CFG_REQ_FLAGS_SRC_MAC_ADDR_CHECK_DISABLE;
0095
0096
0097
0098 rc = hwrm_req_init(bp, req, HWRM_FUNC_CFG);
0099 if (!rc) {
0100 req->fid = cpu_to_le16(vf->fw_fid);
0101 req->flags = cpu_to_le32(func_flags);
0102 rc = hwrm_req_send(bp, req);
0103 if (!rc) {
0104 if (setting)
0105 vf->flags |= BNXT_VF_SPOOFCHK;
0106 else
0107 vf->flags &= ~BNXT_VF_SPOOFCHK;
0108 }
0109 }
0110 return rc;
0111 }
0112
0113 static int bnxt_hwrm_func_qcfg_flags(struct bnxt *bp, struct bnxt_vf_info *vf)
0114 {
0115 struct hwrm_func_qcfg_output *resp;
0116 struct hwrm_func_qcfg_input *req;
0117 int rc;
0118
0119 rc = hwrm_req_init(bp, req, HWRM_FUNC_QCFG);
0120 if (rc)
0121 return rc;
0122
0123 req->fid = cpu_to_le16(BNXT_PF(bp) ? vf->fw_fid : 0xffff);
0124 resp = hwrm_req_hold(bp, req);
0125 rc = hwrm_req_send(bp, req);
0126 if (!rc)
0127 vf->func_qcfg_flags = le16_to_cpu(resp->flags);
0128 hwrm_req_drop(bp, req);
0129 return rc;
0130 }
0131
0132 bool bnxt_is_trusted_vf(struct bnxt *bp, struct bnxt_vf_info *vf)
0133 {
0134 if (BNXT_PF(bp) && !(bp->fw_cap & BNXT_FW_CAP_TRUSTED_VF))
0135 return !!(vf->flags & BNXT_VF_TRUST);
0136
0137 bnxt_hwrm_func_qcfg_flags(bp, vf);
0138 return !!(vf->func_qcfg_flags & FUNC_QCFG_RESP_FLAGS_TRUSTED_VF);
0139 }
0140
0141 static int bnxt_hwrm_set_trusted_vf(struct bnxt *bp, struct bnxt_vf_info *vf)
0142 {
0143 struct hwrm_func_cfg_input *req;
0144 int rc;
0145
0146 if (!(bp->fw_cap & BNXT_FW_CAP_TRUSTED_VF))
0147 return 0;
0148
0149 rc = hwrm_req_init(bp, req, HWRM_FUNC_CFG);
0150 if (rc)
0151 return rc;
0152
0153 req->fid = cpu_to_le16(vf->fw_fid);
0154 if (vf->flags & BNXT_VF_TRUST)
0155 req->flags = cpu_to_le32(FUNC_CFG_REQ_FLAGS_TRUSTED_VF_ENABLE);
0156 else
0157 req->flags = cpu_to_le32(FUNC_CFG_REQ_FLAGS_TRUSTED_VF_DISABLE);
0158 return hwrm_req_send(bp, req);
0159 }
0160
0161 int bnxt_set_vf_trust(struct net_device *dev, int vf_id, bool trusted)
0162 {
0163 struct bnxt *bp = netdev_priv(dev);
0164 struct bnxt_vf_info *vf;
0165
0166 if (bnxt_vf_ndo_prep(bp, vf_id))
0167 return -EINVAL;
0168
0169 vf = &bp->pf.vf[vf_id];
0170 if (trusted)
0171 vf->flags |= BNXT_VF_TRUST;
0172 else
0173 vf->flags &= ~BNXT_VF_TRUST;
0174
0175 bnxt_hwrm_set_trusted_vf(bp, vf);
0176 return 0;
0177 }
0178
0179 int bnxt_get_vf_config(struct net_device *dev, int vf_id,
0180 struct ifla_vf_info *ivi)
0181 {
0182 struct bnxt *bp = netdev_priv(dev);
0183 struct bnxt_vf_info *vf;
0184 int rc;
0185
0186 rc = bnxt_vf_ndo_prep(bp, vf_id);
0187 if (rc)
0188 return rc;
0189
0190 ivi->vf = vf_id;
0191 vf = &bp->pf.vf[vf_id];
0192
0193 if (is_valid_ether_addr(vf->mac_addr))
0194 memcpy(&ivi->mac, vf->mac_addr, ETH_ALEN);
0195 else
0196 memcpy(&ivi->mac, vf->vf_mac_addr, ETH_ALEN);
0197 ivi->max_tx_rate = vf->max_tx_rate;
0198 ivi->min_tx_rate = vf->min_tx_rate;
0199 ivi->vlan = vf->vlan;
0200 if (vf->flags & BNXT_VF_QOS)
0201 ivi->qos = vf->vlan >> VLAN_PRIO_SHIFT;
0202 else
0203 ivi->qos = 0;
0204 ivi->spoofchk = !!(vf->flags & BNXT_VF_SPOOFCHK);
0205 ivi->trusted = bnxt_is_trusted_vf(bp, vf);
0206 if (!(vf->flags & BNXT_VF_LINK_FORCED))
0207 ivi->linkstate = IFLA_VF_LINK_STATE_AUTO;
0208 else if (vf->flags & BNXT_VF_LINK_UP)
0209 ivi->linkstate = IFLA_VF_LINK_STATE_ENABLE;
0210 else
0211 ivi->linkstate = IFLA_VF_LINK_STATE_DISABLE;
0212
0213 return 0;
0214 }
0215
0216 int bnxt_set_vf_mac(struct net_device *dev, int vf_id, u8 *mac)
0217 {
0218 struct bnxt *bp = netdev_priv(dev);
0219 struct hwrm_func_cfg_input *req;
0220 struct bnxt_vf_info *vf;
0221 int rc;
0222
0223 rc = bnxt_vf_ndo_prep(bp, vf_id);
0224 if (rc)
0225 return rc;
0226
0227
0228
0229 if (is_multicast_ether_addr(mac)) {
0230 netdev_err(dev, "Invalid VF ethernet address\n");
0231 return -EINVAL;
0232 }
0233 vf = &bp->pf.vf[vf_id];
0234
0235 rc = hwrm_req_init(bp, req, HWRM_FUNC_CFG);
0236 if (rc)
0237 return rc;
0238
0239 memcpy(vf->mac_addr, mac, ETH_ALEN);
0240
0241 req->fid = cpu_to_le16(vf->fw_fid);
0242 req->enables = cpu_to_le32(FUNC_CFG_REQ_ENABLES_DFLT_MAC_ADDR);
0243 memcpy(req->dflt_mac_addr, mac, ETH_ALEN);
0244 return hwrm_req_send(bp, req);
0245 }
0246
0247 int bnxt_set_vf_vlan(struct net_device *dev, int vf_id, u16 vlan_id, u8 qos,
0248 __be16 vlan_proto)
0249 {
0250 struct bnxt *bp = netdev_priv(dev);
0251 struct hwrm_func_cfg_input *req;
0252 struct bnxt_vf_info *vf;
0253 u16 vlan_tag;
0254 int rc;
0255
0256 if (bp->hwrm_spec_code < 0x10201)
0257 return -ENOTSUPP;
0258
0259 if (vlan_proto != htons(ETH_P_8021Q))
0260 return -EPROTONOSUPPORT;
0261
0262 rc = bnxt_vf_ndo_prep(bp, vf_id);
0263 if (rc)
0264 return rc;
0265
0266
0267
0268
0269 if (vlan_id > 4095 || qos)
0270 return -EINVAL;
0271
0272 vf = &bp->pf.vf[vf_id];
0273 vlan_tag = vlan_id;
0274 if (vlan_tag == vf->vlan)
0275 return 0;
0276
0277 rc = hwrm_req_init(bp, req, HWRM_FUNC_CFG);
0278 if (!rc) {
0279 req->fid = cpu_to_le16(vf->fw_fid);
0280 req->dflt_vlan = cpu_to_le16(vlan_tag);
0281 req->enables = cpu_to_le32(FUNC_CFG_REQ_ENABLES_DFLT_VLAN);
0282 rc = hwrm_req_send(bp, req);
0283 if (!rc)
0284 vf->vlan = vlan_tag;
0285 }
0286 return rc;
0287 }
0288
0289 int bnxt_set_vf_bw(struct net_device *dev, int vf_id, int min_tx_rate,
0290 int max_tx_rate)
0291 {
0292 struct bnxt *bp = netdev_priv(dev);
0293 struct hwrm_func_cfg_input *req;
0294 struct bnxt_vf_info *vf;
0295 u32 pf_link_speed;
0296 int rc;
0297
0298 rc = bnxt_vf_ndo_prep(bp, vf_id);
0299 if (rc)
0300 return rc;
0301
0302 vf = &bp->pf.vf[vf_id];
0303 pf_link_speed = bnxt_fw_to_ethtool_speed(bp->link_info.link_speed);
0304 if (max_tx_rate > pf_link_speed) {
0305 netdev_info(bp->dev, "max tx rate %d exceed PF link speed for VF %d\n",
0306 max_tx_rate, vf_id);
0307 return -EINVAL;
0308 }
0309
0310 if (min_tx_rate > pf_link_speed) {
0311 netdev_info(bp->dev, "min tx rate %d is invalid for VF %d\n",
0312 min_tx_rate, vf_id);
0313 return -EINVAL;
0314 }
0315 if (min_tx_rate == vf->min_tx_rate && max_tx_rate == vf->max_tx_rate)
0316 return 0;
0317 rc = hwrm_req_init(bp, req, HWRM_FUNC_CFG);
0318 if (!rc) {
0319 req->fid = cpu_to_le16(vf->fw_fid);
0320 req->enables = cpu_to_le32(FUNC_CFG_REQ_ENABLES_MAX_BW |
0321 FUNC_CFG_REQ_ENABLES_MIN_BW);
0322 req->max_bw = cpu_to_le32(max_tx_rate);
0323 req->min_bw = cpu_to_le32(min_tx_rate);
0324 rc = hwrm_req_send(bp, req);
0325 if (!rc) {
0326 vf->min_tx_rate = min_tx_rate;
0327 vf->max_tx_rate = max_tx_rate;
0328 }
0329 }
0330 return rc;
0331 }
0332
0333 int bnxt_set_vf_link_state(struct net_device *dev, int vf_id, int link)
0334 {
0335 struct bnxt *bp = netdev_priv(dev);
0336 struct bnxt_vf_info *vf;
0337 int rc;
0338
0339 rc = bnxt_vf_ndo_prep(bp, vf_id);
0340 if (rc)
0341 return rc;
0342
0343 vf = &bp->pf.vf[vf_id];
0344
0345 vf->flags &= ~(BNXT_VF_LINK_UP | BNXT_VF_LINK_FORCED);
0346 switch (link) {
0347 case IFLA_VF_LINK_STATE_AUTO:
0348 vf->flags |= BNXT_VF_LINK_UP;
0349 break;
0350 case IFLA_VF_LINK_STATE_DISABLE:
0351 vf->flags |= BNXT_VF_LINK_FORCED;
0352 break;
0353 case IFLA_VF_LINK_STATE_ENABLE:
0354 vf->flags |= BNXT_VF_LINK_UP | BNXT_VF_LINK_FORCED;
0355 break;
0356 default:
0357 netdev_err(bp->dev, "Invalid link option\n");
0358 rc = -EINVAL;
0359 break;
0360 }
0361 if (vf->flags & (BNXT_VF_LINK_UP | BNXT_VF_LINK_FORCED))
0362 rc = bnxt_hwrm_fwd_async_event_cmpl(bp, vf,
0363 ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE);
0364 return rc;
0365 }
0366
0367 static int bnxt_set_vf_attr(struct bnxt *bp, int num_vfs)
0368 {
0369 int i;
0370 struct bnxt_vf_info *vf;
0371
0372 for (i = 0; i < num_vfs; i++) {
0373 vf = &bp->pf.vf[i];
0374 memset(vf, 0, sizeof(*vf));
0375 }
0376 return 0;
0377 }
0378
0379 static int bnxt_hwrm_func_vf_resource_free(struct bnxt *bp, int num_vfs)
0380 {
0381 struct hwrm_func_vf_resc_free_input *req;
0382 struct bnxt_pf_info *pf = &bp->pf;
0383 int i, rc;
0384
0385 rc = hwrm_req_init(bp, req, HWRM_FUNC_VF_RESC_FREE);
0386 if (rc)
0387 return rc;
0388
0389 hwrm_req_hold(bp, req);
0390 for (i = pf->first_vf_id; i < pf->first_vf_id + num_vfs; i++) {
0391 req->vf_id = cpu_to_le16(i);
0392 rc = hwrm_req_send(bp, req);
0393 if (rc)
0394 break;
0395 }
0396 hwrm_req_drop(bp, req);
0397 return rc;
0398 }
0399
0400 static void bnxt_free_vf_resources(struct bnxt *bp)
0401 {
0402 struct pci_dev *pdev = bp->pdev;
0403 int i;
0404
0405 kfree(bp->pf.vf_event_bmap);
0406 bp->pf.vf_event_bmap = NULL;
0407
0408 for (i = 0; i < 4; i++) {
0409 if (bp->pf.hwrm_cmd_req_addr[i]) {
0410 dma_free_coherent(&pdev->dev, BNXT_PAGE_SIZE,
0411 bp->pf.hwrm_cmd_req_addr[i],
0412 bp->pf.hwrm_cmd_req_dma_addr[i]);
0413 bp->pf.hwrm_cmd_req_addr[i] = NULL;
0414 }
0415 }
0416
0417 bp->pf.active_vfs = 0;
0418 kfree(bp->pf.vf);
0419 bp->pf.vf = NULL;
0420 }
0421
0422 static int bnxt_alloc_vf_resources(struct bnxt *bp, int num_vfs)
0423 {
0424 struct pci_dev *pdev = bp->pdev;
0425 u32 nr_pages, size, i, j, k = 0;
0426
0427 bp->pf.vf = kcalloc(num_vfs, sizeof(struct bnxt_vf_info), GFP_KERNEL);
0428 if (!bp->pf.vf)
0429 return -ENOMEM;
0430
0431 bnxt_set_vf_attr(bp, num_vfs);
0432
0433 size = num_vfs * BNXT_HWRM_REQ_MAX_SIZE;
0434 nr_pages = size / BNXT_PAGE_SIZE;
0435 if (size & (BNXT_PAGE_SIZE - 1))
0436 nr_pages++;
0437
0438 for (i = 0; i < nr_pages; i++) {
0439 bp->pf.hwrm_cmd_req_addr[i] =
0440 dma_alloc_coherent(&pdev->dev, BNXT_PAGE_SIZE,
0441 &bp->pf.hwrm_cmd_req_dma_addr[i],
0442 GFP_KERNEL);
0443
0444 if (!bp->pf.hwrm_cmd_req_addr[i])
0445 return -ENOMEM;
0446
0447 for (j = 0; j < BNXT_HWRM_REQS_PER_PAGE && k < num_vfs; j++) {
0448 struct bnxt_vf_info *vf = &bp->pf.vf[k];
0449
0450 vf->hwrm_cmd_req_addr = bp->pf.hwrm_cmd_req_addr[i] +
0451 j * BNXT_HWRM_REQ_MAX_SIZE;
0452 vf->hwrm_cmd_req_dma_addr =
0453 bp->pf.hwrm_cmd_req_dma_addr[i] + j *
0454 BNXT_HWRM_REQ_MAX_SIZE;
0455 k++;
0456 }
0457 }
0458
0459
0460 bp->pf.vf_event_bmap = kzalloc(16, GFP_KERNEL);
0461 if (!bp->pf.vf_event_bmap)
0462 return -ENOMEM;
0463
0464 bp->pf.hwrm_cmd_req_pages = nr_pages;
0465 return 0;
0466 }
0467
0468 static int bnxt_hwrm_func_buf_rgtr(struct bnxt *bp)
0469 {
0470 struct hwrm_func_buf_rgtr_input *req;
0471 int rc;
0472
0473 rc = hwrm_req_init(bp, req, HWRM_FUNC_BUF_RGTR);
0474 if (rc)
0475 return rc;
0476
0477 req->req_buf_num_pages = cpu_to_le16(bp->pf.hwrm_cmd_req_pages);
0478 req->req_buf_page_size = cpu_to_le16(BNXT_PAGE_SHIFT);
0479 req->req_buf_len = cpu_to_le16(BNXT_HWRM_REQ_MAX_SIZE);
0480 req->req_buf_page_addr0 = cpu_to_le64(bp->pf.hwrm_cmd_req_dma_addr[0]);
0481 req->req_buf_page_addr1 = cpu_to_le64(bp->pf.hwrm_cmd_req_dma_addr[1]);
0482 req->req_buf_page_addr2 = cpu_to_le64(bp->pf.hwrm_cmd_req_dma_addr[2]);
0483 req->req_buf_page_addr3 = cpu_to_le64(bp->pf.hwrm_cmd_req_dma_addr[3]);
0484
0485 return hwrm_req_send(bp, req);
0486 }
0487
0488 static int __bnxt_set_vf_params(struct bnxt *bp, int vf_id)
0489 {
0490 struct hwrm_func_cfg_input *req;
0491 struct bnxt_vf_info *vf;
0492 int rc;
0493
0494 rc = hwrm_req_init(bp, req, HWRM_FUNC_CFG);
0495 if (rc)
0496 return rc;
0497
0498 vf = &bp->pf.vf[vf_id];
0499 req->fid = cpu_to_le16(vf->fw_fid);
0500
0501 if (is_valid_ether_addr(vf->mac_addr)) {
0502 req->enables |= cpu_to_le32(FUNC_CFG_REQ_ENABLES_DFLT_MAC_ADDR);
0503 memcpy(req->dflt_mac_addr, vf->mac_addr, ETH_ALEN);
0504 }
0505 if (vf->vlan) {
0506 req->enables |= cpu_to_le32(FUNC_CFG_REQ_ENABLES_DFLT_VLAN);
0507 req->dflt_vlan = cpu_to_le16(vf->vlan);
0508 }
0509 if (vf->max_tx_rate) {
0510 req->enables |= cpu_to_le32(FUNC_CFG_REQ_ENABLES_MAX_BW |
0511 FUNC_CFG_REQ_ENABLES_MIN_BW);
0512 req->max_bw = cpu_to_le32(vf->max_tx_rate);
0513 req->min_bw = cpu_to_le32(vf->min_tx_rate);
0514 }
0515 if (vf->flags & BNXT_VF_TRUST)
0516 req->flags |= cpu_to_le32(FUNC_CFG_REQ_FLAGS_TRUSTED_VF_ENABLE);
0517
0518 return hwrm_req_send(bp, req);
0519 }
0520
0521
0522
0523
0524 static int bnxt_hwrm_func_vf_resc_cfg(struct bnxt *bp, int num_vfs, bool reset)
0525 {
0526 struct hwrm_func_vf_resource_cfg_input *req;
0527 struct bnxt_hw_resc *hw_resc = &bp->hw_resc;
0528 u16 vf_tx_rings, vf_rx_rings, vf_cp_rings;
0529 u16 vf_stat_ctx, vf_vnics, vf_ring_grps;
0530 struct bnxt_pf_info *pf = &bp->pf;
0531 int i, rc = 0, min = 1;
0532 u16 vf_msix = 0;
0533 u16 vf_rss;
0534
0535 rc = hwrm_req_init(bp, req, HWRM_FUNC_VF_RESOURCE_CFG);
0536 if (rc)
0537 return rc;
0538
0539 if (bp->flags & BNXT_FLAG_CHIP_P5) {
0540 vf_msix = hw_resc->max_nqs - bnxt_nq_rings_in_use(bp);
0541 vf_ring_grps = 0;
0542 } else {
0543 vf_ring_grps = hw_resc->max_hw_ring_grps - bp->rx_nr_rings;
0544 }
0545 vf_cp_rings = bnxt_get_avail_cp_rings_for_en(bp);
0546 vf_stat_ctx = bnxt_get_avail_stat_ctxs_for_en(bp);
0547 if (bp->flags & BNXT_FLAG_AGG_RINGS)
0548 vf_rx_rings = hw_resc->max_rx_rings - bp->rx_nr_rings * 2;
0549 else
0550 vf_rx_rings = hw_resc->max_rx_rings - bp->rx_nr_rings;
0551 vf_tx_rings = hw_resc->max_tx_rings - bp->tx_nr_rings;
0552 vf_vnics = hw_resc->max_vnics - bp->nr_vnics;
0553 vf_vnics = min_t(u16, vf_vnics, vf_rx_rings);
0554 vf_rss = hw_resc->max_rsscos_ctxs - bp->rsscos_nr_ctxs;
0555
0556 req->min_rsscos_ctx = cpu_to_le16(BNXT_VF_MIN_RSS_CTX);
0557 if (pf->vf_resv_strategy == BNXT_VF_RESV_STRATEGY_MINIMAL_STATIC) {
0558 min = 0;
0559 req->min_rsscos_ctx = cpu_to_le16(min);
0560 }
0561 if (pf->vf_resv_strategy == BNXT_VF_RESV_STRATEGY_MINIMAL ||
0562 pf->vf_resv_strategy == BNXT_VF_RESV_STRATEGY_MINIMAL_STATIC) {
0563 req->min_cmpl_rings = cpu_to_le16(min);
0564 req->min_tx_rings = cpu_to_le16(min);
0565 req->min_rx_rings = cpu_to_le16(min);
0566 req->min_l2_ctxs = cpu_to_le16(min);
0567 req->min_vnics = cpu_to_le16(min);
0568 req->min_stat_ctx = cpu_to_le16(min);
0569 if (!(bp->flags & BNXT_FLAG_CHIP_P5))
0570 req->min_hw_ring_grps = cpu_to_le16(min);
0571 } else {
0572 vf_cp_rings /= num_vfs;
0573 vf_tx_rings /= num_vfs;
0574 vf_rx_rings /= num_vfs;
0575 vf_vnics /= num_vfs;
0576 vf_stat_ctx /= num_vfs;
0577 vf_ring_grps /= num_vfs;
0578 vf_rss /= num_vfs;
0579
0580 req->min_cmpl_rings = cpu_to_le16(vf_cp_rings);
0581 req->min_tx_rings = cpu_to_le16(vf_tx_rings);
0582 req->min_rx_rings = cpu_to_le16(vf_rx_rings);
0583 req->min_l2_ctxs = cpu_to_le16(BNXT_VF_MAX_L2_CTX);
0584 req->min_vnics = cpu_to_le16(vf_vnics);
0585 req->min_stat_ctx = cpu_to_le16(vf_stat_ctx);
0586 req->min_hw_ring_grps = cpu_to_le16(vf_ring_grps);
0587 req->min_rsscos_ctx = cpu_to_le16(vf_rss);
0588 }
0589 req->max_cmpl_rings = cpu_to_le16(vf_cp_rings);
0590 req->max_tx_rings = cpu_to_le16(vf_tx_rings);
0591 req->max_rx_rings = cpu_to_le16(vf_rx_rings);
0592 req->max_l2_ctxs = cpu_to_le16(BNXT_VF_MAX_L2_CTX);
0593 req->max_vnics = cpu_to_le16(vf_vnics);
0594 req->max_stat_ctx = cpu_to_le16(vf_stat_ctx);
0595 req->max_hw_ring_grps = cpu_to_le16(vf_ring_grps);
0596 req->max_rsscos_ctx = cpu_to_le16(vf_rss);
0597 if (bp->flags & BNXT_FLAG_CHIP_P5)
0598 req->max_msix = cpu_to_le16(vf_msix / num_vfs);
0599
0600 hwrm_req_hold(bp, req);
0601 for (i = 0; i < num_vfs; i++) {
0602 if (reset)
0603 __bnxt_set_vf_params(bp, i);
0604
0605 req->vf_id = cpu_to_le16(pf->first_vf_id + i);
0606 rc = hwrm_req_send(bp, req);
0607 if (rc)
0608 break;
0609 pf->active_vfs = i + 1;
0610 pf->vf[i].fw_fid = pf->first_vf_id + i;
0611 }
0612
0613 if (pf->active_vfs) {
0614 u16 n = pf->active_vfs;
0615
0616 hw_resc->max_tx_rings -= le16_to_cpu(req->min_tx_rings) * n;
0617 hw_resc->max_rx_rings -= le16_to_cpu(req->min_rx_rings) * n;
0618 hw_resc->max_hw_ring_grps -=
0619 le16_to_cpu(req->min_hw_ring_grps) * n;
0620 hw_resc->max_cp_rings -= le16_to_cpu(req->min_cmpl_rings) * n;
0621 hw_resc->max_rsscos_ctxs -=
0622 le16_to_cpu(req->min_rsscos_ctx) * n;
0623 hw_resc->max_stat_ctxs -= le16_to_cpu(req->min_stat_ctx) * n;
0624 hw_resc->max_vnics -= le16_to_cpu(req->min_vnics) * n;
0625 if (bp->flags & BNXT_FLAG_CHIP_P5)
0626 hw_resc->max_nqs -= vf_msix;
0627
0628 rc = pf->active_vfs;
0629 }
0630 hwrm_req_drop(bp, req);
0631 return rc;
0632 }
0633
0634
0635
0636
0637 static int bnxt_hwrm_func_cfg(struct bnxt *bp, int num_vfs)
0638 {
0639 u16 vf_tx_rings, vf_rx_rings, vf_cp_rings, vf_stat_ctx, vf_vnics;
0640 struct bnxt_hw_resc *hw_resc = &bp->hw_resc;
0641 struct bnxt_pf_info *pf = &bp->pf;
0642 struct hwrm_func_cfg_input *req;
0643 int total_vf_tx_rings = 0;
0644 u16 vf_ring_grps;
0645 u32 mtu, i;
0646 int rc;
0647
0648 rc = hwrm_req_init(bp, req, HWRM_FUNC_CFG);
0649 if (rc)
0650 return rc;
0651
0652
0653 vf_cp_rings = bnxt_get_avail_cp_rings_for_en(bp) / num_vfs;
0654 vf_stat_ctx = bnxt_get_avail_stat_ctxs_for_en(bp) / num_vfs;
0655 if (bp->flags & BNXT_FLAG_AGG_RINGS)
0656 vf_rx_rings = (hw_resc->max_rx_rings - bp->rx_nr_rings * 2) /
0657 num_vfs;
0658 else
0659 vf_rx_rings = (hw_resc->max_rx_rings - bp->rx_nr_rings) /
0660 num_vfs;
0661 vf_ring_grps = (hw_resc->max_hw_ring_grps - bp->rx_nr_rings) / num_vfs;
0662 vf_tx_rings = (hw_resc->max_tx_rings - bp->tx_nr_rings) / num_vfs;
0663 vf_vnics = (hw_resc->max_vnics - bp->nr_vnics) / num_vfs;
0664 vf_vnics = min_t(u16, vf_vnics, vf_rx_rings);
0665
0666 req->enables = cpu_to_le32(FUNC_CFG_REQ_ENABLES_ADMIN_MTU |
0667 FUNC_CFG_REQ_ENABLES_MRU |
0668 FUNC_CFG_REQ_ENABLES_NUM_RSSCOS_CTXS |
0669 FUNC_CFG_REQ_ENABLES_NUM_STAT_CTXS |
0670 FUNC_CFG_REQ_ENABLES_NUM_CMPL_RINGS |
0671 FUNC_CFG_REQ_ENABLES_NUM_TX_RINGS |
0672 FUNC_CFG_REQ_ENABLES_NUM_RX_RINGS |
0673 FUNC_CFG_REQ_ENABLES_NUM_L2_CTXS |
0674 FUNC_CFG_REQ_ENABLES_NUM_VNICS |
0675 FUNC_CFG_REQ_ENABLES_NUM_HW_RING_GRPS);
0676
0677 mtu = bp->dev->mtu + ETH_HLEN + VLAN_HLEN;
0678 req->mru = cpu_to_le16(mtu);
0679 req->admin_mtu = cpu_to_le16(mtu);
0680
0681 req->num_rsscos_ctxs = cpu_to_le16(1);
0682 req->num_cmpl_rings = cpu_to_le16(vf_cp_rings);
0683 req->num_tx_rings = cpu_to_le16(vf_tx_rings);
0684 req->num_rx_rings = cpu_to_le16(vf_rx_rings);
0685 req->num_hw_ring_grps = cpu_to_le16(vf_ring_grps);
0686 req->num_l2_ctxs = cpu_to_le16(4);
0687
0688 req->num_vnics = cpu_to_le16(vf_vnics);
0689
0690 req->num_stat_ctxs = cpu_to_le16(vf_stat_ctx);
0691
0692 hwrm_req_hold(bp, req);
0693 for (i = 0; i < num_vfs; i++) {
0694 int vf_tx_rsvd = vf_tx_rings;
0695
0696 req->fid = cpu_to_le16(pf->first_vf_id + i);
0697 rc = hwrm_req_send(bp, req);
0698 if (rc)
0699 break;
0700 pf->active_vfs = i + 1;
0701 pf->vf[i].fw_fid = le16_to_cpu(req->fid);
0702 rc = __bnxt_hwrm_get_tx_rings(bp, pf->vf[i].fw_fid,
0703 &vf_tx_rsvd);
0704 if (rc)
0705 break;
0706 total_vf_tx_rings += vf_tx_rsvd;
0707 }
0708 hwrm_req_drop(bp, req);
0709 if (pf->active_vfs) {
0710 hw_resc->max_tx_rings -= total_vf_tx_rings;
0711 hw_resc->max_rx_rings -= vf_rx_rings * num_vfs;
0712 hw_resc->max_hw_ring_grps -= vf_ring_grps * num_vfs;
0713 hw_resc->max_cp_rings -= vf_cp_rings * num_vfs;
0714 hw_resc->max_rsscos_ctxs -= num_vfs;
0715 hw_resc->max_stat_ctxs -= vf_stat_ctx * num_vfs;
0716 hw_resc->max_vnics -= vf_vnics * num_vfs;
0717 rc = pf->active_vfs;
0718 }
0719 return rc;
0720 }
0721
0722 static int bnxt_func_cfg(struct bnxt *bp, int num_vfs, bool reset)
0723 {
0724 if (BNXT_NEW_RM(bp))
0725 return bnxt_hwrm_func_vf_resc_cfg(bp, num_vfs, reset);
0726 else
0727 return bnxt_hwrm_func_cfg(bp, num_vfs);
0728 }
0729
0730 int bnxt_cfg_hw_sriov(struct bnxt *bp, int *num_vfs, bool reset)
0731 {
0732 int rc;
0733
0734
0735 rc = bnxt_hwrm_func_buf_rgtr(bp);
0736 if (rc)
0737 return rc;
0738
0739
0740 rc = bnxt_func_cfg(bp, *num_vfs, reset);
0741 if (rc != *num_vfs) {
0742 if (rc <= 0) {
0743 netdev_warn(bp->dev, "Unable to reserve resources for SRIOV.\n");
0744 *num_vfs = 0;
0745 return rc;
0746 }
0747 netdev_warn(bp->dev, "Only able to reserve resources for %d VFs.\n",
0748 rc);
0749 *num_vfs = rc;
0750 }
0751
0752 bnxt_ulp_sriov_cfg(bp, *num_vfs);
0753 return 0;
0754 }
0755
0756 static int bnxt_sriov_enable(struct bnxt *bp, int *num_vfs)
0757 {
0758 int rc = 0, vfs_supported;
0759 int min_rx_rings, min_tx_rings, min_rss_ctxs;
0760 struct bnxt_hw_resc *hw_resc = &bp->hw_resc;
0761 int tx_ok = 0, rx_ok = 0, rss_ok = 0;
0762 int avail_cp, avail_stat;
0763
0764
0765
0766
0767
0768 vfs_supported = *num_vfs;
0769
0770 avail_cp = bnxt_get_avail_cp_rings_for_en(bp);
0771 avail_stat = bnxt_get_avail_stat_ctxs_for_en(bp);
0772 avail_cp = min_t(int, avail_cp, avail_stat);
0773
0774 while (vfs_supported) {
0775 min_rx_rings = vfs_supported;
0776 min_tx_rings = vfs_supported;
0777 min_rss_ctxs = vfs_supported;
0778
0779 if (bp->flags & BNXT_FLAG_AGG_RINGS) {
0780 if (hw_resc->max_rx_rings - bp->rx_nr_rings * 2 >=
0781 min_rx_rings)
0782 rx_ok = 1;
0783 } else {
0784 if (hw_resc->max_rx_rings - bp->rx_nr_rings >=
0785 min_rx_rings)
0786 rx_ok = 1;
0787 }
0788 if (hw_resc->max_vnics - bp->nr_vnics < min_rx_rings ||
0789 avail_cp < min_rx_rings)
0790 rx_ok = 0;
0791
0792 if (hw_resc->max_tx_rings - bp->tx_nr_rings >= min_tx_rings &&
0793 avail_cp >= min_tx_rings)
0794 tx_ok = 1;
0795
0796 if (hw_resc->max_rsscos_ctxs - bp->rsscos_nr_ctxs >=
0797 min_rss_ctxs)
0798 rss_ok = 1;
0799
0800 if (tx_ok && rx_ok && rss_ok)
0801 break;
0802
0803 vfs_supported--;
0804 }
0805
0806 if (!vfs_supported) {
0807 netdev_err(bp->dev, "Cannot enable VF's as all resources are used by PF\n");
0808 return -EINVAL;
0809 }
0810
0811 if (vfs_supported != *num_vfs) {
0812 netdev_info(bp->dev, "Requested VFs %d, can enable %d\n",
0813 *num_vfs, vfs_supported);
0814 *num_vfs = vfs_supported;
0815 }
0816
0817 rc = bnxt_alloc_vf_resources(bp, *num_vfs);
0818 if (rc)
0819 goto err_out1;
0820
0821 rc = bnxt_cfg_hw_sriov(bp, num_vfs, false);
0822 if (rc)
0823 goto err_out2;
0824
0825 rc = pci_enable_sriov(bp->pdev, *num_vfs);
0826 if (rc) {
0827 bnxt_ulp_sriov_cfg(bp, 0);
0828 goto err_out2;
0829 }
0830
0831 return 0;
0832
0833 err_out2:
0834
0835 bnxt_hwrm_func_vf_resource_free(bp, *num_vfs);
0836
0837
0838 bnxt_hwrm_func_qcaps(bp);
0839
0840 err_out1:
0841 bnxt_free_vf_resources(bp);
0842
0843 return rc;
0844 }
0845
0846 void bnxt_sriov_disable(struct bnxt *bp)
0847 {
0848 u16 num_vfs = pci_num_vf(bp->pdev);
0849
0850 if (!num_vfs)
0851 return;
0852
0853
0854 devl_lock(bp->dl);
0855 bnxt_vf_reps_destroy(bp);
0856
0857 if (pci_vfs_assigned(bp->pdev)) {
0858 bnxt_hwrm_fwd_async_event_cmpl(
0859 bp, NULL, ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_UNLOAD);
0860 netdev_warn(bp->dev, "Unable to free %d VFs because some are assigned to VMs.\n",
0861 num_vfs);
0862 } else {
0863 pci_disable_sriov(bp->pdev);
0864
0865 bnxt_hwrm_func_vf_resource_free(bp, num_vfs);
0866 }
0867 devl_unlock(bp->dl);
0868
0869 bnxt_free_vf_resources(bp);
0870
0871
0872 rtnl_lock();
0873 bnxt_restore_pf_fw_resources(bp);
0874 rtnl_unlock();
0875
0876 bnxt_ulp_sriov_cfg(bp, 0);
0877 }
0878
0879 int bnxt_sriov_configure(struct pci_dev *pdev, int num_vfs)
0880 {
0881 struct net_device *dev = pci_get_drvdata(pdev);
0882 struct bnxt *bp = netdev_priv(dev);
0883
0884 if (!(bp->flags & BNXT_FLAG_USING_MSIX)) {
0885 netdev_warn(dev, "Not allow SRIOV if the irq mode is not MSIX\n");
0886 return 0;
0887 }
0888
0889 rtnl_lock();
0890 if (!netif_running(dev)) {
0891 netdev_warn(dev, "Reject SRIOV config request since if is down!\n");
0892 rtnl_unlock();
0893 return 0;
0894 }
0895 if (test_bit(BNXT_STATE_IN_FW_RESET, &bp->state)) {
0896 netdev_warn(dev, "Reject SRIOV config request when FW reset is in progress\n");
0897 rtnl_unlock();
0898 return 0;
0899 }
0900 bp->sriov_cfg = true;
0901 rtnl_unlock();
0902
0903 if (pci_vfs_assigned(bp->pdev)) {
0904 netdev_warn(dev, "Unable to configure SRIOV since some VFs are assigned to VMs.\n");
0905 num_vfs = 0;
0906 goto sriov_cfg_exit;
0907 }
0908
0909
0910 if (num_vfs && num_vfs == bp->pf.active_vfs)
0911 goto sriov_cfg_exit;
0912
0913
0914 bnxt_sriov_disable(bp);
0915 if (!num_vfs)
0916 goto sriov_cfg_exit;
0917
0918 bnxt_sriov_enable(bp, &num_vfs);
0919
0920 sriov_cfg_exit:
0921 bp->sriov_cfg = false;
0922 wake_up(&bp->sriov_cfg_wait);
0923
0924 return num_vfs;
0925 }
0926
0927 static int bnxt_hwrm_fwd_resp(struct bnxt *bp, struct bnxt_vf_info *vf,
0928 void *encap_resp, __le64 encap_resp_addr,
0929 __le16 encap_resp_cpr, u32 msg_size)
0930 {
0931 struct hwrm_fwd_resp_input *req;
0932 int rc;
0933
0934 if (BNXT_FWD_RESP_SIZE_ERR(msg_size))
0935 return -EINVAL;
0936
0937 rc = hwrm_req_init(bp, req, HWRM_FWD_RESP);
0938 if (!rc) {
0939
0940 req->target_id = cpu_to_le16(vf->fw_fid);
0941 req->encap_resp_target_id = cpu_to_le16(vf->fw_fid);
0942 req->encap_resp_len = cpu_to_le16(msg_size);
0943 req->encap_resp_addr = encap_resp_addr;
0944 req->encap_resp_cmpl_ring = encap_resp_cpr;
0945 memcpy(req->encap_resp, encap_resp, msg_size);
0946
0947 rc = hwrm_req_send(bp, req);
0948 }
0949 if (rc)
0950 netdev_err(bp->dev, "hwrm_fwd_resp failed. rc:%d\n", rc);
0951 return rc;
0952 }
0953
0954 static int bnxt_hwrm_fwd_err_resp(struct bnxt *bp, struct bnxt_vf_info *vf,
0955 u32 msg_size)
0956 {
0957 struct hwrm_reject_fwd_resp_input *req;
0958 int rc;
0959
0960 if (BNXT_REJ_FWD_RESP_SIZE_ERR(msg_size))
0961 return -EINVAL;
0962
0963 rc = hwrm_req_init(bp, req, HWRM_REJECT_FWD_RESP);
0964 if (!rc) {
0965
0966 req->target_id = cpu_to_le16(vf->fw_fid);
0967 req->encap_resp_target_id = cpu_to_le16(vf->fw_fid);
0968 memcpy(req->encap_request, vf->hwrm_cmd_req_addr, msg_size);
0969
0970 rc = hwrm_req_send(bp, req);
0971 }
0972 if (rc)
0973 netdev_err(bp->dev, "hwrm_fwd_err_resp failed. rc:%d\n", rc);
0974 return rc;
0975 }
0976
0977 static int bnxt_hwrm_exec_fwd_resp(struct bnxt *bp, struct bnxt_vf_info *vf,
0978 u32 msg_size)
0979 {
0980 struct hwrm_exec_fwd_resp_input *req;
0981 int rc;
0982
0983 if (BNXT_EXEC_FWD_RESP_SIZE_ERR(msg_size))
0984 return -EINVAL;
0985
0986 rc = hwrm_req_init(bp, req, HWRM_EXEC_FWD_RESP);
0987 if (!rc) {
0988
0989 req->target_id = cpu_to_le16(vf->fw_fid);
0990 req->encap_resp_target_id = cpu_to_le16(vf->fw_fid);
0991 memcpy(req->encap_request, vf->hwrm_cmd_req_addr, msg_size);
0992
0993 rc = hwrm_req_send(bp, req);
0994 }
0995 if (rc)
0996 netdev_err(bp->dev, "hwrm_exec_fw_resp failed. rc:%d\n", rc);
0997 return rc;
0998 }
0999
1000 static int bnxt_vf_configure_mac(struct bnxt *bp, struct bnxt_vf_info *vf)
1001 {
1002 u32 msg_size = sizeof(struct hwrm_func_vf_cfg_input);
1003 struct hwrm_func_vf_cfg_input *req =
1004 (struct hwrm_func_vf_cfg_input *)vf->hwrm_cmd_req_addr;
1005
1006
1007
1008
1009 if (req->enables & cpu_to_le32(FUNC_VF_CFG_REQ_ENABLES_DFLT_MAC_ADDR)) {
1010 bool trust = bnxt_is_trusted_vf(bp, vf);
1011
1012 if (is_valid_ether_addr(req->dflt_mac_addr) &&
1013 (trust || !is_valid_ether_addr(vf->mac_addr) ||
1014 ether_addr_equal(req->dflt_mac_addr, vf->mac_addr))) {
1015 ether_addr_copy(vf->vf_mac_addr, req->dflt_mac_addr);
1016 return bnxt_hwrm_exec_fwd_resp(bp, vf, msg_size);
1017 }
1018 return bnxt_hwrm_fwd_err_resp(bp, vf, msg_size);
1019 }
1020 return bnxt_hwrm_exec_fwd_resp(bp, vf, msg_size);
1021 }
1022
1023 static int bnxt_vf_validate_set_mac(struct bnxt *bp, struct bnxt_vf_info *vf)
1024 {
1025 u32 msg_size = sizeof(struct hwrm_cfa_l2_filter_alloc_input);
1026 struct hwrm_cfa_l2_filter_alloc_input *req =
1027 (struct hwrm_cfa_l2_filter_alloc_input *)vf->hwrm_cmd_req_addr;
1028 bool mac_ok = false;
1029
1030 if (!is_valid_ether_addr((const u8 *)req->l2_addr))
1031 return bnxt_hwrm_fwd_err_resp(bp, vf, msg_size);
1032
1033
1034
1035
1036
1037
1038 if (bnxt_is_trusted_vf(bp, vf)) {
1039 mac_ok = true;
1040 } else if (is_valid_ether_addr(vf->mac_addr)) {
1041 if (ether_addr_equal((const u8 *)req->l2_addr, vf->mac_addr))
1042 mac_ok = true;
1043 } else if (is_valid_ether_addr(vf->vf_mac_addr)) {
1044 if (ether_addr_equal((const u8 *)req->l2_addr, vf->vf_mac_addr))
1045 mac_ok = true;
1046 } else {
1047
1048
1049
1050
1051
1052
1053 mac_ok = true;
1054 }
1055 if (mac_ok)
1056 return bnxt_hwrm_exec_fwd_resp(bp, vf, msg_size);
1057 return bnxt_hwrm_fwd_err_resp(bp, vf, msg_size);
1058 }
1059
1060 static int bnxt_vf_set_link(struct bnxt *bp, struct bnxt_vf_info *vf)
1061 {
1062 int rc = 0;
1063
1064 if (!(vf->flags & BNXT_VF_LINK_FORCED)) {
1065
1066 rc = bnxt_hwrm_exec_fwd_resp(
1067 bp, vf, sizeof(struct hwrm_port_phy_qcfg_input));
1068 } else {
1069 struct hwrm_port_phy_qcfg_output phy_qcfg_resp = {0};
1070 struct hwrm_port_phy_qcfg_input *phy_qcfg_req;
1071
1072 phy_qcfg_req =
1073 (struct hwrm_port_phy_qcfg_input *)vf->hwrm_cmd_req_addr;
1074 mutex_lock(&bp->link_lock);
1075 memcpy(&phy_qcfg_resp, &bp->link_info.phy_qcfg_resp,
1076 sizeof(phy_qcfg_resp));
1077 mutex_unlock(&bp->link_lock);
1078 phy_qcfg_resp.resp_len = cpu_to_le16(sizeof(phy_qcfg_resp));
1079 phy_qcfg_resp.seq_id = phy_qcfg_req->seq_id;
1080 phy_qcfg_resp.valid = 1;
1081
1082 if (vf->flags & BNXT_VF_LINK_UP) {
1083
1084 if (phy_qcfg_resp.link !=
1085 PORT_PHY_QCFG_RESP_LINK_LINK) {
1086 phy_qcfg_resp.link =
1087 PORT_PHY_QCFG_RESP_LINK_LINK;
1088 phy_qcfg_resp.link_speed = cpu_to_le16(
1089 PORT_PHY_QCFG_RESP_LINK_SPEED_10GB);
1090 phy_qcfg_resp.duplex_cfg =
1091 PORT_PHY_QCFG_RESP_DUPLEX_CFG_FULL;
1092 phy_qcfg_resp.duplex_state =
1093 PORT_PHY_QCFG_RESP_DUPLEX_STATE_FULL;
1094 phy_qcfg_resp.pause =
1095 (PORT_PHY_QCFG_RESP_PAUSE_TX |
1096 PORT_PHY_QCFG_RESP_PAUSE_RX);
1097 }
1098 } else {
1099
1100 phy_qcfg_resp.link = PORT_PHY_QCFG_RESP_LINK_NO_LINK;
1101 phy_qcfg_resp.link_speed = 0;
1102 phy_qcfg_resp.duplex_state =
1103 PORT_PHY_QCFG_RESP_DUPLEX_STATE_HALF;
1104 phy_qcfg_resp.pause = 0;
1105 }
1106 rc = bnxt_hwrm_fwd_resp(bp, vf, &phy_qcfg_resp,
1107 phy_qcfg_req->resp_addr,
1108 phy_qcfg_req->cmpl_ring,
1109 sizeof(phy_qcfg_resp));
1110 }
1111 return rc;
1112 }
1113
1114 static int bnxt_vf_req_validate_snd(struct bnxt *bp, struct bnxt_vf_info *vf)
1115 {
1116 int rc = 0;
1117 struct input *encap_req = vf->hwrm_cmd_req_addr;
1118 u32 req_type = le16_to_cpu(encap_req->req_type);
1119
1120 switch (req_type) {
1121 case HWRM_FUNC_VF_CFG:
1122 rc = bnxt_vf_configure_mac(bp, vf);
1123 break;
1124 case HWRM_CFA_L2_FILTER_ALLOC:
1125 rc = bnxt_vf_validate_set_mac(bp, vf);
1126 break;
1127 case HWRM_FUNC_CFG:
1128
1129
1130
1131 rc = bnxt_hwrm_exec_fwd_resp(
1132 bp, vf, sizeof(struct hwrm_func_cfg_input));
1133 break;
1134 case HWRM_PORT_PHY_QCFG:
1135 rc = bnxt_vf_set_link(bp, vf);
1136 break;
1137 default:
1138 break;
1139 }
1140 return rc;
1141 }
1142
1143 void bnxt_hwrm_exec_fwd_req(struct bnxt *bp)
1144 {
1145 u32 i = 0, active_vfs = bp->pf.active_vfs, vf_id;
1146
1147
1148 while (1) {
1149 vf_id = find_next_bit(bp->pf.vf_event_bmap, active_vfs, i);
1150 if (vf_id >= active_vfs)
1151 break;
1152
1153 clear_bit(vf_id, bp->pf.vf_event_bmap);
1154 bnxt_vf_req_validate_snd(bp, &bp->pf.vf[vf_id]);
1155 i = vf_id + 1;
1156 }
1157 }
1158
1159 int bnxt_approve_mac(struct bnxt *bp, const u8 *mac, bool strict)
1160 {
1161 struct hwrm_func_vf_cfg_input *req;
1162 int rc = 0;
1163
1164 if (!BNXT_VF(bp))
1165 return 0;
1166
1167 if (bp->hwrm_spec_code < 0x10202) {
1168 if (is_valid_ether_addr(bp->vf.mac_addr))
1169 rc = -EADDRNOTAVAIL;
1170 goto mac_done;
1171 }
1172
1173 rc = hwrm_req_init(bp, req, HWRM_FUNC_VF_CFG);
1174 if (rc)
1175 goto mac_done;
1176
1177 req->enables = cpu_to_le32(FUNC_VF_CFG_REQ_ENABLES_DFLT_MAC_ADDR);
1178 memcpy(req->dflt_mac_addr, mac, ETH_ALEN);
1179 if (!strict)
1180 hwrm_req_flags(bp, req, BNXT_HWRM_CTX_SILENT);
1181 rc = hwrm_req_send(bp, req);
1182 mac_done:
1183 if (rc && strict) {
1184 rc = -EADDRNOTAVAIL;
1185 netdev_warn(bp->dev, "VF MAC address %pM not approved by the PF\n",
1186 mac);
1187 return rc;
1188 }
1189 return 0;
1190 }
1191
1192 void bnxt_update_vf_mac(struct bnxt *bp)
1193 {
1194 struct hwrm_func_qcaps_output *resp;
1195 struct hwrm_func_qcaps_input *req;
1196 bool inform_pf = false;
1197
1198 if (hwrm_req_init(bp, req, HWRM_FUNC_QCAPS))
1199 return;
1200
1201 req->fid = cpu_to_le16(0xffff);
1202
1203 resp = hwrm_req_hold(bp, req);
1204 if (hwrm_req_send(bp, req))
1205 goto update_vf_mac_exit;
1206
1207
1208
1209
1210
1211
1212
1213
1214 if (!ether_addr_equal(resp->mac_address, bp->vf.mac_addr)) {
1215 memcpy(bp->vf.mac_addr, resp->mac_address, ETH_ALEN);
1216
1217
1218
1219 if (!is_valid_ether_addr(bp->vf.mac_addr))
1220 inform_pf = true;
1221 }
1222
1223
1224 if (is_valid_ether_addr(bp->vf.mac_addr))
1225 eth_hw_addr_set(bp->dev, bp->vf.mac_addr);
1226 update_vf_mac_exit:
1227 hwrm_req_drop(bp, req);
1228 if (inform_pf)
1229 bnxt_approve_mac(bp, bp->dev->dev_addr, false);
1230 }
1231
1232 #else
1233
1234 int bnxt_cfg_hw_sriov(struct bnxt *bp, int *num_vfs, bool reset)
1235 {
1236 if (*num_vfs)
1237 return -EOPNOTSUPP;
1238 return 0;
1239 }
1240
1241 void bnxt_sriov_disable(struct bnxt *bp)
1242 {
1243 }
1244
1245 void bnxt_hwrm_exec_fwd_req(struct bnxt *bp)
1246 {
1247 netdev_err(bp->dev, "Invalid VF message received when SRIOV is not enable\n");
1248 }
1249
1250 void bnxt_update_vf_mac(struct bnxt *bp)
1251 {
1252 }
1253
1254 int bnxt_approve_mac(struct bnxt *bp, const u8 *mac, bool strict)
1255 {
1256 return 0;
1257 }
1258 #endif