broadcom/bnx2x/bnx2x_sriov.c

0001 /* bnx2x_sriov.c: QLogic Everest network driver.
0002  *
0003  * Copyright 2009-2013 Broadcom Corporation
0004  * Copyright 2014 QLogic Corporation
0005  * All rights reserved
0006  *
0007  * Unless you and QLogic execute a separate written software license
0008  * agreement governing use of this software, this software is licensed to you
0009  * under the terms of the GNU General Public License version 2, available
0010  * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
0011  *
0012  * Notwithstanding the above, under no circumstances may you combine this
0013  * software in any way with any other QLogic software provided under a
0014  * license other than the GPL, without QLogic's express prior written
0015  * consent.
0016  *
0017  * Maintained by: Ariel Elior <ariel.elior@qlogic.com>
0018  * Written by: Shmulik Ravid
0019  *         Ariel Elior <ariel.elior@qlogic.com>
0020  *
0021  */
0022 #include "bnx2x.h"
0023 #include "bnx2x_init.h"
0024 #include "bnx2x_cmn.h"
0025 #include "bnx2x_sp.h"
0026 #include <linux/crc32.h>
0027 #include <linux/if_vlan.h>
0028
0029 static int bnx2x_vf_op_prep(struct bnx2x *bp, int vfidx,
0030                 struct bnx2x_virtf **vf,
0031                 struct pf_vf_bulletin_content **bulletin,
0032                 bool test_queue);
0033
0034 /* General service functions */
0035 static void storm_memset_vf_to_pf(struct bnx2x *bp, u16 abs_fid,
0036                      u16 pf_id)
0037 {
0038     REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_VF_TO_PF_OFFSET(abs_fid),
0039         pf_id);
0040     REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_VF_TO_PF_OFFSET(abs_fid),
0041         pf_id);
0042     REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_VF_TO_PF_OFFSET(abs_fid),
0043         pf_id);
0044     REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_VF_TO_PF_OFFSET(abs_fid),
0045         pf_id);
0046 }
0047
0048 static void storm_memset_func_en(struct bnx2x *bp, u16 abs_fid,
0049                     u8 enable)
0050 {
0051     REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_FUNC_EN_OFFSET(abs_fid),
0052         enable);
0053     REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_FUNC_EN_OFFSET(abs_fid),
0054         enable);
0055     REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_FUNC_EN_OFFSET(abs_fid),
0056         enable);
0057     REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_FUNC_EN_OFFSET(abs_fid),
0058         enable);
0059 }
0060
0061 int bnx2x_vf_idx_by_abs_fid(struct bnx2x *bp, u16 abs_vfid)
0062 {
0063     int idx;
0064
0065     for_each_vf(bp, idx)
0066         if (bnx2x_vf(bp, idx, abs_vfid) == abs_vfid)
0067             break;
0068     return idx;
0069 }
0070
0071 static
0072 struct bnx2x_virtf *bnx2x_vf_by_abs_fid(struct bnx2x *bp, u16 abs_vfid)
0073 {
0074     u16 idx =  (u16)bnx2x_vf_idx_by_abs_fid(bp, abs_vfid);
0075     return (idx < BNX2X_NR_VIRTFN(bp)) ? BP_VF(bp, idx) : NULL;
0076 }
0077
0078 static void bnx2x_vf_igu_ack_sb(struct bnx2x *bp, struct bnx2x_virtf *vf,
0079                 u8 igu_sb_id, u8 segment, u16 index, u8 op,
0080                 u8 update)
0081 {
0082     /* acking a VF sb through the PF - use the GRC */
0083     u32 ctl;
0084     u32 igu_addr_data = IGU_REG_COMMAND_REG_32LSB_DATA;
0085     u32 igu_addr_ctl = IGU_REG_COMMAND_REG_CTRL;
0086     u32 func_encode = vf->abs_vfid;
0087     u32 addr_encode = IGU_CMD_E2_PROD_UPD_BASE + igu_sb_id;
0088     struct igu_regular cmd_data = {0};
0089
0090     cmd_data.sb_id_and_flags =
0091             ((index << IGU_REGULAR_SB_INDEX_SHIFT) |
0092              (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) |
0093              (update << IGU_REGULAR_BUPDATE_SHIFT) |
0094              (op << IGU_REGULAR_ENABLE_INT_SHIFT));
0095
0096     ctl = addr_encode << IGU_CTRL_REG_ADDRESS_SHIFT     |
0097           func_encode << IGU_CTRL_REG_FID_SHIFT     |
0098           IGU_CTRL_CMD_TYPE_WR << IGU_CTRL_REG_TYPE_SHIFT;
0099
0100     DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",
0101        cmd_data.sb_id_and_flags, igu_addr_data);
0102     REG_WR(bp, igu_addr_data, cmd_data.sb_id_and_flags);
0103     barrier();
0104
0105     DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",
0106        ctl, igu_addr_ctl);
0107     REG_WR(bp, igu_addr_ctl, ctl);
0108     barrier();
0109 }
0110
0111 static bool bnx2x_validate_vf_sp_objs(struct bnx2x *bp,
0112                        struct bnx2x_virtf *vf,
0113                        bool print_err)
0114 {
0115     if (!bnx2x_leading_vfq(vf, sp_initialized)) {
0116         if (print_err)
0117             BNX2X_ERR("Slowpath objects not yet initialized!\n");
0118         else
0119             DP(BNX2X_MSG_IOV, "Slowpath objects not yet initialized!\n");
0120         return false;
0121     }
0122     return true;
0123 }
0124
0125 /* VFOP operations states */
0126 void bnx2x_vfop_qctor_dump_tx(struct bnx2x *bp, struct bnx2x_virtf *vf,
0127                   struct bnx2x_queue_init_params *init_params,
0128                   struct bnx2x_queue_setup_params *setup_params,
0129                   u16 q_idx, u16 sb_idx)
0130 {
0131     DP(BNX2X_MSG_IOV,
0132        "VF[%d] Q_SETUP: txq[%d]-- vfsb=%d, sb-index=%d, hc-rate=%d, flags=0x%lx, traffic-type=%d",
0133        vf->abs_vfid,
0134        q_idx,
0135        sb_idx,
0136        init_params->tx.sb_cq_index,
0137        init_params->tx.hc_rate,
0138        setup_params->flags,
0139        setup_params->txq_params.traffic_type);
0140 }
0141
0142 void bnx2x_vfop_qctor_dump_rx(struct bnx2x *bp, struct bnx2x_virtf *vf,
0143                 struct bnx2x_queue_init_params *init_params,
0144                 struct bnx2x_queue_setup_params *setup_params,
0145                 u16 q_idx, u16 sb_idx)
0146 {
0147     struct bnx2x_rxq_setup_params *rxq_params = &setup_params->rxq_params;
0148
0149     DP(BNX2X_MSG_IOV, "VF[%d] Q_SETUP: rxq[%d]-- vfsb=%d, sb-index=%d, hc-rate=%d, mtu=%d, buf-size=%d\n"
0150        "sge-size=%d, max_sge_pkt=%d, tpa-agg-size=%d, flags=0x%lx, drop-flags=0x%x, cache-log=%d\n",
0151        vf->abs_vfid,
0152        q_idx,
0153        sb_idx,
0154        init_params->rx.sb_cq_index,
0155        init_params->rx.hc_rate,
0156        setup_params->gen_params.mtu,
0157        rxq_params->buf_sz,
0158        rxq_params->sge_buf_sz,
0159        rxq_params->max_sges_pkt,
0160        rxq_params->tpa_agg_sz,
0161        setup_params->flags,
0162        rxq_params->drop_flags,
0163        rxq_params->cache_line_log);
0164 }
0165
0166 void bnx2x_vfop_qctor_prep(struct bnx2x *bp,
0167                struct bnx2x_virtf *vf,
0168                struct bnx2x_vf_queue *q,
0169                struct bnx2x_vf_queue_construct_params *p,
0170                unsigned long q_type)
0171 {
0172     struct bnx2x_queue_init_params *init_p = &p->qstate.params.init;
0173     struct bnx2x_queue_setup_params *setup_p = &p->prep_qsetup;
0174
0175     /* INIT */
0176
0177     /* Enable host coalescing in the transition to INIT state */
0178     if (test_bit(BNX2X_Q_FLG_HC, &init_p->rx.flags))
0179         __set_bit(BNX2X_Q_FLG_HC_EN, &init_p->rx.flags);
0180
0181     if (test_bit(BNX2X_Q_FLG_HC, &init_p->tx.flags))
0182         __set_bit(BNX2X_Q_FLG_HC_EN, &init_p->tx.flags);
0183
0184     /* FW SB ID */
0185     init_p->rx.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
0186     init_p->tx.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
0187
0188     /* context */
0189     init_p->cxts[0] = q->cxt;
0190
0191     /* SETUP */
0192
0193     /* Setup-op general parameters */
0194     setup_p->gen_params.spcl_id = vf->sp_cl_id;
0195     setup_p->gen_params.stat_id = vfq_stat_id(vf, q);
0196     setup_p->gen_params.fp_hsi = vf->fp_hsi;
0197
0198     /* Setup-op flags:
0199      * collect statistics, zero statistics, local-switching, security,
0200      * OV for Flex10, RSS and MCAST for leading
0201      */
0202     if (test_bit(BNX2X_Q_FLG_STATS, &setup_p->flags))
0203         __set_bit(BNX2X_Q_FLG_ZERO_STATS, &setup_p->flags);
0204
0205     /* for VFs, enable tx switching, bd coherency, and mac address
0206      * anti-spoofing
0207      */
0208     __set_bit(BNX2X_Q_FLG_TX_SWITCH, &setup_p->flags);
0209     __set_bit(BNX2X_Q_FLG_TX_SEC, &setup_p->flags);
0210     if (vf->spoofchk)
0211         __set_bit(BNX2X_Q_FLG_ANTI_SPOOF, &setup_p->flags);
0212     else
0213         __clear_bit(BNX2X_Q_FLG_ANTI_SPOOF, &setup_p->flags);
0214
0215     /* Setup-op rx parameters */
0216     if (test_bit(BNX2X_Q_TYPE_HAS_RX, &q_type)) {
0217         struct bnx2x_rxq_setup_params *rxq_p = &setup_p->rxq_params;
0218
0219         rxq_p->cl_qzone_id = vfq_qzone_id(vf, q);
0220         rxq_p->fw_sb_id = vf_igu_sb(vf, q->sb_idx);
0221         rxq_p->rss_engine_id = FW_VF_HANDLE(vf->abs_vfid);
0222
0223         if (test_bit(BNX2X_Q_FLG_TPA, &setup_p->flags))
0224             rxq_p->max_tpa_queues = BNX2X_VF_MAX_TPA_AGG_QUEUES;
0225     }
0226
0227     /* Setup-op tx parameters */
0228     if (test_bit(BNX2X_Q_TYPE_HAS_TX, &q_type)) {
0229         setup_p->txq_params.tss_leading_cl_id = vf->leading_rss;
0230         setup_p->txq_params.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
0231     }
0232 }
0233
0234 static int bnx2x_vf_queue_create(struct bnx2x *bp,
0235                  struct bnx2x_virtf *vf, int qid,
0236                  struct bnx2x_vf_queue_construct_params *qctor)
0237 {
0238     struct bnx2x_queue_state_params *q_params;
0239     int rc = 0;
0240
0241     DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);
0242
0243     /* Prepare ramrod information */
0244     q_params = &qctor->qstate;
0245     q_params->q_obj = &bnx2x_vfq(vf, qid, sp_obj);
0246     set_bit(RAMROD_COMP_WAIT, &q_params->ramrod_flags);
0247
0248     if (bnx2x_get_q_logical_state(bp, q_params->q_obj) ==
0249         BNX2X_Q_LOGICAL_STATE_ACTIVE) {
0250         DP(BNX2X_MSG_IOV, "queue was already up. Aborting gracefully\n");
0251         goto out;
0252     }
0253
0254     /* Run Queue 'construction' ramrods */
0255     q_params->cmd = BNX2X_Q_CMD_INIT;
0256     rc = bnx2x_queue_state_change(bp, q_params);
0257     if (rc)
0258         goto out;
0259
0260     memcpy(&q_params->params.setup, &qctor->prep_qsetup,
0261            sizeof(struct bnx2x_queue_setup_params));
0262     q_params->cmd = BNX2X_Q_CMD_SETUP;
0263     rc = bnx2x_queue_state_change(bp, q_params);
0264     if (rc)
0265         goto out;
0266
0267     /* enable interrupts */
0268     bnx2x_vf_igu_ack_sb(bp, vf, vf_igu_sb(vf, bnx2x_vfq(vf, qid, sb_idx)),
0269                 USTORM_ID, 0, IGU_INT_ENABLE, 0);
0270 out:
0271     return rc;
0272 }
0273
0274 static int bnx2x_vf_queue_destroy(struct bnx2x *bp, struct bnx2x_virtf *vf,
0275                   int qid)
0276 {
0277     enum bnx2x_queue_cmd cmds[] = {BNX2X_Q_CMD_HALT,
0278                        BNX2X_Q_CMD_TERMINATE,
0279                        BNX2X_Q_CMD_CFC_DEL};
0280     struct bnx2x_queue_state_params q_params;
0281     int rc, i;
0282
0283     DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
0284
0285     /* Prepare ramrod information */
0286     memset(&q_params, 0, sizeof(struct bnx2x_queue_state_params));
0287     q_params.q_obj = &bnx2x_vfq(vf, qid, sp_obj);
0288     set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
0289
0290     if (bnx2x_get_q_logical_state(bp, q_params.q_obj) ==
0291         BNX2X_Q_LOGICAL_STATE_STOPPED) {
0292         DP(BNX2X_MSG_IOV, "queue was already stopped. Aborting gracefully\n");
0293         goto out;
0294     }
0295
0296     /* Run Queue 'destruction' ramrods */
0297     for (i = 0; i < ARRAY_SIZE(cmds); i++) {
0298         q_params.cmd = cmds[i];
0299         rc = bnx2x_queue_state_change(bp, &q_params);
0300         if (rc) {
0301             BNX2X_ERR("Failed to run Queue command %d\n", cmds[i]);
0302             return rc;
0303         }
0304     }
0305 out:
0306     /* Clean Context */
0307     if (bnx2x_vfq(vf, qid, cxt)) {
0308         bnx2x_vfq(vf, qid, cxt)->ustorm_ag_context.cdu_usage = 0;
0309         bnx2x_vfq(vf, qid, cxt)->xstorm_ag_context.cdu_reserved = 0;
0310     }
0311
0312     return 0;
0313 }
0314
0315 static void
0316 bnx2x_vf_set_igu_info(struct bnx2x *bp, u8 igu_sb_id, u8 abs_vfid)
0317 {
0318     struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
0319     if (vf) {
0320         /* the first igu entry belonging to VFs of this PF */
0321         if (!BP_VFDB(bp)->first_vf_igu_entry)
0322             BP_VFDB(bp)->first_vf_igu_entry = igu_sb_id;
0323
0324         /* the first igu entry belonging to this VF */
0325         if (!vf_sb_count(vf))
0326             vf->igu_base_id = igu_sb_id;
0327
0328         ++vf_sb_count(vf);
0329         ++vf->sb_count;
0330     }
0331     BP_VFDB(bp)->vf_sbs_pool++;
0332 }
0333
0334 static int bnx2x_vf_vlan_mac_clear(struct bnx2x *bp, struct bnx2x_virtf *vf,
0335                    int qid, bool drv_only, int type)
0336 {
0337     struct bnx2x_vlan_mac_ramrod_params ramrod;
0338     int rc;
0339
0340     DP(BNX2X_MSG_IOV, "vf[%d] - deleting all %s\n", vf->abs_vfid,
0341               (type == BNX2X_VF_FILTER_VLAN_MAC) ? "VLAN-MACs" :
0342               (type == BNX2X_VF_FILTER_MAC) ? "MACs" : "VLANs");
0343
0344     /* Prepare ramrod params */
0345     memset(&ramrod, 0, sizeof(struct bnx2x_vlan_mac_ramrod_params));
0346     if (type == BNX2X_VF_FILTER_VLAN_MAC) {
0347         set_bit(BNX2X_ETH_MAC, &ramrod.user_req.vlan_mac_flags);
0348         ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_mac_obj);
0349     } else if (type == BNX2X_VF_FILTER_MAC) {
0350         set_bit(BNX2X_ETH_MAC, &ramrod.user_req.vlan_mac_flags);
0351         ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, mac_obj);
0352     } else {
0353         ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
0354     }
0355     ramrod.user_req.cmd = BNX2X_VLAN_MAC_DEL;
0356
0357     set_bit(RAMROD_EXEC, &ramrod.ramrod_flags);
0358     if (drv_only)
0359         set_bit(RAMROD_DRV_CLR_ONLY, &ramrod.ramrod_flags);
0360     else
0361         set_bit(RAMROD_COMP_WAIT, &ramrod.ramrod_flags);
0362
0363     /* Start deleting */
0364     rc = ramrod.vlan_mac_obj->delete_all(bp,
0365                          ramrod.vlan_mac_obj,
0366                          &ramrod.user_req.vlan_mac_flags,
0367                          &ramrod.ramrod_flags);
0368     if (rc) {
0369         BNX2X_ERR("Failed to delete all %s\n",
0370               (type == BNX2X_VF_FILTER_VLAN_MAC) ? "VLAN-MACs" :
0371               (type == BNX2X_VF_FILTER_MAC) ? "MACs" : "VLANs");
0372         return rc;
0373     }
0374
0375     return 0;
0376 }
0377
0378 static int bnx2x_vf_mac_vlan_config(struct bnx2x *bp,
0379                     struct bnx2x_virtf *vf, int qid,
0380                     struct bnx2x_vf_mac_vlan_filter *filter,
0381                     bool drv_only)
0382 {
0383     struct bnx2x_vlan_mac_ramrod_params ramrod;
0384     int rc;
0385
0386     DP(BNX2X_MSG_IOV, "vf[%d] - %s a %s filter\n",
0387        vf->abs_vfid, filter->add ? "Adding" : "Deleting",
0388        (filter->type == BNX2X_VF_FILTER_VLAN_MAC) ? "VLAN-MAC" :
0389        (filter->type == BNX2X_VF_FILTER_MAC) ? "MAC" : "VLAN");
0390
0391     /* Prepare ramrod params */
0392     memset(&ramrod, 0, sizeof(struct bnx2x_vlan_mac_ramrod_params));
0393     if (filter->type == BNX2X_VF_FILTER_VLAN_MAC) {
0394         ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_mac_obj);
0395         ramrod.user_req.u.vlan.vlan = filter->vid;
0396         memcpy(&ramrod.user_req.u.mac.mac, filter->mac, ETH_ALEN);
0397         set_bit(BNX2X_ETH_MAC, &ramrod.user_req.vlan_mac_flags);
0398     } else if (filter->type == BNX2X_VF_FILTER_VLAN) {
0399         ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
0400         ramrod.user_req.u.vlan.vlan = filter->vid;
0401     } else {
0402         set_bit(BNX2X_ETH_MAC, &ramrod.user_req.vlan_mac_flags);
0403         ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, mac_obj);
0404         memcpy(&ramrod.user_req.u.mac.mac, filter->mac, ETH_ALEN);
0405     }
0406     ramrod.user_req.cmd = filter->add ? BNX2X_VLAN_MAC_ADD :
0407                         BNX2X_VLAN_MAC_DEL;
0408
0409     set_bit(RAMROD_EXEC, &ramrod.ramrod_flags);
0410     if (drv_only)
0411         set_bit(RAMROD_DRV_CLR_ONLY, &ramrod.ramrod_flags);
0412     else
0413         set_bit(RAMROD_COMP_WAIT, &ramrod.ramrod_flags);
0414
0415     /* Add/Remove the filter */
0416     rc = bnx2x_config_vlan_mac(bp, &ramrod);
0417     if (rc == -EEXIST)
0418         return 0;
0419     if (rc) {
0420         BNX2X_ERR("Failed to %s %s\n",
0421               filter->add ? "add" : "delete",
0422               (filter->type == BNX2X_VF_FILTER_VLAN_MAC) ?
0423                 "VLAN-MAC" :
0424               (filter->type == BNX2X_VF_FILTER_MAC) ?
0425                 "MAC" : "VLAN");
0426         return rc;
0427     }
0428
0429     filter->applied = true;
0430
0431     return 0;
0432 }
0433
0434 int bnx2x_vf_mac_vlan_config_list(struct bnx2x *bp, struct bnx2x_virtf *vf,
0435                   struct bnx2x_vf_mac_vlan_filters *filters,
0436                   int qid, bool drv_only)
0437 {
0438     int rc = 0, i;
0439
0440     DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
0441
0442     if (!bnx2x_validate_vf_sp_objs(bp, vf, true))
0443         return -EINVAL;
0444
0445     /* Prepare ramrod params */
0446     for (i = 0; i < filters->count; i++) {
0447         rc = bnx2x_vf_mac_vlan_config(bp, vf, qid,
0448                           &filters->filters[i], drv_only);
0449         if (rc)
0450             break;
0451     }
0452
0453     /* Rollback if needed */
0454     if (i != filters->count) {
0455         BNX2X_ERR("Managed only %d/%d filters - rolling back\n",
0456               i, filters->count);
0457         while (--i >= 0) {
0458             if (!filters->filters[i].applied)
0459                 continue;
0460             filters->filters[i].add = !filters->filters[i].add;
0461             bnx2x_vf_mac_vlan_config(bp, vf, qid,
0462                          &filters->filters[i],
0463                          drv_only);
0464         }
0465     }
0466
0467     /* It's our responsibility to free the filters */
0468     kfree(filters);
0469
0470     return rc;
0471 }
0472
0473 int bnx2x_vf_queue_setup(struct bnx2x *bp, struct bnx2x_virtf *vf, int qid,
0474              struct bnx2x_vf_queue_construct_params *qctor)
0475 {
0476     int rc;
0477
0478     DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);
0479
0480     rc = bnx2x_vf_queue_create(bp, vf, qid, qctor);
0481     if (rc)
0482         goto op_err;
0483
0484     /* Schedule the configuration of any pending vlan filters */
0485     bnx2x_schedule_sp_rtnl(bp, BNX2X_SP_RTNL_HYPERVISOR_VLAN,
0486                    BNX2X_MSG_IOV);
0487     return 0;
0488 op_err:
0489     BNX2X_ERR("QSETUP[%d:%d] error: rc %d\n", vf->abs_vfid, qid, rc);
0490     return rc;
0491 }
0492
0493 static int bnx2x_vf_queue_flr(struct bnx2x *bp, struct bnx2x_virtf *vf,
0494                    int qid)
0495 {
0496     int rc;
0497
0498     DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);
0499
0500     /* If needed, clean the filtering data base */
0501     if ((qid == LEADING_IDX) &&
0502         bnx2x_validate_vf_sp_objs(bp, vf, false)) {
0503         rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid, true,
0504                          BNX2X_VF_FILTER_VLAN_MAC);
0505         if (rc)
0506             goto op_err;
0507         rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid, true,
0508                          BNX2X_VF_FILTER_VLAN);
0509         if (rc)
0510             goto op_err;
0511         rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid, true,
0512                          BNX2X_VF_FILTER_MAC);
0513         if (rc)
0514             goto op_err;
0515     }
0516
0517     /* Terminate queue */
0518     if (bnx2x_vfq(vf, qid, sp_obj).state != BNX2X_Q_STATE_RESET) {
0519         struct bnx2x_queue_state_params qstate;
0520
0521         memset(&qstate, 0, sizeof(struct bnx2x_queue_state_params));
0522         qstate.q_obj = &bnx2x_vfq(vf, qid, sp_obj);
0523         qstate.q_obj->state = BNX2X_Q_STATE_STOPPED;
0524         qstate.cmd = BNX2X_Q_CMD_TERMINATE;
0525         set_bit(RAMROD_COMP_WAIT, &qstate.ramrod_flags);
0526         rc = bnx2x_queue_state_change(bp, &qstate);
0527         if (rc)
0528             goto op_err;
0529     }
0530
0531     return 0;
0532 op_err:
0533     BNX2X_ERR("vf[%d:%d] error: rc %d\n", vf->abs_vfid, qid, rc);
0534     return rc;
0535 }
0536
0537 int bnx2x_vf_mcast(struct bnx2x *bp, struct bnx2x_virtf *vf,
0538            bnx2x_mac_addr_t *mcasts, int mc_num, bool drv_only)
0539 {
0540     struct bnx2x_mcast_list_elem *mc = NULL;
0541     struct bnx2x_mcast_ramrod_params mcast;
0542     int rc, i;
0543
0544     DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
0545
0546     /* Prepare Multicast command */
0547     memset(&mcast, 0, sizeof(struct bnx2x_mcast_ramrod_params));
0548     mcast.mcast_obj = &vf->mcast_obj;
0549     if (drv_only)
0550         set_bit(RAMROD_DRV_CLR_ONLY, &mcast.ramrod_flags);
0551     else
0552         set_bit(RAMROD_COMP_WAIT, &mcast.ramrod_flags);
0553     if (mc_num) {
0554         mc = kcalloc(mc_num, sizeof(struct bnx2x_mcast_list_elem),
0555                  GFP_KERNEL);
0556         if (!mc) {
0557             BNX2X_ERR("Cannot Configure multicasts due to lack of memory\n");
0558             return -ENOMEM;
0559         }
0560     }
0561
0562     if (mc_num) {
0563         INIT_LIST_HEAD(&mcast.mcast_list);
0564         for (i = 0; i < mc_num; i++) {
0565             mc[i].mac = mcasts[i];
0566             list_add_tail(&mc[i].link,
0567                       &mcast.mcast_list);
0568         }
0569
0570         /* add new mcasts */
0571         mcast.mcast_list_len = mc_num;
0572         rc = bnx2x_config_mcast(bp, &mcast, BNX2X_MCAST_CMD_SET);
0573         if (rc)
0574             BNX2X_ERR("Failed to set multicasts\n");
0575     } else {
0576         /* clear existing mcasts */
0577         rc = bnx2x_config_mcast(bp, &mcast, BNX2X_MCAST_CMD_DEL);
0578         if (rc)
0579             BNX2X_ERR("Failed to remove multicasts\n");
0580     }
0581
0582     kfree(mc);
0583
0584     return rc;
0585 }
0586
0587 static void bnx2x_vf_prep_rx_mode(struct bnx2x *bp, u8 qid,
0588                   struct bnx2x_rx_mode_ramrod_params *ramrod,
0589                   struct bnx2x_virtf *vf,
0590                   unsigned long accept_flags)
0591 {
0592     struct bnx2x_vf_queue *vfq = vfq_get(vf, qid);
0593
0594     memset(ramrod, 0, sizeof(*ramrod));
0595     ramrod->cid = vfq->cid;
0596     ramrod->cl_id = vfq_cl_id(vf, vfq);
0597     ramrod->rx_mode_obj = &bp->rx_mode_obj;
0598     ramrod->func_id = FW_VF_HANDLE(vf->abs_vfid);
0599     ramrod->rx_accept_flags = accept_flags;
0600     ramrod->tx_accept_flags = accept_flags;
0601     ramrod->pstate = &vf->filter_state;
0602     ramrod->state = BNX2X_FILTER_RX_MODE_PENDING;
0603
0604     set_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state);
0605     set_bit(RAMROD_RX, &ramrod->ramrod_flags);
0606     set_bit(RAMROD_TX, &ramrod->ramrod_flags);
0607
0608     ramrod->rdata = bnx2x_vf_sp(bp, vf, rx_mode_rdata.e2);
0609     ramrod->rdata_mapping = bnx2x_vf_sp_map(bp, vf, rx_mode_rdata.e2);
0610 }
0611
0612 int bnx2x_vf_rxmode(struct bnx2x *bp, struct bnx2x_virtf *vf,
0613             int qid, unsigned long accept_flags)
0614 {
0615     struct bnx2x_rx_mode_ramrod_params ramrod;
0616
0617     DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
0618
0619     bnx2x_vf_prep_rx_mode(bp, qid, &ramrod, vf, accept_flags);
0620     set_bit(RAMROD_COMP_WAIT, &ramrod.ramrod_flags);
0621     vfq_get(vf, qid)->accept_flags = ramrod.rx_accept_flags;
0622     return bnx2x_config_rx_mode(bp, &ramrod);
0623 }
0624
0625 int bnx2x_vf_queue_teardown(struct bnx2x *bp, struct bnx2x_virtf *vf, int qid)
0626 {
0627     int rc;
0628
0629     DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);
0630
0631     /* Remove all classification configuration for leading queue */
0632     if (qid == LEADING_IDX) {
0633         rc = bnx2x_vf_rxmode(bp, vf, qid, 0);
0634         if (rc)
0635             goto op_err;
0636
0637         /* Remove filtering if feasible */
0638         if (bnx2x_validate_vf_sp_objs(bp, vf, true)) {
0639             rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid,
0640                              false,
0641                              BNX2X_VF_FILTER_VLAN_MAC);
0642             if (rc)
0643                 goto op_err;
0644             rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid,
0645                              false,
0646                              BNX2X_VF_FILTER_VLAN);
0647             if (rc)
0648                 goto op_err;
0649             rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid,
0650                              false,
0651                              BNX2X_VF_FILTER_MAC);
0652             if (rc)
0653                 goto op_err;
0654             rc = bnx2x_vf_mcast(bp, vf, NULL, 0, false);
0655             if (rc)
0656                 goto op_err;
0657         }
0658     }
0659
0660     /* Destroy queue */
0661     rc = bnx2x_vf_queue_destroy(bp, vf, qid);
0662     if (rc)
0663         goto op_err;
0664     return rc;
0665 op_err:
0666     BNX2X_ERR("vf[%d:%d] error: rc %d\n",
0667           vf->abs_vfid, qid, rc);
0668     return rc;
0669 }
0670
0671 /* VF enable primitives
0672  * when pretend is required the caller is responsible
0673  * for calling pretend prior to calling these routines
0674  */
0675
0676 /* internal vf enable - until vf is enabled internally all transactions
0677  * are blocked. This routine should always be called last with pretend.
0678  */
0679 static void bnx2x_vf_enable_internal(struct bnx2x *bp, u8 enable)
0680 {
0681     REG_WR(bp, PGLUE_B_REG_INTERNAL_VFID_ENABLE, enable ? 1 : 0);
0682 }
0683
0684 /* clears vf error in all semi blocks */
0685 static void bnx2x_vf_semi_clear_err(struct bnx2x *bp, u8 abs_vfid)
0686 {
0687     REG_WR(bp, TSEM_REG_VFPF_ERR_NUM, abs_vfid);
0688     REG_WR(bp, USEM_REG_VFPF_ERR_NUM, abs_vfid);
0689     REG_WR(bp, CSEM_REG_VFPF_ERR_NUM, abs_vfid);
0690     REG_WR(bp, XSEM_REG_VFPF_ERR_NUM, abs_vfid);
0691 }
0692
0693 static void bnx2x_vf_pglue_clear_err(struct bnx2x *bp, u8 abs_vfid)
0694 {
0695     u32 was_err_group = (2 * BP_PATH(bp) + abs_vfid) >> 5;
0696     u32 was_err_reg = 0;
0697
0698     switch (was_err_group) {
0699     case 0:
0700         was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR;
0701         break;
0702     case 1:
0703         was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_63_32_CLR;
0704         break;
0705     case 2:
0706         was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_95_64_CLR;
0707         break;
0708     case 3:
0709         was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_127_96_CLR;
0710         break;
0711     }
0712     REG_WR(bp, was_err_reg, 1 << (abs_vfid & 0x1f));
0713 }
0714
0715 static void bnx2x_vf_igu_reset(struct bnx2x *bp, struct bnx2x_virtf *vf)
0716 {
0717     int i;
0718     u32 val;
0719
0720     /* Set VF masks and configuration - pretend */
0721     bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
0722
0723     REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_LSB, 0);
0724     REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_MSB, 0);
0725     REG_WR(bp, IGU_REG_SB_MASK_LSB, 0);
0726     REG_WR(bp, IGU_REG_SB_MASK_MSB, 0);
0727     REG_WR(bp, IGU_REG_PBA_STATUS_LSB, 0);
0728     REG_WR(bp, IGU_REG_PBA_STATUS_MSB, 0);
0729
0730     val = REG_RD(bp, IGU_REG_VF_CONFIGURATION);
0731     val |= (IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_MSI_MSIX_EN);
0732     val &= ~IGU_VF_CONF_PARENT_MASK;
0733     val |= (BP_ABS_FUNC(bp) >> 1) << IGU_VF_CONF_PARENT_SHIFT;
0734     REG_WR(bp, IGU_REG_VF_CONFIGURATION, val);
0735
0736     DP(BNX2X_MSG_IOV,
0737        "value in IGU_REG_VF_CONFIGURATION of vf %d after write is 0x%08x\n",
0738        vf->abs_vfid, val);
0739
0740     bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
0741
0742     /* iterate over all queues, clear sb consumer */
0743     for (i = 0; i < vf_sb_count(vf); i++) {
0744         u8 igu_sb_id = vf_igu_sb(vf, i);
0745
0746         /* zero prod memory */
0747         REG_WR(bp, IGU_REG_PROD_CONS_MEMORY + igu_sb_id * 4, 0);
0748
0749         /* clear sb state machine */
0750         bnx2x_igu_clear_sb_gen(bp, vf->abs_vfid, igu_sb_id,
0751                        false /* VF */);
0752
0753         /* disable + update */
0754         bnx2x_vf_igu_ack_sb(bp, vf, igu_sb_id, USTORM_ID, 0,
0755                     IGU_INT_DISABLE, 1);
0756     }
0757 }
0758
0759 void bnx2x_vf_enable_access(struct bnx2x *bp, u8 abs_vfid)
0760 {
0761     u16 abs_fid;
0762
0763     abs_fid = FW_VF_HANDLE(abs_vfid);
0764
0765     /* set the VF-PF association in the FW */
0766     storm_memset_vf_to_pf(bp, abs_fid, BP_FUNC(bp));
0767     storm_memset_func_en(bp, abs_fid, 1);
0768
0769     /* Invalidate fp_hsi version for vfs */
0770     if (bp->fw_cap & FW_CAP_INVALIDATE_VF_FP_HSI)
0771         REG_WR8(bp, BAR_XSTRORM_INTMEM +
0772                 XSTORM_ETH_FUNCTION_INFO_FP_HSI_VALID_E2_OFFSET(abs_fid), 0);
0773
0774     /* clear vf errors*/
0775     bnx2x_vf_semi_clear_err(bp, abs_vfid);
0776     bnx2x_vf_pglue_clear_err(bp, abs_vfid);
0777
0778     /* internal vf-enable - pretend */
0779     bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, abs_vfid));
0780     DP(BNX2X_MSG_IOV, "enabling internal access for vf %x\n", abs_vfid);
0781     bnx2x_vf_enable_internal(bp, true);
0782     bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
0783 }
0784
0785 static void bnx2x_vf_enable_traffic(struct bnx2x *bp, struct bnx2x_virtf *vf)
0786 {
0787     /* Reset vf in IGU  interrupts are still disabled */
0788     bnx2x_vf_igu_reset(bp, vf);
0789
0790     /* pretend to enable the vf with the PBF */
0791     bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
0792     REG_WR(bp, PBF_REG_DISABLE_VF, 0);
0793     bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
0794 }
0795
0796 static u8 bnx2x_vf_is_pcie_pending(struct bnx2x *bp, u8 abs_vfid)
0797 {
0798     struct pci_dev *dev;
0799     struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
0800
0801     if (!vf)
0802         return false;
0803
0804     dev = pci_get_domain_bus_and_slot(vf->domain, vf->bus, vf->devfn);
0805     if (dev)
0806         return bnx2x_is_pcie_pending(dev);
0807     return false;
0808 }
0809
0810 int bnx2x_vf_flr_clnup_epilog(struct bnx2x *bp, u8 abs_vfid)
0811 {
0812     /* Verify no pending pci transactions */
0813     if (bnx2x_vf_is_pcie_pending(bp, abs_vfid))
0814         BNX2X_ERR("PCIE Transactions still pending\n");
0815
0816     return 0;
0817 }
0818
0819 /* must be called after the number of PF queues and the number of VFs are
0820  * both known
0821  */
0822 static void
0823 bnx2x_iov_static_resc(struct bnx2x *bp, struct bnx2x_virtf *vf)
0824 {
0825     struct vf_pf_resc_request *resc = &vf->alloc_resc;
0826
0827     /* will be set only during VF-ACQUIRE */
0828     resc->num_rxqs = 0;
0829     resc->num_txqs = 0;
0830
0831     resc->num_mac_filters = VF_MAC_CREDIT_CNT;
0832     resc->num_vlan_filters = VF_VLAN_CREDIT_CNT;
0833
0834     /* no real limitation */
0835     resc->num_mc_filters = 0;
0836
0837     /* num_sbs already set */
0838     resc->num_sbs = vf->sb_count;
0839 }
0840
0841 /* FLR routines: */
0842 static void bnx2x_vf_free_resc(struct bnx2x *bp, struct bnx2x_virtf *vf)
0843 {
0844     /* reset the state variables */
0845     bnx2x_iov_static_resc(bp, vf);
0846     vf->state = VF_FREE;
0847 }
0848
0849 static void bnx2x_vf_flr_clnup_hw(struct bnx2x *bp, struct bnx2x_virtf *vf)
0850 {
0851     u32 poll_cnt = bnx2x_flr_clnup_poll_count(bp);
0852
0853     /* DQ usage counter */
0854     bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
0855     bnx2x_flr_clnup_poll_hw_counter(bp, DORQ_REG_VF_USAGE_CNT,
0856                     "DQ VF usage counter timed out",
0857                     poll_cnt);
0858     bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
0859
0860     /* FW cleanup command - poll for the results */
0861     if (bnx2x_send_final_clnup(bp, (u8)FW_VF_HANDLE(vf->abs_vfid),
0862                    poll_cnt))
0863         BNX2X_ERR("VF[%d] Final cleanup timed-out\n", vf->abs_vfid);
0864
0865     /* verify TX hw is flushed */
0866     bnx2x_tx_hw_flushed(bp, poll_cnt);
0867 }
0868
0869 static void bnx2x_vf_flr(struct bnx2x *bp, struct bnx2x_virtf *vf)
0870 {
0871     int rc, i;
0872
0873     DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
0874
0875     /* the cleanup operations are valid if and only if the VF
0876      * was first acquired.
0877      */
0878     for (i = 0; i < vf_rxq_count(vf); i++) {
0879         rc = bnx2x_vf_queue_flr(bp, vf, i);
0880         if (rc)
0881             goto out;
0882     }
0883
0884     /* remove multicasts */
0885     bnx2x_vf_mcast(bp, vf, NULL, 0, true);
0886
0887     /* dispatch final cleanup and wait for HW queues to flush */
0888     bnx2x_vf_flr_clnup_hw(bp, vf);
0889
0890     /* release VF resources */
0891     bnx2x_vf_free_resc(bp, vf);
0892
0893     vf->malicious = false;
0894
0895     /* re-open the mailbox */
0896     bnx2x_vf_enable_mbx(bp, vf->abs_vfid);
0897     return;
0898 out:
0899     BNX2X_ERR("vf[%d:%d] failed flr: rc %d\n",
0900           vf->abs_vfid, i, rc);
0901 }
0902
0903 static void bnx2x_vf_flr_clnup(struct bnx2x *bp)
0904 {
0905     struct bnx2x_virtf *vf;
0906     int i;
0907
0908     for (i = 0; i < BNX2X_NR_VIRTFN(bp); i++) {
0909         /* VF should be RESET & in FLR cleanup states */
0910         if (bnx2x_vf(bp, i, state) != VF_RESET ||
0911             !bnx2x_vf(bp, i, flr_clnup_stage))
0912             continue;
0913
0914         DP(BNX2X_MSG_IOV, "next vf to cleanup: %d. Num of vfs: %d\n",
0915            i, BNX2X_NR_VIRTFN(bp));
0916
0917         vf = BP_VF(bp, i);
0918
0919         /* lock the vf pf channel */
0920         bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_FLR);
0921
0922         /* invoke the VF FLR SM */
0923         bnx2x_vf_flr(bp, vf);
0924
0925         /* mark the VF to be ACKED and continue */
0926         vf->flr_clnup_stage = false;
0927         bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_FLR);
0928     }
0929
0930     /* Acknowledge the handled VFs.
0931      * we are acknowledge all the vfs which an flr was requested for, even
0932      * if amongst them there are such that we never opened, since the mcp
0933      * will interrupt us immediately again if we only ack some of the bits,
0934      * resulting in an endless loop. This can happen for example in KVM
0935      * where an 'all ones' flr request is sometimes given by hyper visor
0936      */
0937     DP(BNX2X_MSG_MCP, "DRV_STATUS_VF_DISABLED ACK for vfs 0x%x 0x%x\n",
0938        bp->vfdb->flrd_vfs[0], bp->vfdb->flrd_vfs[1]);
0939     for (i = 0; i < FLRD_VFS_DWORDS; i++)
0940         SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i],
0941               bp->vfdb->flrd_vfs[i]);
0942
0943     bnx2x_fw_command(bp, DRV_MSG_CODE_VF_DISABLED_DONE, 0);
0944
0945     /* clear the acked bits - better yet if the MCP implemented
0946      * write to clear semantics
0947      */
0948     for (i = 0; i < FLRD_VFS_DWORDS; i++)
0949         SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i], 0);
0950 }
0951
0952 void bnx2x_vf_handle_flr_event(struct bnx2x *bp)
0953 {
0954     int i;
0955
0956     /* Read FLR'd VFs */
0957     for (i = 0; i < FLRD_VFS_DWORDS; i++)
0958         bp->vfdb->flrd_vfs[i] = SHMEM2_RD(bp, mcp_vf_disabled[i]);
0959
0960     DP(BNX2X_MSG_MCP,
0961        "DRV_STATUS_VF_DISABLED received for vfs 0x%x 0x%x\n",
0962        bp->vfdb->flrd_vfs[0], bp->vfdb->flrd_vfs[1]);
0963
0964     for_each_vf(bp, i) {
0965         struct bnx2x_virtf *vf = BP_VF(bp, i);
0966         u32 reset = 0;
0967
0968         if (vf->abs_vfid < 32)
0969             reset = bp->vfdb->flrd_vfs[0] & (1 << vf->abs_vfid);
0970         else
0971             reset = bp->vfdb->flrd_vfs[1] &
0972                 (1 << (vf->abs_vfid - 32));
0973
0974         if (reset) {
0975             /* set as reset and ready for cleanup */
0976             vf->state = VF_RESET;
0977             vf->flr_clnup_stage = true;
0978
0979             DP(BNX2X_MSG_IOV,
0980                "Initiating Final cleanup for VF %d\n",
0981                vf->abs_vfid);
0982         }
0983     }
0984
0985     /* do the FLR cleanup for all marked VFs*/
0986     bnx2x_vf_flr_clnup(bp);
0987 }
0988
0989 /* IOV global initialization routines  */
0990 void bnx2x_iov_init_dq(struct bnx2x *bp)
0991 {
0992     if (!IS_SRIOV(bp))
0993         return;
0994
0995     /* Set the DQ such that the CID reflect the abs_vfid */
0996     REG_WR(bp, DORQ_REG_VF_NORM_VF_BASE, 0);
0997     REG_WR(bp, DORQ_REG_MAX_RVFID_SIZE, ilog2(BNX2X_MAX_NUM_OF_VFS));
0998
0999     /* Set VFs starting CID. If its > 0 the preceding CIDs are belong to
1000      * the PF L2 queues
1001      */
1002     REG_WR(bp, DORQ_REG_VF_NORM_CID_BASE, BNX2X_FIRST_VF_CID);
1003
1004     /* The VF window size is the log2 of the max number of CIDs per VF */
1005     REG_WR(bp, DORQ_REG_VF_NORM_CID_WND_SIZE, BNX2X_VF_CID_WND);
1006
1007     /* The VF doorbell size  0 - *B, 4 - 128B. We set it here to match
1008      * the Pf doorbell size although the 2 are independent.
1009      */
1010     REG_WR(bp, DORQ_REG_VF_NORM_CID_OFST, 3);
1011
1012     /* No security checks for now -
1013      * configure single rule (out of 16) mask = 0x1, value = 0x0,
1014      * CID range 0 - 0x1ffff
1015      */
1016     REG_WR(bp, DORQ_REG_VF_TYPE_MASK_0, 1);
1017     REG_WR(bp, DORQ_REG_VF_TYPE_VALUE_0, 0);
1018     REG_WR(bp, DORQ_REG_VF_TYPE_MIN_MCID_0, 0);
1019     REG_WR(bp, DORQ_REG_VF_TYPE_MAX_MCID_0, 0x1ffff);
1020
1021     /* set the VF doorbell threshold. This threshold represents the amount
1022      * of doorbells allowed in the main DORQ fifo for a specific VF.
1023      */
1024     REG_WR(bp, DORQ_REG_VF_USAGE_CT_LIMIT, 64);
1025 }
1026
1027 void bnx2x_iov_init_dmae(struct bnx2x *bp)
1028 {
1029     if (pci_find_ext_capability(bp->pdev, PCI_EXT_CAP_ID_SRIOV))
1030         REG_WR(bp, DMAE_REG_BACKWARD_COMP_EN, 0);
1031 }
1032
1033 static int bnx2x_vf_domain(struct bnx2x *bp, int vfid)
1034 {
1035     struct pci_dev *dev = bp->pdev;
1036
1037     return pci_domain_nr(dev->bus);
1038 }
1039
1040 static int bnx2x_vf_bus(struct bnx2x *bp, int vfid)
1041 {
1042     struct pci_dev *dev = bp->pdev;
1043     struct bnx2x_sriov *iov = &bp->vfdb->sriov;
1044
1045     return dev->bus->number + ((dev->devfn + iov->offset +
1046                     iov->stride * vfid) >> 8);
1047 }
1048
1049 static int bnx2x_vf_devfn(struct bnx2x *bp, int vfid)
1050 {
1051     struct pci_dev *dev = bp->pdev;
1052     struct bnx2x_sriov *iov = &bp->vfdb->sriov;
1053
1054     return (dev->devfn + iov->offset + iov->stride * vfid) & 0xff;
1055 }
1056
1057 static void bnx2x_vf_set_bars(struct bnx2x *bp, struct bnx2x_virtf *vf)
1058 {
1059     int i, n;
1060     struct pci_dev *dev = bp->pdev;
1061     struct bnx2x_sriov *iov = &bp->vfdb->sriov;
1062
1063     for (i = 0, n = 0; i < PCI_SRIOV_NUM_BARS; i += 2, n++) {
1064         u64 start = pci_resource_start(dev, PCI_IOV_RESOURCES + i);
1065         u32 size = pci_resource_len(dev, PCI_IOV_RESOURCES + i);
1066
1067         size /= iov->total;
1068         vf->bars[n].bar = start + size * vf->abs_vfid;
1069         vf->bars[n].size = size;
1070     }
1071 }
1072
1073 static int
1074 bnx2x_get_vf_igu_cam_info(struct bnx2x *bp)
1075 {
1076     int sb_id;
1077     u32 val;
1078     u8 fid, current_pf = 0;
1079
1080     /* IGU in normal mode - read CAM */
1081     for (sb_id = 0; sb_id < IGU_REG_MAPPING_MEMORY_SIZE; sb_id++) {
1082         val = REG_RD(bp, IGU_REG_MAPPING_MEMORY + sb_id * 4);
1083         if (!(val & IGU_REG_MAPPING_MEMORY_VALID))
1084             continue;
1085         fid = GET_FIELD((val), IGU_REG_MAPPING_MEMORY_FID);
1086         if (fid & IGU_FID_ENCODE_IS_PF)
1087             current_pf = fid & IGU_FID_PF_NUM_MASK;
1088         else if (current_pf == BP_FUNC(bp))
1089             bnx2x_vf_set_igu_info(bp, sb_id,
1090                           (fid & IGU_FID_VF_NUM_MASK));
1091         DP(BNX2X_MSG_IOV, "%s[%d], igu_sb_id=%d, msix=%d\n",
1092            ((fid & IGU_FID_ENCODE_IS_PF) ? "PF" : "VF"),
1093            ((fid & IGU_FID_ENCODE_IS_PF) ? (fid & IGU_FID_PF_NUM_MASK) :
1094            (fid & IGU_FID_VF_NUM_MASK)), sb_id,
1095            GET_FIELD((val), IGU_REG_MAPPING_MEMORY_VECTOR));
1096     }
1097     DP(BNX2X_MSG_IOV, "vf_sbs_pool is %d\n", BP_VFDB(bp)->vf_sbs_pool);
1098     return BP_VFDB(bp)->vf_sbs_pool;
1099 }
1100
1101 static void __bnx2x_iov_free_vfdb(struct bnx2x *bp)
1102 {
1103     if (bp->vfdb) {
1104         kfree(bp->vfdb->vfqs);
1105         kfree(bp->vfdb->vfs);
1106         kfree(bp->vfdb);
1107     }
1108     bp->vfdb = NULL;
1109 }
1110
1111 static int bnx2x_sriov_pci_cfg_info(struct bnx2x *bp, struct bnx2x_sriov *iov)
1112 {
1113     int pos;
1114     struct pci_dev *dev = bp->pdev;
1115
1116     pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
1117     if (!pos) {
1118         BNX2X_ERR("failed to find SRIOV capability in device\n");
1119         return -ENODEV;
1120     }
1121
1122     iov->pos = pos;
1123     DP(BNX2X_MSG_IOV, "sriov ext pos %d\n", pos);
1124     pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &iov->ctrl);
1125     pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &iov->total);
1126     pci_read_config_word(dev, pos + PCI_SRIOV_INITIAL_VF, &iov->initial);
1127     pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
1128     pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
1129     pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz);
1130     pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
1131     pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
1132
1133     return 0;
1134 }
1135
1136 static int bnx2x_sriov_info(struct bnx2x *bp, struct bnx2x_sriov *iov)
1137 {
1138     u32 val;
1139
1140     /* read the SRIOV capability structure
1141      * The fields can be read via configuration read or
1142      * directly from the device (starting at offset PCICFG_OFFSET)
1143      */
1144     if (bnx2x_sriov_pci_cfg_info(bp, iov))
1145         return -ENODEV;
1146
1147     /* get the number of SRIOV bars */
1148     iov->nres = 0;
1149
1150     /* read the first_vfid */
1151     val = REG_RD(bp, PCICFG_OFFSET + GRC_CONFIG_REG_PF_INIT_VF);
1152     iov->first_vf_in_pf = ((val & GRC_CR_PF_INIT_VF_PF_FIRST_VF_NUM_MASK)
1153                    * 8) - (BNX2X_MAX_NUM_OF_VFS * BP_PATH(bp));
1154
1155     DP(BNX2X_MSG_IOV,
1156        "IOV info[%d]: first vf %d, nres %d, cap 0x%x, ctrl 0x%x, total %d, initial %d, num vfs %d, offset %d, stride %d, page size 0x%x\n",
1157        BP_FUNC(bp),
1158        iov->first_vf_in_pf, iov->nres, iov->cap, iov->ctrl, iov->total,
1159        iov->initial, iov->nr_virtfn, iov->offset, iov->stride, iov->pgsz);
1160
1161     return 0;
1162 }
1163
1164 /* must be called after PF bars are mapped */
1165 int bnx2x_iov_init_one(struct bnx2x *bp, int int_mode_param,
1166                int num_vfs_param)
1167 {
1168     int err, i;
1169     struct bnx2x_sriov *iov;
1170     struct pci_dev *dev = bp->pdev;
1171
1172     bp->vfdb = NULL;
1173
1174     /* verify is pf */
1175     if (IS_VF(bp))
1176         return 0;
1177
1178     /* verify sriov capability is present in configuration space */
1179     if (!pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV))
1180         return 0;
1181
1182     /* verify chip revision */
1183     if (CHIP_IS_E1x(bp))
1184         return 0;
1185
1186     /* check if SRIOV support is turned off */
1187     if (!num_vfs_param)
1188         return 0;
1189
1190     /* SRIOV assumes that num of PF CIDs < BNX2X_FIRST_VF_CID */
1191     if (BNX2X_L2_MAX_CID(bp) >= BNX2X_FIRST_VF_CID) {
1192         BNX2X_ERR("PF cids %d are overspilling into vf space (starts at %d). Abort SRIOV\n",
1193               BNX2X_L2_MAX_CID(bp), BNX2X_FIRST_VF_CID);
1194         return 0;
1195     }
1196
1197     /* SRIOV can be enabled only with MSIX */
1198     if (int_mode_param == BNX2X_INT_MODE_MSI ||
1199         int_mode_param == BNX2X_INT_MODE_INTX) {
1200         BNX2X_ERR("Forced MSI/INTx mode is incompatible with SRIOV\n");
1201         return 0;
1202     }
1203
1204     /* verify ari is enabled */
1205     if (!pci_ari_enabled(bp->pdev->bus)) {
1206         BNX2X_ERR("ARI not supported (check pci bridge ARI forwarding), SRIOV can not be enabled\n");
1207         return 0;
1208     }
1209
1210     /* verify igu is in normal mode */
1211     if (CHIP_INT_MODE_IS_BC(bp)) {
1212         BNX2X_ERR("IGU not normal mode,  SRIOV can not be enabled\n");
1213         return 0;
1214     }
1215
1216     /* allocate the vfs database */
1217     bp->vfdb = kzalloc(sizeof(*(bp->vfdb)), GFP_KERNEL);
1218     if (!bp->vfdb) {
1219         BNX2X_ERR("failed to allocate vf database\n");
1220         err = -ENOMEM;
1221         goto failed;
1222     }
1223
1224     /* get the sriov info - Linux already collected all the pertinent
1225      * information, however the sriov structure is for the private use
1226      * of the pci module. Also we want this information regardless
1227      * of the hyper-visor.
1228      */
1229     iov = &(bp->vfdb->sriov);
1230     err = bnx2x_sriov_info(bp, iov);
1231     if (err)
1232         goto failed;
1233
1234     /* SR-IOV capability was enabled but there are no VFs*/
1235     if (iov->total == 0) {
1236         err = 0;
1237         goto failed;
1238     }
1239
1240     iov->nr_virtfn = min_t(u16, iov->total, num_vfs_param);
1241
1242     DP(BNX2X_MSG_IOV, "num_vfs_param was %d, nr_virtfn was %d\n",
1243        num_vfs_param, iov->nr_virtfn);
1244
1245     /* allocate the vf array */
1246     bp->vfdb->vfs = kcalloc(BNX2X_NR_VIRTFN(bp),
1247                 sizeof(struct bnx2x_virtf),
1248                 GFP_KERNEL);
1249     if (!bp->vfdb->vfs) {
1250         BNX2X_ERR("failed to allocate vf array\n");
1251         err = -ENOMEM;
1252         goto failed;
1253     }
1254
1255     /* Initial VF init - index and abs_vfid - nr_virtfn must be set */
1256     for_each_vf(bp, i) {
1257         bnx2x_vf(bp, i, index) = i;
1258         bnx2x_vf(bp, i, abs_vfid) = iov->first_vf_in_pf + i;
1259         bnx2x_vf(bp, i, state) = VF_FREE;
1260         mutex_init(&bnx2x_vf(bp, i, op_mutex));
1261         bnx2x_vf(bp, i, op_current) = CHANNEL_TLV_NONE;
1262         /* enable spoofchk by default */
1263         bnx2x_vf(bp, i, spoofchk) = 1;
1264     }
1265
1266     /* re-read the IGU CAM for VFs - index and abs_vfid must be set */
1267     if (!bnx2x_get_vf_igu_cam_info(bp)) {
1268         BNX2X_ERR("No entries in IGU CAM for vfs\n");
1269         err = -EINVAL;
1270         goto failed;
1271     }
1272
1273     /* allocate the queue arrays for all VFs */
1274     bp->vfdb->vfqs = kcalloc(BNX2X_MAX_NUM_VF_QUEUES,
1275                  sizeof(struct bnx2x_vf_queue),
1276                  GFP_KERNEL);
1277
1278     if (!bp->vfdb->vfqs) {
1279         BNX2X_ERR("failed to allocate vf queue array\n");
1280         err = -ENOMEM;
1281         goto failed;
1282     }
1283
1284     /* Prepare the VFs event synchronization mechanism */
1285     mutex_init(&bp->vfdb->event_mutex);
1286
1287     mutex_init(&bp->vfdb->bulletin_mutex);
1288
1289     if (SHMEM2_HAS(bp, sriov_switch_mode))
1290         SHMEM2_WR(bp, sriov_switch_mode, SRIOV_SWITCH_MODE_VEB);
1291
1292     return 0;
1293 failed:
1294     DP(BNX2X_MSG_IOV, "Failed err=%d\n", err);
1295     __bnx2x_iov_free_vfdb(bp);
1296     return err;
1297 }
1298
1299 void bnx2x_iov_remove_one(struct bnx2x *bp)
1300 {
1301     int vf_idx;
1302
1303     /* if SRIOV is not enabled there's nothing to do */
1304     if (!IS_SRIOV(bp))
1305         return;
1306
1307     bnx2x_disable_sriov(bp);
1308
1309     /* disable access to all VFs */
1310     for (vf_idx = 0; vf_idx < bp->vfdb->sriov.total; vf_idx++) {
1311         bnx2x_pretend_func(bp,
1312                    HW_VF_HANDLE(bp,
1313                         bp->vfdb->sriov.first_vf_in_pf +
1314                         vf_idx));
1315         DP(BNX2X_MSG_IOV, "disabling internal access for vf %d\n",
1316            bp->vfdb->sriov.first_vf_in_pf + vf_idx);
1317         bnx2x_vf_enable_internal(bp, 0);
1318         bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
1319     }
1320
1321     /* free vf database */
1322     __bnx2x_iov_free_vfdb(bp);
1323 }
1324
1325 void bnx2x_iov_free_mem(struct bnx2x *bp)
1326 {
1327     int i;
1328
1329     if (!IS_SRIOV(bp))
1330         return;
1331
1332     /* free vfs hw contexts */
1333     for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
1334         struct hw_dma *cxt = &bp->vfdb->context[i];
1335         BNX2X_PCI_FREE(cxt->addr, cxt->mapping, cxt->size);
1336     }
1337
1338     BNX2X_PCI_FREE(BP_VFDB(bp)->sp_dma.addr,
1339                BP_VFDB(bp)->sp_dma.mapping,
1340                BP_VFDB(bp)->sp_dma.size);
1341
1342     BNX2X_PCI_FREE(BP_VF_MBX_DMA(bp)->addr,
1343                BP_VF_MBX_DMA(bp)->mapping,
1344                BP_VF_MBX_DMA(bp)->size);
1345
1346     BNX2X_PCI_FREE(BP_VF_BULLETIN_DMA(bp)->addr,
1347                BP_VF_BULLETIN_DMA(bp)->mapping,
1348                BP_VF_BULLETIN_DMA(bp)->size);
1349 }
1350
1351 int bnx2x_iov_alloc_mem(struct bnx2x *bp)
1352 {
1353     size_t tot_size;
1354     int i, rc = 0;
1355
1356     if (!IS_SRIOV(bp))
1357         return rc;
1358
1359     /* allocate vfs hw contexts */
1360     tot_size = (BP_VFDB(bp)->sriov.first_vf_in_pf + BNX2X_NR_VIRTFN(bp)) *
1361         BNX2X_CIDS_PER_VF * sizeof(union cdu_context);
1362
1363     for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
1364         struct hw_dma *cxt = BP_VF_CXT_PAGE(bp, i);
1365         cxt->size = min_t(size_t, tot_size, CDU_ILT_PAGE_SZ);
1366
1367         if (cxt->size) {
1368             cxt->addr = BNX2X_PCI_ALLOC(&cxt->mapping, cxt->size);
1369             if (!cxt->addr)
1370                 goto alloc_mem_err;
1371         } else {
1372             cxt->addr = NULL;
1373             cxt->mapping = 0;
1374         }
1375         tot_size -= cxt->size;
1376     }
1377
1378     /* allocate vfs ramrods dma memory - client_init and set_mac */
1379     tot_size = BNX2X_NR_VIRTFN(bp) * sizeof(struct bnx2x_vf_sp);
1380     BP_VFDB(bp)->sp_dma.addr = BNX2X_PCI_ALLOC(&BP_VFDB(bp)->sp_dma.mapping,
1381                            tot_size);
1382     if (!BP_VFDB(bp)->sp_dma.addr)
1383         goto alloc_mem_err;
1384     BP_VFDB(bp)->sp_dma.size = tot_size;
1385
1386     /* allocate mailboxes */
1387     tot_size = BNX2X_NR_VIRTFN(bp) * MBX_MSG_ALIGNED_SIZE;
1388     BP_VF_MBX_DMA(bp)->addr = BNX2X_PCI_ALLOC(&BP_VF_MBX_DMA(bp)->mapping,
1389                           tot_size);
1390     if (!BP_VF_MBX_DMA(bp)->addr)
1391         goto alloc_mem_err;
1392
1393     BP_VF_MBX_DMA(bp)->size = tot_size;
1394
1395     /* allocate local bulletin boards */
1396     tot_size = BNX2X_NR_VIRTFN(bp) * BULLETIN_CONTENT_SIZE;
1397     BP_VF_BULLETIN_DMA(bp)->addr = BNX2X_PCI_ALLOC(&BP_VF_BULLETIN_DMA(bp)->mapping,
1398                                tot_size);
1399     if (!BP_VF_BULLETIN_DMA(bp)->addr)
1400         goto alloc_mem_err;
1401
1402     BP_VF_BULLETIN_DMA(bp)->size = tot_size;
1403
1404     return 0;
1405
1406 alloc_mem_err:
1407     return -ENOMEM;
1408 }
1409
1410 static void bnx2x_vfq_init(struct bnx2x *bp, struct bnx2x_virtf *vf,
1411                struct bnx2x_vf_queue *q)
1412 {
1413     u8 cl_id = vfq_cl_id(vf, q);
1414     u8 func_id = FW_VF_HANDLE(vf->abs_vfid);
1415     unsigned long q_type = 0;
1416
1417     set_bit(BNX2X_Q_TYPE_HAS_TX, &q_type);
1418     set_bit(BNX2X_Q_TYPE_HAS_RX, &q_type);
1419
1420     /* Queue State object */
1421     bnx2x_init_queue_obj(bp, &q->sp_obj,
1422                  cl_id, &q->cid, 1, func_id,
1423                  bnx2x_vf_sp(bp, vf, q_data),
1424                  bnx2x_vf_sp_map(bp, vf, q_data),
1425                  q_type);
1426
1427     /* sp indication is set only when vlan/mac/etc. are initialized */
1428     q->sp_initialized = false;
1429
1430     DP(BNX2X_MSG_IOV,
1431        "initialized vf %d's queue object. func id set to %d. cid set to 0x%x\n",
1432        vf->abs_vfid, q->sp_obj.func_id, q->cid);
1433 }
1434
1435 static int bnx2x_max_speed_cap(struct bnx2x *bp)
1436 {
1437     u32 supported = bp->port.supported[bnx2x_get_link_cfg_idx(bp)];
1438
1439     if (supported &
1440         (SUPPORTED_20000baseMLD2_Full | SUPPORTED_20000baseKR2_Full))
1441         return 20000;
1442
1443     return 10000; /* assume lowest supported speed is 10G */
1444 }
1445
1446 int bnx2x_iov_link_update_vf(struct bnx2x *bp, int idx)
1447 {
1448     struct bnx2x_link_report_data *state = &bp->last_reported_link;
1449     struct pf_vf_bulletin_content *bulletin;
1450     struct bnx2x_virtf *vf;
1451     bool update = true;
1452     int rc = 0;
1453
1454     /* sanity and init */
1455     rc = bnx2x_vf_op_prep(bp, idx, &vf, &bulletin, false);
1456     if (rc)
1457         return rc;
1458
1459     mutex_lock(&bp->vfdb->bulletin_mutex);
1460
1461     if (vf->link_cfg == IFLA_VF_LINK_STATE_AUTO) {
1462         bulletin->valid_bitmap |= 1 << LINK_VALID;
1463
1464         bulletin->link_speed = state->line_speed;
1465         bulletin->link_flags = 0;
1466         if (test_bit(BNX2X_LINK_REPORT_LINK_DOWN,
1467                  &state->link_report_flags))
1468             bulletin->link_flags |= VFPF_LINK_REPORT_LINK_DOWN;
1469         if (test_bit(BNX2X_LINK_REPORT_FD,
1470                  &state->link_report_flags))
1471             bulletin->link_flags |= VFPF_LINK_REPORT_FULL_DUPLEX;
1472         if (test_bit(BNX2X_LINK_REPORT_RX_FC_ON,
1473                  &state->link_report_flags))
1474             bulletin->link_flags |= VFPF_LINK_REPORT_RX_FC_ON;
1475         if (test_bit(BNX2X_LINK_REPORT_TX_FC_ON,
1476                  &state->link_report_flags))
1477             bulletin->link_flags |= VFPF_LINK_REPORT_TX_FC_ON;
1478     } else if (vf->link_cfg == IFLA_VF_LINK_STATE_DISABLE &&
1479            !(bulletin->link_flags & VFPF_LINK_REPORT_LINK_DOWN)) {
1480         bulletin->valid_bitmap |= 1 << LINK_VALID;
1481         bulletin->link_flags |= VFPF_LINK_REPORT_LINK_DOWN;
1482     } else if (vf->link_cfg == IFLA_VF_LINK_STATE_ENABLE &&
1483            (bulletin->link_flags & VFPF_LINK_REPORT_LINK_DOWN)) {
1484         bulletin->valid_bitmap |= 1 << LINK_VALID;
1485         bulletin->link_speed = bnx2x_max_speed_cap(bp);
1486         bulletin->link_flags &= ~VFPF_LINK_REPORT_LINK_DOWN;
1487     } else {
1488         update = false;
1489     }
1490
1491     if (update) {
1492         DP(NETIF_MSG_LINK | BNX2X_MSG_IOV,
1493            "vf %d mode %u speed %d flags %x\n", idx,
1494            vf->link_cfg, bulletin->link_speed, bulletin->link_flags);
1495
1496         /* Post update on VF's bulletin board */
1497         rc = bnx2x_post_vf_bulletin(bp, idx);
1498         if (rc) {
1499             BNX2X_ERR("failed to update VF[%d] bulletin\n", idx);
1500             goto out;
1501         }
1502     }
1503
1504 out:
1505     mutex_unlock(&bp->vfdb->bulletin_mutex);
1506     return rc;
1507 }
1508
1509 int bnx2x_set_vf_link_state(struct net_device *dev, int idx, int link_state)
1510 {
1511     struct bnx2x *bp = netdev_priv(dev);
1512     struct bnx2x_virtf *vf = BP_VF(bp, idx);
1513
1514     if (!vf)
1515         return -EINVAL;
1516
1517     if (vf->link_cfg == link_state)
1518         return 0; /* nothing todo */
1519
1520     vf->link_cfg = link_state;
1521
1522     return bnx2x_iov_link_update_vf(bp, idx);
1523 }
1524
1525 void bnx2x_iov_link_update(struct bnx2x *bp)
1526 {
1527     int vfid;
1528
1529     if (!IS_SRIOV(bp))
1530         return;
1531
1532     for_each_vf(bp, vfid)
1533         bnx2x_iov_link_update_vf(bp, vfid);
1534 }
1535
1536 /* called by bnx2x_nic_load */
1537 int bnx2x_iov_nic_init(struct bnx2x *bp)
1538 {
1539     int vfid;
1540
1541     if (!IS_SRIOV(bp)) {
1542         DP(BNX2X_MSG_IOV, "vfdb was not allocated\n");
1543         return 0;
1544     }
1545
1546     DP(BNX2X_MSG_IOV, "num of vfs: %d\n", (bp)->vfdb->sriov.nr_virtfn);
1547
1548     /* let FLR complete ... */
1549     msleep(100);
1550
1551     /* initialize vf database */
1552     for_each_vf(bp, vfid) {
1553         struct bnx2x_virtf *vf = BP_VF(bp, vfid);
1554
1555         int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vfid) *
1556             BNX2X_CIDS_PER_VF;
1557
1558         union cdu_context *base_cxt = (union cdu_context *)
1559             BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr +
1560             (base_vf_cid & (ILT_PAGE_CIDS-1));
1561
1562         DP(BNX2X_MSG_IOV,
1563            "VF[%d] Max IGU SBs: %d, base vf cid 0x%x, base cid 0x%x, base cxt %p\n",
1564            vf->abs_vfid, vf_sb_count(vf), base_vf_cid,
1565            BNX2X_FIRST_VF_CID + base_vf_cid, base_cxt);
1566
1567         /* init statically provisioned resources */
1568         bnx2x_iov_static_resc(bp, vf);
1569
1570         /* queues are initialized during VF-ACQUIRE */
1571         vf->filter_state = 0;
1572         vf->sp_cl_id = bnx2x_fp(bp, 0, cl_id);
1573
1574         bnx2x_init_credit_pool(&vf->vf_vlans_pool, 0,
1575                        vf_vlan_rules_cnt(vf));
1576         bnx2x_init_credit_pool(&vf->vf_macs_pool, 0,
1577                        vf_mac_rules_cnt(vf));
1578
1579         /*  init mcast object - This object will be re-initialized
1580          *  during VF-ACQUIRE with the proper cl_id and cid.
1581          *  It needs to be initialized here so that it can be safely
1582          *  handled by a subsequent FLR flow.
1583          */
1584         bnx2x_init_mcast_obj(bp, &vf->mcast_obj, 0xFF,
1585                      0xFF, 0xFF, 0xFF,
1586                      bnx2x_vf_sp(bp, vf, mcast_rdata),
1587                      bnx2x_vf_sp_map(bp, vf, mcast_rdata),
1588                      BNX2X_FILTER_MCAST_PENDING,
1589                      &vf->filter_state,
1590                      BNX2X_OBJ_TYPE_RX_TX);
1591
1592         /* set the mailbox message addresses */
1593         BP_VF_MBX(bp, vfid)->msg = (struct bnx2x_vf_mbx_msg *)
1594             (((u8 *)BP_VF_MBX_DMA(bp)->addr) + vfid *
1595             MBX_MSG_ALIGNED_SIZE);
1596
1597         BP_VF_MBX(bp, vfid)->msg_mapping = BP_VF_MBX_DMA(bp)->mapping +
1598             vfid * MBX_MSG_ALIGNED_SIZE;
1599
1600         /* Enable vf mailbox */
1601         bnx2x_vf_enable_mbx(bp, vf->abs_vfid);
1602     }
1603
1604     /* Final VF init */
1605     for_each_vf(bp, vfid) {
1606         struct bnx2x_virtf *vf = BP_VF(bp, vfid);
1607
1608         /* fill in the BDF and bars */
1609         vf->domain = bnx2x_vf_domain(bp, vfid);
1610         vf->bus = bnx2x_vf_bus(bp, vfid);
1611         vf->devfn = bnx2x_vf_devfn(bp, vfid);
1612         bnx2x_vf_set_bars(bp, vf);
1613
1614         DP(BNX2X_MSG_IOV,
1615            "VF info[%d]: bus 0x%x, devfn 0x%x, bar0 [0x%x, %d], bar1 [0x%x, %d], bar2 [0x%x, %d]\n",
1616            vf->abs_vfid, vf->bus, vf->devfn,
1617            (unsigned)vf->bars[0].bar, vf->bars[0].size,
1618            (unsigned)vf->bars[1].bar, vf->bars[1].size,
1619            (unsigned)vf->bars[2].bar, vf->bars[2].size);
1620     }
1621
1622     return 0;
1623 }
1624
1625 /* called by bnx2x_chip_cleanup */
1626 int bnx2x_iov_chip_cleanup(struct bnx2x *bp)
1627 {
1628     int i;
1629
1630     if (!IS_SRIOV(bp))
1631         return 0;
1632
1633     /* release all the VFs */
1634     for_each_vf(bp, i)
1635         bnx2x_vf_release(bp, BP_VF(bp, i));
1636
1637     return 0;
1638 }
1639
1640 /* called by bnx2x_init_hw_func, returns the next ilt line */
1641 int bnx2x_iov_init_ilt(struct bnx2x *bp, u16 line)
1642 {
1643     int i;
1644     struct bnx2x_ilt *ilt = BP_ILT(bp);
1645
1646     if (!IS_SRIOV(bp))
1647         return line;
1648
1649     /* set vfs ilt lines */
1650     for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
1651         struct hw_dma *hw_cxt = BP_VF_CXT_PAGE(bp, i);
1652
1653         ilt->lines[line+i].page = hw_cxt->addr;
1654         ilt->lines[line+i].page_mapping = hw_cxt->mapping;
1655         ilt->lines[line+i].size = hw_cxt->size; /* doesn't matter */
1656     }
1657     return line + i;
1658 }
1659
1660 static u8 bnx2x_iov_is_vf_cid(struct bnx2x *bp, u16 cid)
1661 {
1662     return ((cid >= BNX2X_FIRST_VF_CID) &&
1663         ((cid - BNX2X_FIRST_VF_CID) < BNX2X_VF_CIDS));
1664 }
1665
1666 static
1667 void bnx2x_vf_handle_classification_eqe(struct bnx2x *bp,
1668                     struct bnx2x_vf_queue *vfq,
1669                     union event_ring_elem *elem)
1670 {
1671     unsigned long ramrod_flags = 0;
1672     int rc = 0;
1673     u32 echo = le32_to_cpu(elem->message.data.eth_event.echo);
1674
1675     /* Always push next commands out, don't wait here */
1676     set_bit(RAMROD_CONT, &ramrod_flags);
1677
1678     switch (echo >> BNX2X_SWCID_SHIFT) {
1679     case BNX2X_FILTER_MAC_PENDING:
1680         rc = vfq->mac_obj.complete(bp, &vfq->mac_obj, elem,
1681                        &ramrod_flags);
1682         break;
1683     case BNX2X_FILTER_VLAN_PENDING:
1684         rc = vfq->vlan_obj.complete(bp, &vfq->vlan_obj, elem,
1685                         &ramrod_flags);
1686         break;
1687     default:
1688         BNX2X_ERR("Unsupported classification command: 0x%x\n", echo);
1689         return;
1690     }
1691     if (rc < 0)
1692         BNX2X_ERR("Failed to schedule new commands: %d\n", rc);
1693     else if (rc > 0)
1694         DP(BNX2X_MSG_IOV, "Scheduled next pending commands...\n");
1695 }
1696
1697 static
1698 void bnx2x_vf_handle_mcast_eqe(struct bnx2x *bp,
1699                    struct bnx2x_virtf *vf)
1700 {
1701     struct bnx2x_mcast_ramrod_params rparam = {NULL};
1702     int rc;
1703
1704     rparam.mcast_obj = &vf->mcast_obj;
1705     vf->mcast_obj.raw.clear_pending(&vf->mcast_obj.raw);
1706
1707     /* If there are pending mcast commands - send them */
1708     if (vf->mcast_obj.check_pending(&vf->mcast_obj)) {
1709         rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_CONT);
1710         if (rc < 0)
1711             BNX2X_ERR("Failed to send pending mcast commands: %d\n",
1712                   rc);
1713     }
1714 }
1715
1716 static
1717 void bnx2x_vf_handle_filters_eqe(struct bnx2x *bp,
1718                  struct bnx2x_virtf *vf)
1719 {
1720     smp_mb__before_atomic();
1721     clear_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state);
1722     smp_mb__after_atomic();
1723 }
1724
1725 static void bnx2x_vf_handle_rss_update_eqe(struct bnx2x *bp,
1726                        struct bnx2x_virtf *vf)
1727 {
1728     vf->rss_conf_obj.raw.clear_pending(&vf->rss_conf_obj.raw);
1729 }
1730
1731 int bnx2x_iov_eq_sp_event(struct bnx2x *bp, union event_ring_elem *elem)
1732 {
1733     struct bnx2x_virtf *vf;
1734     int qidx = 0, abs_vfid;
1735     u8 opcode;
1736     u16 cid = 0xffff;
1737
1738     if (!IS_SRIOV(bp))
1739         return 1;
1740
1741     /* first get the cid - the only events we handle here are cfc-delete
1742      * and set-mac completion
1743      */
1744     opcode = elem->message.opcode;
1745
1746     switch (opcode) {
1747     case EVENT_RING_OPCODE_CFC_DEL:
1748         cid = SW_CID(elem->message.data.cfc_del_event.cid);
1749         DP(BNX2X_MSG_IOV, "checking cfc-del comp cid=%d\n", cid);
1750         break;
1751     case EVENT_RING_OPCODE_CLASSIFICATION_RULES:
1752     case EVENT_RING_OPCODE_MULTICAST_RULES:
1753     case EVENT_RING_OPCODE_FILTERS_RULES:
1754     case EVENT_RING_OPCODE_RSS_UPDATE_RULES:
1755         cid = SW_CID(elem->message.data.eth_event.echo);
1756         DP(BNX2X_MSG_IOV, "checking filtering comp cid=%d\n", cid);
1757         break;
1758     case EVENT_RING_OPCODE_VF_FLR:
1759         abs_vfid = elem->message.data.vf_flr_event.vf_id;
1760         DP(BNX2X_MSG_IOV, "Got VF FLR notification abs_vfid=%d\n",
1761            abs_vfid);
1762         goto get_vf;
1763     case EVENT_RING_OPCODE_MALICIOUS_VF:
1764         abs_vfid = elem->message.data.malicious_vf_event.vf_id;
1765         BNX2X_ERR("Got VF MALICIOUS notification abs_vfid=%d err_id=0x%x\n",
1766               abs_vfid,
1767               elem->message.data.malicious_vf_event.err_id);
1768         goto get_vf;
1769     default:
1770         return 1;
1771     }
1772
1773     /* check if the cid is the VF range */
1774     if (!bnx2x_iov_is_vf_cid(bp, cid)) {
1775         DP(BNX2X_MSG_IOV, "cid is outside vf range: %d\n", cid);
1776         return 1;
1777     }
1778
1779     /* extract vf and rxq index from vf_cid - relies on the following:
1780      * 1. vfid on cid reflects the true abs_vfid
1781      * 2. The max number of VFs (per path) is 64
1782      */
1783     qidx = cid & ((1 << BNX2X_VF_CID_WND)-1);
1784     abs_vfid = (cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1);
1785 get_vf:
1786     vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
1787
1788     if (!vf) {
1789         BNX2X_ERR("EQ completion for unknown VF, cid %d, abs_vfid %d\n",
1790               cid, abs_vfid);
1791         return 0;
1792     }
1793
1794     switch (opcode) {
1795     case EVENT_RING_OPCODE_CFC_DEL:
1796         DP(BNX2X_MSG_IOV, "got VF [%d:%d] cfc delete ramrod\n",
1797            vf->abs_vfid, qidx);
1798         vfq_get(vf, qidx)->sp_obj.complete_cmd(bp,
1799                                &vfq_get(vf,
1800                                 qidx)->sp_obj,
1801                                BNX2X_Q_CMD_CFC_DEL);
1802         break;
1803     case EVENT_RING_OPCODE_CLASSIFICATION_RULES:
1804         DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mac/vlan ramrod\n",
1805            vf->abs_vfid, qidx);
1806         bnx2x_vf_handle_classification_eqe(bp, vfq_get(vf, qidx), elem);
1807         break;
1808     case EVENT_RING_OPCODE_MULTICAST_RULES:
1809         DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mcast ramrod\n",
1810            vf->abs_vfid, qidx);
1811         bnx2x_vf_handle_mcast_eqe(bp, vf);
1812         break;
1813     case EVENT_RING_OPCODE_FILTERS_RULES:
1814         DP(BNX2X_MSG_IOV, "got VF [%d:%d] set rx-mode ramrod\n",
1815            vf->abs_vfid, qidx);
1816         bnx2x_vf_handle_filters_eqe(bp, vf);
1817         break;
1818     case EVENT_RING_OPCODE_RSS_UPDATE_RULES:
1819         DP(BNX2X_MSG_IOV, "got VF [%d:%d] RSS update ramrod\n",
1820            vf->abs_vfid, qidx);
1821         bnx2x_vf_handle_rss_update_eqe(bp, vf);
1822         fallthrough;
1823     case EVENT_RING_OPCODE_VF_FLR:
1824         /* Do nothing for now */
1825         return 0;
1826     case EVENT_RING_OPCODE_MALICIOUS_VF:
1827         vf->malicious = true;
1828         return 0;
1829     }
1830
1831     return 0;
1832 }
1833
1834 static struct bnx2x_virtf *bnx2x_vf_by_cid(struct bnx2x *bp, int vf_cid)
1835 {
1836     /* extract the vf from vf_cid - relies on the following:
1837      * 1. vfid on cid reflects the true abs_vfid
1838      * 2. The max number of VFs (per path) is 64
1839      */
1840     int abs_vfid = (vf_cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1);
1841     return bnx2x_vf_by_abs_fid(bp, abs_vfid);
1842 }
1843
1844 void bnx2x_iov_set_queue_sp_obj(struct bnx2x *bp, int vf_cid,
1845                 struct bnx2x_queue_sp_obj **q_obj)
1846 {
1847     struct bnx2x_virtf *vf;
1848
1849     if (!IS_SRIOV(bp))
1850         return;
1851
1852     vf = bnx2x_vf_by_cid(bp, vf_cid);
1853
1854     if (vf) {
1855         /* extract queue index from vf_cid - relies on the following:
1856          * 1. vfid on cid reflects the true abs_vfid
1857          * 2. The max number of VFs (per path) is 64
1858          */
1859         int q_index = vf_cid & ((1 << BNX2X_VF_CID_WND)-1);
1860         *q_obj = &bnx2x_vfq(vf, q_index, sp_obj);
1861     } else {
1862         BNX2X_ERR("No vf matching cid %d\n", vf_cid);
1863     }
1864 }
1865
1866 void bnx2x_iov_adjust_stats_req(struct bnx2x *bp)
1867 {
1868     int i;
1869     int first_queue_query_index, num_queues_req;
1870     struct stats_query_entry *cur_query_entry;
1871     u8 stats_count = 0;
1872     bool is_fcoe = false;
1873
1874     if (!IS_SRIOV(bp))
1875         return;
1876
1877     if (!NO_FCOE(bp))
1878         is_fcoe = true;
1879
1880     /* fcoe adds one global request and one queue request */
1881     num_queues_req = BNX2X_NUM_ETH_QUEUES(bp) + is_fcoe;
1882     first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX -
1883         (is_fcoe ? 0 : 1);
1884
1885     DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),
1886            "BNX2X_NUM_ETH_QUEUES %d, is_fcoe %d, first_queue_query_index %d => determined the last non virtual statistics query index is %d. Will add queries on top of that\n",
1887            BNX2X_NUM_ETH_QUEUES(bp), is_fcoe, first_queue_query_index,
1888            first_queue_query_index + num_queues_req);
1889
1890     cur_query_entry = &bp->fw_stats_req->
1891         query[first_queue_query_index + num_queues_req];
1892
1893     for_each_vf(bp, i) {
1894         int j;
1895         struct bnx2x_virtf *vf = BP_VF(bp, i);
1896
1897         if (vf->state != VF_ENABLED) {
1898             DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),
1899                    "vf %d not enabled so no stats for it\n",
1900                    vf->abs_vfid);
1901             continue;
1902         }
1903
1904         if (vf->malicious) {
1905             DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),
1906                    "vf %d malicious so no stats for it\n",
1907                    vf->abs_vfid);
1908             continue;
1909         }
1910
1911         DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),
1912                "add addresses for vf %d\n", vf->abs_vfid);
1913         for_each_vfq(vf, j) {
1914             struct bnx2x_vf_queue *rxq = vfq_get(vf, j);
1915
1916             dma_addr_t q_stats_addr =
1917                 vf->fw_stat_map + j * vf->stats_stride;
1918
1919             /* collect stats fro active queues only */
1920             if (bnx2x_get_q_logical_state(bp, &rxq->sp_obj) ==
1921                 BNX2X_Q_LOGICAL_STATE_STOPPED)
1922                 continue;
1923
1924             /* create stats query entry for this queue */
1925             cur_query_entry->kind = STATS_TYPE_QUEUE;
1926             cur_query_entry->index = vfq_stat_id(vf, rxq);
1927             cur_query_entry->funcID =
1928                 cpu_to_le16(FW_VF_HANDLE(vf->abs_vfid));
1929             cur_query_entry->address.hi =
1930                 cpu_to_le32(U64_HI(q_stats_addr));
1931             cur_query_entry->address.lo =
1932                 cpu_to_le32(U64_LO(q_stats_addr));
1933             DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),
1934                    "added address %x %x for vf %d queue %d client %d\n",
1935                    cur_query_entry->address.hi,
1936                    cur_query_entry->address.lo,
1937                    cur_query_entry->funcID,
1938                    j, cur_query_entry->index);
1939             cur_query_entry++;
1940             stats_count++;
1941
1942             /* all stats are coalesced to the leading queue */
1943             if (vf->cfg_flags & VF_CFG_STATS_COALESCE)
1944                 break;
1945         }
1946     }
1947     bp->fw_stats_req->hdr.cmd_num = bp->fw_stats_num + stats_count;
1948 }
1949
1950 /* VF API helpers */
1951 static void bnx2x_vf_qtbl_set_q(struct bnx2x *bp, u8 abs_vfid, u8 qid,
1952                 u8 enable)
1953 {
1954     u32 reg = PXP_REG_HST_ZONE_PERMISSION_TABLE + qid * 4;
1955     u32 val = enable ? (abs_vfid | (1 << 6)) : 0;
1956
1957     REG_WR(bp, reg, val);
1958 }
1959
1960 static void bnx2x_vf_clr_qtbl(struct bnx2x *bp, struct bnx2x_virtf *vf)
1961 {
1962     int i;
1963
1964     for_each_vfq(vf, i)
1965         bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid,
1966                     vfq_qzone_id(vf, vfq_get(vf, i)), false);
1967 }
1968
1969 static void bnx2x_vf_igu_disable(struct bnx2x *bp, struct bnx2x_virtf *vf)
1970 {
1971     u32 val;
1972
1973     /* clear the VF configuration - pretend */
1974     bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
1975     val = REG_RD(bp, IGU_REG_VF_CONFIGURATION);
1976     val &= ~(IGU_VF_CONF_MSI_MSIX_EN | IGU_VF_CONF_SINGLE_ISR_EN |
1977          IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_PARENT_MASK);
1978     REG_WR(bp, IGU_REG_VF_CONFIGURATION, val);
1979     bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
1980 }
1981
1982 u8 bnx2x_vf_max_queue_cnt(struct bnx2x *bp, struct bnx2x_virtf *vf)
1983 {
1984     return min_t(u8, min_t(u8, vf_sb_count(vf), BNX2X_CIDS_PER_VF),
1985              BNX2X_VF_MAX_QUEUES);
1986 }
1987
1988 static
1989 int bnx2x_vf_chk_avail_resc(struct bnx2x *bp, struct bnx2x_virtf *vf,
1990                 struct vf_pf_resc_request *req_resc)
1991 {
1992     u8 rxq_cnt = vf_rxq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf);
1993     u8 txq_cnt = vf_txq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf);
1994
1995     return ((req_resc->num_rxqs <= rxq_cnt) &&
1996         (req_resc->num_txqs <= txq_cnt) &&
1997         (req_resc->num_sbs <= vf_sb_count(vf))   &&
1998         (req_resc->num_mac_filters <= vf_mac_rules_cnt(vf)) &&
1999         (req_resc->num_vlan_filters <= vf_vlan_rules_cnt(vf)));
2000 }
2001
2002 /* CORE VF API */
2003 int bnx2x_vf_acquire(struct bnx2x *bp, struct bnx2x_virtf *vf,
2004              struct vf_pf_resc_request *resc)
2005 {
2006     int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vf->index) *
2007         BNX2X_CIDS_PER_VF;
2008
2009     union cdu_context *base_cxt = (union cdu_context *)
2010         BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr +
2011         (base_vf_cid & (ILT_PAGE_CIDS-1));
2012     int i;
2013
2014     /* if state is 'acquired' the VF was not released or FLR'd, in
2015      * this case the returned resources match the acquired already
2016      * acquired resources. Verify that the requested numbers do
2017      * not exceed the already acquired numbers.
2018      */
2019     if (vf->state == VF_ACQUIRED) {
2020         DP(BNX2X_MSG_IOV, "VF[%d] Trying to re-acquire resources (VF was not released or FLR'd)\n",
2021            vf->abs_vfid);
2022
2023         if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) {
2024             BNX2X_ERR("VF[%d] When re-acquiring resources, requested numbers must be <= then previously acquired numbers\n",
2025                   vf->abs_vfid);
2026             return -EINVAL;
2027         }
2028         return 0;
2029     }
2030
2031     /* Otherwise vf state must be 'free' or 'reset' */
2032     if (vf->state != VF_FREE && vf->state != VF_RESET) {
2033         BNX2X_ERR("VF[%d] Can not acquire a VF with state %d\n",
2034               vf->abs_vfid, vf->state);
2035         return -EINVAL;
2036     }
2037
2038     /* static allocation:
2039      * the global maximum number are fixed per VF. Fail the request if
2040      * requested number exceed these globals
2041      */
2042     if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) {
2043         DP(BNX2X_MSG_IOV,
2044            "cannot fulfill vf resource request. Placing maximal available values in response\n");
2045         /* set the max resource in the vf */
2046         return -ENOMEM;
2047     }
2048
2049     /* Set resources counters - 0 request means max available */
2050     vf_sb_count(vf) = resc->num_sbs;
2051     vf_rxq_count(vf) = resc->num_rxqs ? : bnx2x_vf_max_queue_cnt(bp, vf);
2052     vf_txq_count(vf) = resc->num_txqs ? : bnx2x_vf_max_queue_cnt(bp, vf);
2053
2054     DP(BNX2X_MSG_IOV,
2055        "Fulfilling vf request: sb count %d, tx_count %d, rx_count %d, mac_rules_count %d, vlan_rules_count %d\n",
2056        vf_sb_count(vf), vf_rxq_count(vf),
2057        vf_txq_count(vf), vf_mac_rules_cnt(vf),
2058        vf_vlan_rules_cnt(vf));
2059
2060     /* Initialize the queues */
2061     if (!vf->vfqs) {
2062         DP(BNX2X_MSG_IOV, "vf->vfqs was not allocated\n");
2063         return -EINVAL;
2064     }
2065
2066     for_each_vfq(vf, i) {
2067         struct bnx2x_vf_queue *q = vfq_get(vf, i);
2068
2069         if (!q) {
2070             BNX2X_ERR("q number %d was not allocated\n", i);
2071             return -EINVAL;
2072         }
2073
2074         q->index = i;
2075         q->cxt = &((base_cxt + i)->eth);
2076         q->cid = BNX2X_FIRST_VF_CID + base_vf_cid + i;
2077
2078         DP(BNX2X_MSG_IOV, "VFQ[%d:%d]: index %d, cid 0x%x, cxt %p\n",
2079            vf->abs_vfid, i, q->index, q->cid, q->cxt);
2080
2081         /* init SP objects */
2082         bnx2x_vfq_init(bp, vf, q);
2083     }
2084     vf->state = VF_ACQUIRED;
2085     return 0;
2086 }
2087
2088 int bnx2x_vf_init(struct bnx2x *bp, struct bnx2x_virtf *vf, dma_addr_t *sb_map)
2089 {
2090     struct bnx2x_func_init_params func_init = {0};
2091     int i;
2092
2093     /* the sb resources are initialized at this point, do the
2094      * FW/HW initializations
2095      */
2096     for_each_vf_sb(vf, i)
2097         bnx2x_init_sb(bp, (dma_addr_t)sb_map[i], vf->abs_vfid, true,
2098                   vf_igu_sb(vf, i), vf_igu_sb(vf, i));
2099
2100     /* Sanity checks */
2101     if (vf->state != VF_ACQUIRED) {
2102         DP(BNX2X_MSG_IOV, "VF[%d] is not in VF_ACQUIRED, but %d\n",
2103            vf->abs_vfid, vf->state);
2104         return -EINVAL;
2105     }
2106
2107     /* let FLR complete ... */
2108     msleep(100);
2109
2110     /* FLR cleanup epilogue */
2111     if (bnx2x_vf_flr_clnup_epilog(bp, vf->abs_vfid))
2112         return -EBUSY;
2113
2114     /* reset IGU VF statistics: MSIX */
2115     REG_WR(bp, IGU_REG_STATISTIC_NUM_MESSAGE_SENT + vf->abs_vfid * 4 , 0);
2116
2117     /* function setup */
2118     func_init.pf_id = BP_FUNC(bp);
2119     func_init.func_id = FW_VF_HANDLE(vf->abs_vfid);
2120     bnx2x_func_init(bp, &func_init);
2121
2122     /* Enable the vf */
2123     bnx2x_vf_enable_access(bp, vf->abs_vfid);
2124     bnx2x_vf_enable_traffic(bp, vf);
2125
2126     /* queue protection table */
2127     for_each_vfq(vf, i)
2128         bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid,
2129                     vfq_qzone_id(vf, vfq_get(vf, i)), true);
2130
2131     vf->state = VF_ENABLED;
2132
2133     /* update vf bulletin board */
2134     bnx2x_post_vf_bulletin(bp, vf->index);
2135
2136     return 0;
2137 }
2138
2139 struct set_vf_state_cookie {
2140     struct bnx2x_virtf *vf;
2141     u8 state;
2142 };
2143
2144 static void bnx2x_set_vf_state(void *cookie)
2145 {
2146     struct set_vf_state_cookie *p = (struct set_vf_state_cookie *)cookie;
2147
2148     p->vf->state = p->state;
2149 }
2150
2151 int bnx2x_vf_close(struct bnx2x *bp, struct bnx2x_virtf *vf)
2152 {
2153     int rc = 0, i;
2154
2155     DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
2156
2157     /* Close all queues */
2158     for (i = 0; i < vf_rxq_count(vf); i++) {
2159         rc = bnx2x_vf_queue_teardown(bp, vf, i);
2160         if (rc)
2161             goto op_err;
2162     }
2163
2164     /* disable the interrupts */
2165     DP(BNX2X_MSG_IOV, "disabling igu\n");
2166     bnx2x_vf_igu_disable(bp, vf);
2167
2168     /* disable the VF */
2169     DP(BNX2X_MSG_IOV, "clearing qtbl\n");
2170     bnx2x_vf_clr_qtbl(bp, vf);
2171
2172     /* need to make sure there are no outstanding stats ramrods which may
2173      * cause the device to access the VF's stats buffer which it will free
2174      * as soon as we return from the close flow.
2175      */
2176     {
2177         struct set_vf_state_cookie cookie;
2178
2179         cookie.vf = vf;
2180         cookie.state = VF_ACQUIRED;
2181         rc = bnx2x_stats_safe_exec(bp, bnx2x_set_vf_state, &cookie);
2182         if (rc)
2183             goto op_err;
2184     }
2185
2186     DP(BNX2X_MSG_IOV, "set state to acquired\n");
2187
2188     return 0;
2189 op_err:
2190     BNX2X_ERR("vf[%d] CLOSE error: rc %d\n", vf->abs_vfid, rc);
2191     return rc;
2192 }
2193
2194 /* VF release can be called either: 1. The VF was acquired but
2195  * not enabled 2. the vf was enabled or in the process of being
2196  * enabled
2197  */
2198 int bnx2x_vf_free(struct bnx2x *bp, struct bnx2x_virtf *vf)
2199 {
2200     int rc;
2201
2202     DP(BNX2X_MSG_IOV, "VF[%d] STATE: %s\n", vf->abs_vfid,
2203        vf->state == VF_FREE ? "Free" :
2204        vf->state == VF_ACQUIRED ? "Acquired" :
2205        vf->state == VF_ENABLED ? "Enabled" :
2206        vf->state == VF_RESET ? "Reset" :
2207        "Unknown");
2208
2209     switch (vf->state) {
2210     case VF_ENABLED:
2211         rc = bnx2x_vf_close(bp, vf);
2212         if (rc)
2213             goto op_err;
2214         fallthrough;    /* to release resources */
2215     case VF_ACQUIRED:
2216         DP(BNX2X_MSG_IOV, "about to free resources\n");
2217         bnx2x_vf_free_resc(bp, vf);
2218         break;
2219
2220     case VF_FREE:
2221     case VF_RESET:
2222     default:
2223         break;
2224     }
2225     return 0;
2226 op_err:
2227     BNX2X_ERR("VF[%d] RELEASE error: rc %d\n", vf->abs_vfid, rc);
2228     return rc;
2229 }
2230
2231 int bnx2x_vf_rss_update(struct bnx2x *bp, struct bnx2x_virtf *vf,
2232             struct bnx2x_config_rss_params *rss)
2233 {
2234     DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
2235     set_bit(RAMROD_COMP_WAIT, &rss->ramrod_flags);
2236     return bnx2x_config_rss(bp, rss);
2237 }
2238
2239 int bnx2x_vf_tpa_update(struct bnx2x *bp, struct bnx2x_virtf *vf,
2240             struct vfpf_tpa_tlv *tlv,
2241             struct bnx2x_queue_update_tpa_params *params)
2242 {
2243     aligned_u64 *sge_addr = tlv->tpa_client_info.sge_addr;
2244     struct bnx2x_queue_state_params qstate;
2245     int qid, rc = 0;
2246
2247     DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
2248
2249     /* Set ramrod params */
2250     memset(&qstate, 0, sizeof(struct bnx2x_queue_state_params));
2251     memcpy(&qstate.params.update_tpa, params,
2252            sizeof(struct bnx2x_queue_update_tpa_params));
2253     qstate.cmd = BNX2X_Q_CMD_UPDATE_TPA;
2254     set_bit(RAMROD_COMP_WAIT, &qstate.ramrod_flags);
2255
2256     for (qid = 0; qid < vf_rxq_count(vf); qid++) {
2257         qstate.q_obj = &bnx2x_vfq(vf, qid, sp_obj);
2258         qstate.params.update_tpa.sge_map = sge_addr[qid];
2259         DP(BNX2X_MSG_IOV, "sge_addr[%d:%d] %08x:%08x\n",
2260            vf->abs_vfid, qid, U64_HI(sge_addr[qid]),
2261            U64_LO(sge_addr[qid]));
2262         rc = bnx2x_queue_state_change(bp, &qstate);
2263         if (rc) {
2264             BNX2X_ERR("Failed to configure sge_addr %08x:%08x for [%d:%d]\n",
2265                   U64_HI(sge_addr[qid]), U64_LO(sge_addr[qid]),
2266                   vf->abs_vfid, qid);
2267             return rc;
2268         }
2269     }
2270
2271     return rc;
2272 }
2273
2274 /* VF release ~ VF close + VF release-resources
2275  * Release is the ultimate SW shutdown and is called whenever an
2276  * irrecoverable error is encountered.
2277  */
2278 int bnx2x_vf_release(struct bnx2x *bp, struct bnx2x_virtf *vf)
2279 {
2280     int rc;
2281
2282     DP(BNX2X_MSG_IOV, "PF releasing vf %d\n", vf->abs_vfid);
2283     bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_RELEASE_VF);
2284
2285     rc = bnx2x_vf_free(bp, vf);
2286     if (rc)
2287         WARN(rc,
2288              "VF[%d] Failed to allocate resources for release op- rc=%d\n",
2289              vf->abs_vfid, rc);
2290     bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_RELEASE_VF);
2291     return rc;
2292 }
2293
2294 void bnx2x_lock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf,
2295                   enum channel_tlvs tlv)
2296 {
2297     /* we don't lock the channel for unsupported tlvs */
2298     if (!bnx2x_tlv_supported(tlv)) {
2299         BNX2X_ERR("attempting to lock with unsupported tlv. Aborting\n");
2300         return;
2301     }
2302
2303     /* lock the channel */
2304     mutex_lock(&vf->op_mutex);
2305
2306     /* record the locking op */
2307     vf->op_current = tlv;
2308
2309     /* log the lock */
2310     DP(BNX2X_MSG_IOV, "VF[%d]: vf pf channel locked by %d\n",
2311        vf->abs_vfid, tlv);
2312 }
2313
2314 void bnx2x_unlock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf,
2315                 enum channel_tlvs expected_tlv)
2316 {
2317     enum channel_tlvs current_tlv;
2318
2319     if (!vf) {
2320         BNX2X_ERR("VF was %p\n", vf);
2321         return;
2322     }
2323
2324     current_tlv = vf->op_current;
2325
2326     /* we don't unlock the channel for unsupported tlvs */
2327     if (!bnx2x_tlv_supported(expected_tlv))
2328         return;
2329
2330     WARN(expected_tlv != vf->op_current,
2331          "lock mismatch: expected %d found %d", expected_tlv,
2332          vf->op_current);
2333
2334     /* record the locking op */
2335     vf->op_current = CHANNEL_TLV_NONE;
2336
2337     /* lock the channel */
2338     mutex_unlock(&vf->op_mutex);
2339
2340     /* log the unlock */
2341     DP(BNX2X_MSG_IOV, "VF[%d]: vf pf channel unlocked by %d\n",
2342        vf->abs_vfid, current_tlv);
2343 }
2344
2345 static int bnx2x_set_pf_tx_switching(struct bnx2x *bp, bool enable)
2346 {
2347     struct bnx2x_queue_state_params q_params;
2348     u32 prev_flags;
2349     int i, rc;
2350
2351     /* Verify changes are needed and record current Tx switching state */
2352     prev_flags = bp->flags;
2353     if (enable)
2354         bp->flags |= TX_SWITCHING;
2355     else
2356         bp->flags &= ~TX_SWITCHING;
2357     if (prev_flags == bp->flags)
2358         return 0;
2359
2360     /* Verify state enables the sending of queue ramrods */
2361     if ((bp->state != BNX2X_STATE_OPEN) ||
2362         (bnx2x_get_q_logical_state(bp,
2363                       &bnx2x_sp_obj(bp, &bp->fp[0]).q_obj) !=
2364          BNX2X_Q_LOGICAL_STATE_ACTIVE))
2365         return 0;
2366
2367     /* send q. update ramrod to configure Tx switching */
2368     memset(&q_params, 0, sizeof(q_params));
2369     __set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
2370     q_params.cmd = BNX2X_Q_CMD_UPDATE;
2371     __set_bit(BNX2X_Q_UPDATE_TX_SWITCHING_CHNG,
2372           &q_params.params.update.update_flags);
2373     if (enable)
2374         __set_bit(BNX2X_Q_UPDATE_TX_SWITCHING,
2375               &q_params.params.update.update_flags);
2376     else
2377         __clear_bit(BNX2X_Q_UPDATE_TX_SWITCHING,
2378                 &q_params.params.update.update_flags);
2379
2380     /* send the ramrod on all the queues of the PF */
2381     for_each_eth_queue(bp, i) {
2382         struct bnx2x_fastpath *fp = &bp->fp[i];
2383         int tx_idx;
2384
2385         /* Set the appropriate Queue object */
2386         q_params.q_obj = &bnx2x_sp_obj(bp, fp).q_obj;
2387
2388         for (tx_idx = FIRST_TX_COS_INDEX;
2389              tx_idx < fp->max_cos; tx_idx++) {
2390             q_params.params.update.cid_index = tx_idx;
2391
2392             /* Update the Queue state */
2393             rc = bnx2x_queue_state_change(bp, &q_params);
2394             if (rc) {
2395                 BNX2X_ERR("Failed to configure Tx switching\n");
2396                 return rc;
2397             }
2398         }
2399     }
2400
2401     DP(BNX2X_MSG_IOV, "%s Tx Switching\n", enable ? "Enabled" : "Disabled");
2402     return 0;
2403 }
2404
2405 int bnx2x_sriov_configure(struct pci_dev *dev, int num_vfs_param)
2406 {
2407     struct bnx2x *bp = netdev_priv(pci_get_drvdata(dev));
2408
2409     if (!IS_SRIOV(bp)) {
2410         BNX2X_ERR("failed to configure SR-IOV since vfdb was not allocated. Check dmesg for errors in probe stage\n");
2411         return -EINVAL;
2412     }
2413
2414     DP(BNX2X_MSG_IOV, "bnx2x_sriov_configure called with %d, BNX2X_NR_VIRTFN(bp) was %d\n",
2415        num_vfs_param, BNX2X_NR_VIRTFN(bp));
2416
2417     /* HW channel is only operational when PF is up */
2418     if (bp->state != BNX2X_STATE_OPEN) {
2419         BNX2X_ERR("VF num configuration via sysfs not supported while PF is down\n");
2420         return -EINVAL;
2421     }
2422
2423     /* we are always bound by the total_vfs in the configuration space */
2424     if (num_vfs_param > BNX2X_NR_VIRTFN(bp)) {
2425         BNX2X_ERR("truncating requested number of VFs (%d) down to maximum allowed (%d)\n",
2426               num_vfs_param, BNX2X_NR_VIRTFN(bp));
2427         num_vfs_param = BNX2X_NR_VIRTFN(bp);
2428     }
2429
2430     bp->requested_nr_virtfn = num_vfs_param;
2431     if (num_vfs_param == 0) {
2432         bnx2x_set_pf_tx_switching(bp, false);
2433         bnx2x_disable_sriov(bp);
2434         return 0;
2435     } else {
2436         return bnx2x_enable_sriov(bp);
2437     }
2438 }
2439
2440 #define IGU_ENTRY_SIZE 4
2441
2442 int bnx2x_enable_sriov(struct bnx2x *bp)
2443 {
2444     int rc = 0, req_vfs = bp->requested_nr_virtfn;
2445     int vf_idx, sb_idx, vfq_idx, qcount, first_vf;
2446     u32 igu_entry, address;
2447     u16 num_vf_queues;
2448
2449     if (req_vfs == 0)
2450         return 0;
2451
2452     first_vf = bp->vfdb->sriov.first_vf_in_pf;
2453
2454     /* statically distribute vf sb pool between VFs */
2455     num_vf_queues = min_t(u16, BNX2X_VF_MAX_QUEUES,
2456                   BP_VFDB(bp)->vf_sbs_pool / req_vfs);
2457
2458     /* zero previous values learned from igu cam */
2459     for (vf_idx = 0; vf_idx < req_vfs; vf_idx++) {
2460         struct bnx2x_virtf *vf = BP_VF(bp, vf_idx);
2461
2462         vf->sb_count = 0;
2463         vf_sb_count(BP_VF(bp, vf_idx)) = 0;
2464     }
2465     bp->vfdb->vf_sbs_pool = 0;
2466
2467     /* prepare IGU cam */
2468     sb_idx = BP_VFDB(bp)->first_vf_igu_entry;
2469     address = IGU_REG_MAPPING_MEMORY + sb_idx * IGU_ENTRY_SIZE;
2470     for (vf_idx = first_vf; vf_idx < first_vf + req_vfs; vf_idx++) {
2471         for (vfq_idx = 0; vfq_idx < num_vf_queues; vfq_idx++) {
2472             igu_entry = vf_idx << IGU_REG_MAPPING_MEMORY_FID_SHIFT |
2473                 vfq_idx << IGU_REG_MAPPING_MEMORY_VECTOR_SHIFT |
2474                 IGU_REG_MAPPING_MEMORY_VALID;
2475             DP(BNX2X_MSG_IOV, "assigning sb %d to vf %d\n",
2476                sb_idx, vf_idx);
2477             REG_WR(bp, address, igu_entry);
2478             sb_idx++;
2479             address += IGU_ENTRY_SIZE;
2480         }
2481     }
2482
2483     /* Reinitialize vf database according to igu cam */
2484     bnx2x_get_vf_igu_cam_info(bp);
2485
2486     DP(BNX2X_MSG_IOV, "vf_sbs_pool %d, num_vf_queues %d\n",
2487        BP_VFDB(bp)->vf_sbs_pool, num_vf_queues);
2488
2489     qcount = 0;
2490     for_each_vf(bp, vf_idx) {
2491         struct bnx2x_virtf *vf = BP_VF(bp, vf_idx);
2492
2493         /* set local queue arrays */
2494         vf->vfqs = &bp->vfdb->vfqs[qcount];
2495         qcount += vf_sb_count(vf);
2496         bnx2x_iov_static_resc(bp, vf);
2497     }
2498
2499     /* prepare msix vectors in VF configuration space - the value in the
2500      * PCI configuration space should be the index of the last entry,
2501      * namely one less than the actual size of the table
2502      */
2503     for (vf_idx = first_vf; vf_idx < first_vf + req_vfs; vf_idx++) {
2504         bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf_idx));
2505         REG_WR(bp, PCICFG_OFFSET + GRC_CONFIG_REG_VF_MSIX_CONTROL,
2506                num_vf_queues - 1);
2507         DP(BNX2X_MSG_IOV, "set msix vec num in VF %d cfg space to %d\n",
2508            vf_idx, num_vf_queues - 1);
2509     }
2510     bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
2511
2512     /* enable sriov. This will probe all the VFs, and consequentially cause
2513      * the "acquire" messages to appear on the VF PF channel.
2514      */
2515     DP(BNX2X_MSG_IOV, "about to call enable sriov\n");
2516     bnx2x_disable_sriov(bp);
2517
2518     rc = bnx2x_set_pf_tx_switching(bp, true);
2519     if (rc)
2520         return rc;
2521
2522     rc = pci_enable_sriov(bp->pdev, req_vfs);
2523     if (rc) {
2524         BNX2X_ERR("pci_enable_sriov failed with %d\n", rc);
2525         return rc;
2526     }
2527     DP(BNX2X_MSG_IOV, "sriov enabled (%d vfs)\n", req_vfs);
2528     return req_vfs;
2529 }
2530
2531 void bnx2x_pf_set_vfs_vlan(struct bnx2x *bp)
2532 {
2533     int vfidx;
2534     struct pf_vf_bulletin_content *bulletin;
2535
2536     DP(BNX2X_MSG_IOV, "configuring vlan for VFs from sp-task\n");
2537     for_each_vf(bp, vfidx) {
2538         bulletin = BP_VF_BULLETIN(bp, vfidx);
2539         if (bulletin->valid_bitmap & (1 << VLAN_VALID))
2540             bnx2x_set_vf_vlan(bp->dev, vfidx, bulletin->vlan, 0,
2541                       htons(ETH_P_8021Q));
2542     }
2543 }
2544
2545 void bnx2x_disable_sriov(struct bnx2x *bp)
2546 {
2547     if (pci_vfs_assigned(bp->pdev)) {
2548         DP(BNX2X_MSG_IOV,
2549            "Unloading driver while VFs are assigned - VFs will not be deallocated\n");
2550         return;
2551     }
2552
2553     pci_disable_sriov(bp->pdev);
2554 }
2555
2556 static int bnx2x_vf_op_prep(struct bnx2x *bp, int vfidx,
2557                 struct bnx2x_virtf **vf,
2558                 struct pf_vf_bulletin_content **bulletin,
2559                 bool test_queue)
2560 {
2561     if (bp->state != BNX2X_STATE_OPEN) {
2562         BNX2X_ERR("PF is down - can't utilize iov-related functionality\n");
2563         return -EINVAL;
2564     }
2565
2566     if (!IS_SRIOV(bp)) {
2567         BNX2X_ERR("sriov is disabled - can't utilize iov-related functionality\n");
2568         return -EINVAL;
2569     }
2570
2571     if (vfidx >= BNX2X_NR_VIRTFN(bp)) {
2572         BNX2X_ERR("VF is uninitialized - can't utilize iov-related functionality. vfidx was %d BNX2X_NR_VIRTFN was %d\n",
2573               vfidx, BNX2X_NR_VIRTFN(bp));
2574         return -EINVAL;
2575     }
2576
2577     /* init members */
2578     *vf = BP_VF(bp, vfidx);
2579     *bulletin = BP_VF_BULLETIN(bp, vfidx);
2580
2581     if (!*vf) {
2582         BNX2X_ERR("Unable to get VF structure for vfidx %d\n", vfidx);
2583         return -EINVAL;
2584     }
2585
2586     if (test_queue && !(*vf)->vfqs) {
2587         BNX2X_ERR("vfqs struct is null. Was this invoked before dynamically enabling SR-IOV? vfidx was %d\n",
2588               vfidx);
2589         return -EINVAL;
2590     }
2591
2592     if (!*bulletin) {
2593         BNX2X_ERR("Bulletin Board struct is null for vfidx %d\n",
2594               vfidx);
2595         return -EINVAL;
2596     }
2597
2598     return 0;
2599 }
2600
2601 int bnx2x_get_vf_config(struct net_device *dev, int vfidx,
2602             struct ifla_vf_info *ivi)
2603 {
2604     struct bnx2x *bp = netdev_priv(dev);
2605     struct bnx2x_virtf *vf = NULL;
2606     struct pf_vf_bulletin_content *bulletin = NULL;
2607     struct bnx2x_vlan_mac_obj *mac_obj;
2608     struct bnx2x_vlan_mac_obj *vlan_obj;
2609     int rc;
2610
2611     /* sanity and init */
2612     rc = bnx2x_vf_op_prep(bp, vfidx, &vf, &bulletin, true);
2613     if (rc)
2614         return rc;
2615
2616     mac_obj = &bnx2x_leading_vfq(vf, mac_obj);
2617     vlan_obj = &bnx2x_leading_vfq(vf, vlan_obj);
2618     if (!mac_obj || !vlan_obj) {
2619         BNX2X_ERR("VF partially initialized\n");
2620         return -EINVAL;
2621     }
2622
2623     ivi->vf = vfidx;
2624     ivi->qos = 0;
2625     ivi->max_tx_rate = 10000; /* always 10G. TBA take from link struct */
2626     ivi->min_tx_rate = 0;
2627     ivi->spoofchk = vf->spoofchk ? 1 : 0;
2628     ivi->linkstate = vf->link_cfg;
2629     if (vf->state == VF_ENABLED) {
2630         /* mac and vlan are in vlan_mac objects */
2631         if (bnx2x_validate_vf_sp_objs(bp, vf, false)) {
2632             mac_obj->get_n_elements(bp, mac_obj, 1, (u8 *)&ivi->mac,
2633                         0, ETH_ALEN);
2634             vlan_obj->get_n_elements(bp, vlan_obj, 1,
2635                          (u8 *)&ivi->vlan, 0,
2636                          VLAN_HLEN);
2637         }
2638     } else {
2639         mutex_lock(&bp->vfdb->bulletin_mutex);
2640         /* mac */
2641         if (bulletin->valid_bitmap & (1 << MAC_ADDR_VALID))
2642             /* mac configured by ndo so its in bulletin board */
2643             memcpy(&ivi->mac, bulletin->mac, ETH_ALEN);
2644         else
2645             /* function has not been loaded yet. Show mac as 0s */
2646             eth_zero_addr(ivi->mac);
2647
2648         /* vlan */
2649         if (bulletin->valid_bitmap & (1 << VLAN_VALID))
2650             /* vlan configured by ndo so its in bulletin board */
2651             memcpy(&ivi->vlan, &bulletin->vlan, VLAN_HLEN);
2652         else
2653             /* function has not been loaded yet. Show vlans as 0s */
2654             memset(&ivi->vlan, 0, VLAN_HLEN);
2655
2656         mutex_unlock(&bp->vfdb->bulletin_mutex);
2657     }
2658
2659     return 0;
2660 }
2661
2662 /* New mac for VF. Consider these cases:
2663  * 1. VF hasn't been acquired yet - save the mac in local bulletin board and
2664  *    supply at acquire.
2665  * 2. VF has already been acquired but has not yet initialized - store in local
2666  *    bulletin board. mac will be posted on VF bulletin board after VF init. VF
2667  *    will configure this mac when it is ready.
2668  * 3. VF has already initialized but has not yet setup a queue - post the new
2669  *    mac on VF's bulletin board right now. VF will configure this mac when it
2670  *    is ready.
2671  * 4. VF has already set a queue - delete any macs already configured for this
2672  *    queue and manually config the new mac.
2673  * In any event, once this function has been called refuse any attempts by the
2674  * VF to configure any mac for itself except for this mac. In case of a race
2675  * where the VF fails to see the new post on its bulletin board before sending a
2676  * mac configuration request, the PF will simply fail the request and VF can try
2677  * again after consulting its bulletin board.
2678  */
2679 int bnx2x_set_vf_mac(struct net_device *dev, int vfidx, u8 *mac)
2680 {
2681     struct bnx2x *bp = netdev_priv(dev);
2682     int rc, q_logical_state;
2683     struct bnx2x_virtf *vf = NULL;
2684     struct pf_vf_bulletin_content *bulletin = NULL;
2685
2686     if (!is_valid_ether_addr(mac)) {
2687         BNX2X_ERR("mac address invalid\n");
2688         return -EINVAL;
2689     }
2690
2691     /* sanity and init */
2692     rc = bnx2x_vf_op_prep(bp, vfidx, &vf, &bulletin, true);
2693     if (rc)
2694         return rc;
2695
2696     mutex_lock(&bp->vfdb->bulletin_mutex);
2697
2698     /* update PF's copy of the VF's bulletin. Will no longer accept mac
2699      * configuration requests from vf unless match this mac
2700      */
2701     bulletin->valid_bitmap |= 1 << MAC_ADDR_VALID;
2702     memcpy(bulletin->mac, mac, ETH_ALEN);
2703
2704     /* Post update on VF's bulletin board */
2705     rc = bnx2x_post_vf_bulletin(bp, vfidx);
2706
2707     /* release lock before checking return code */
2708     mutex_unlock(&bp->vfdb->bulletin_mutex);
2709
2710     if (rc) {
2711         BNX2X_ERR("failed to update VF[%d] bulletin\n", vfidx);
2712         return rc;
2713     }
2714
2715     q_logical_state =
2716         bnx2x_get_q_logical_state(bp, &bnx2x_leading_vfq(vf, sp_obj));
2717     if (vf->state == VF_ENABLED &&
2718         q_logical_state == BNX2X_Q_LOGICAL_STATE_ACTIVE) {
2719         /* configure the mac in device on this vf's queue */
2720         unsigned long ramrod_flags = 0;
2721         struct bnx2x_vlan_mac_obj *mac_obj;
2722
2723         /* User should be able to see failure reason in system logs */
2724         if (!bnx2x_validate_vf_sp_objs(bp, vf, true))
2725             return -EINVAL;
2726
2727         /* must lock vfpf channel to protect against vf flows */
2728         bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC);
2729
2730         /* remove existing eth macs */
2731         mac_obj = &bnx2x_leading_vfq(vf, mac_obj);
2732         rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_ETH_MAC, true);
2733         if (rc) {
2734             BNX2X_ERR("failed to delete eth macs\n");
2735             rc = -EINVAL;
2736             goto out;
2737         }
2738
2739         /* remove existing uc list macs */
2740         rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_UC_LIST_MAC, true);
2741         if (rc) {
2742             BNX2X_ERR("failed to delete uc_list macs\n");
2743             rc = -EINVAL;
2744             goto out;
2745         }
2746
2747         /* configure the new mac to device */
2748         __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
2749         bnx2x_set_mac_one(bp, (u8 *)&bulletin->mac, mac_obj, true,
2750                   BNX2X_ETH_MAC, &ramrod_flags);
2751
2752 out:
2753         bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC);
2754     }
2755
2756     return rc;
2757 }
2758
2759 static void bnx2x_set_vf_vlan_acceptance(struct bnx2x *bp,
2760                      struct bnx2x_virtf *vf, bool accept)
2761 {
2762     struct bnx2x_rx_mode_ramrod_params rx_ramrod;
2763     unsigned long accept_flags;
2764
2765     /* need to remove/add the VF's accept_any_vlan bit */
2766     accept_flags = bnx2x_leading_vfq(vf, accept_flags);
2767     if (accept)
2768         set_bit(BNX2X_ACCEPT_ANY_VLAN, &accept_flags);
2769     else
2770         clear_bit(BNX2X_ACCEPT_ANY_VLAN, &accept_flags);
2771
2772     bnx2x_vf_prep_rx_mode(bp, LEADING_IDX, &rx_ramrod, vf,
2773                   accept_flags);
2774     bnx2x_leading_vfq(vf, accept_flags) = accept_flags;
2775     bnx2x_config_rx_mode(bp, &rx_ramrod);
2776 }
2777
2778 static int bnx2x_set_vf_vlan_filter(struct bnx2x *bp, struct bnx2x_virtf *vf,
2779                     u16 vlan, bool add)
2780 {
2781     struct bnx2x_vlan_mac_ramrod_params ramrod_param;
2782     unsigned long ramrod_flags = 0;
2783     int rc = 0;
2784
2785     /* configure the new vlan to device */
2786     memset(&ramrod_param, 0, sizeof(ramrod_param));
2787     __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
2788     ramrod_param.vlan_mac_obj = &bnx2x_leading_vfq(vf, vlan_obj);
2789     ramrod_param.ramrod_flags = ramrod_flags;
2790     ramrod_param.user_req.u.vlan.vlan = vlan;
2791     ramrod_param.user_req.cmd = add ? BNX2X_VLAN_MAC_ADD
2792                     : BNX2X_VLAN_MAC_DEL;
2793     rc = bnx2x_config_vlan_mac(bp, &ramrod_param);
2794     if (rc) {
2795         BNX2X_ERR("failed to configure vlan\n");
2796         return -EINVAL;
2797     }
2798
2799     return 0;
2800 }
2801
2802 int bnx2x_set_vf_vlan(struct net_device *dev, int vfidx, u16 vlan, u8 qos,
2803               __be16 vlan_proto)
2804 {
2805     struct pf_vf_bulletin_content *bulletin = NULL;
2806     struct bnx2x *bp = netdev_priv(dev);
2807     struct bnx2x_vlan_mac_obj *vlan_obj;
2808     unsigned long vlan_mac_flags = 0;
2809     unsigned long ramrod_flags = 0;
2810     struct bnx2x_virtf *vf = NULL;
2811     int i, rc;
2812
2813     if (vlan > 4095) {
2814         BNX2X_ERR("illegal vlan value %d\n", vlan);
2815         return -EINVAL;
2816     }
2817
2818     if (vlan_proto != htons(ETH_P_8021Q))
2819         return -EPROTONOSUPPORT;
2820
2821     DP(BNX2X_MSG_IOV, "configuring VF %d with VLAN %d qos %d\n",
2822        vfidx, vlan, 0);
2823
2824     /* sanity and init */
2825     rc = bnx2x_vf_op_prep(bp, vfidx, &vf, &bulletin, true);
2826     if (rc)
2827         return rc;
2828
2829     /* update PF's copy of the VF's bulletin. No point in posting the vlan
2830      * to the VF since it doesn't have anything to do with it. But it useful
2831      * to store it here in case the VF is not up yet and we can only
2832      * configure the vlan later when it does. Treat vlan id 0 as remove the
2833      * Host tag.
2834      */
2835     mutex_lock(&bp->vfdb->bulletin_mutex);
2836
2837     if (vlan > 0)
2838         bulletin->valid_bitmap |= 1 << VLAN_VALID;
2839     else
2840         bulletin->valid_bitmap &= ~(1 << VLAN_VALID);
2841     bulletin->vlan = vlan;
2842
2843     /* Post update on VF's bulletin board */
2844     rc = bnx2x_post_vf_bulletin(bp, vfidx);
2845     if (rc)
2846         BNX2X_ERR("failed to update VF[%d] bulletin\n", vfidx);
2847     mutex_unlock(&bp->vfdb->bulletin_mutex);
2848
2849     /* is vf initialized and queue set up? */
2850     if (vf->state != VF_ENABLED ||
2851         bnx2x_get_q_logical_state(bp, &bnx2x_leading_vfq(vf, sp_obj)) !=
2852         BNX2X_Q_LOGICAL_STATE_ACTIVE)
2853         return rc;
2854
2855     /* User should be able to see error in system logs */
2856     if (!bnx2x_validate_vf_sp_objs(bp, vf, true))
2857         return -EINVAL;
2858
2859     /* must lock vfpf channel to protect against vf flows */
2860     bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_VLAN);
2861
2862     /* remove existing vlans */
2863     __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
2864     vlan_obj = &bnx2x_leading_vfq(vf, vlan_obj);
2865     rc = vlan_obj->delete_all(bp, vlan_obj, &vlan_mac_flags,
2866                   &ramrod_flags);
2867     if (rc) {
2868         BNX2X_ERR("failed to delete vlans\n");
2869         rc = -EINVAL;
2870         goto out;
2871     }
2872
2873     /* clear accept_any_vlan when HV forces vlan, otherwise
2874      * according to VF capabilities
2875      */
2876     if (vlan || !(vf->cfg_flags & VF_CFG_VLAN_FILTER))
2877         bnx2x_set_vf_vlan_acceptance(bp, vf, !vlan);
2878
2879     rc = bnx2x_set_vf_vlan_filter(bp, vf, vlan, true);
2880     if (rc)
2881         goto out;
2882
2883     /* send queue update ramrods to configure default vlan and
2884      * silent vlan removal
2885      */
2886     for_each_vfq(vf, i) {
2887         struct bnx2x_queue_state_params q_params = {NULL};
2888         struct bnx2x_queue_update_params *update_params;
2889
2890         q_params.q_obj = &bnx2x_vfq(vf, i, sp_obj);
2891
2892         /* validate the Q is UP */
2893         if (bnx2x_get_q_logical_state(bp, q_params.q_obj) !=
2894             BNX2X_Q_LOGICAL_STATE_ACTIVE)
2895             continue;
2896
2897         __set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
2898         q_params.cmd = BNX2X_Q_CMD_UPDATE;
2899         update_params = &q_params.params.update;
2900         __set_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN_CHNG,
2901               &update_params->update_flags);
2902         __set_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM_CHNG,
2903               &update_params->update_flags);
2904         if (vlan == 0) {
2905             /* if vlan is 0 then we want to leave the VF traffic
2906              * untagged, and leave the incoming traffic untouched
2907              * (i.e. do not remove any vlan tags).
2908              */
2909             __clear_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN,
2910                     &update_params->update_flags);
2911             __clear_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM,
2912                     &update_params->update_flags);
2913         } else {
2914             /* configure default vlan to vf queue and set silent
2915              * vlan removal (the vf remains unaware of this vlan).
2916              */
2917             __set_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN,
2918                   &update_params->update_flags);
2919             __set_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM,
2920                   &update_params->update_flags);
2921             update_params->def_vlan = vlan;
2922             update_params->silent_removal_value =
2923                 vlan & VLAN_VID_MASK;
2924             update_params->silent_removal_mask = VLAN_VID_MASK;
2925         }
2926
2927         /* Update the Queue state */
2928         rc = bnx2x_queue_state_change(bp, &q_params);
2929         if (rc) {
2930             BNX2X_ERR("Failed to configure default VLAN queue %d\n",
2931                   i);
2932             goto out;
2933         }
2934     }
2935 out:
2936     bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_VLAN);
2937
2938     if (rc)
2939         DP(BNX2X_MSG_IOV,
2940            "updated VF[%d] vlan configuration (vlan = %d)\n",
2941            vfidx, vlan);
2942
2943     return rc;
2944 }
2945
2946 int bnx2x_set_vf_spoofchk(struct net_device *dev, int idx, bool val)
2947 {
2948     struct bnx2x *bp = netdev_priv(dev);
2949     struct bnx2x_virtf *vf;
2950     int i, rc = 0;
2951
2952     vf = BP_VF(bp, idx);
2953     if (!vf)
2954         return -EINVAL;
2955
2956     /* nothing to do */
2957     if (vf->spoofchk == val)
2958         return 0;
2959
2960     vf->spoofchk = val ? 1 : 0;
2961
2962     DP(BNX2X_MSG_IOV, "%s spoofchk for VF %d\n",
2963        val ? "enabling" : "disabling", idx);
2964
2965     /* is vf initialized and queue set up? */
2966     if (vf->state != VF_ENABLED ||
2967         bnx2x_get_q_logical_state(bp, &bnx2x_leading_vfq(vf, sp_obj)) !=
2968         BNX2X_Q_LOGICAL_STATE_ACTIVE)
2969         return rc;
2970
2971     /* User should be able to see error in system logs */
2972     if (!bnx2x_validate_vf_sp_objs(bp, vf, true))
2973         return -EINVAL;
2974
2975     /* send queue update ramrods to configure spoofchk */
2976     for_each_vfq(vf, i) {
2977         struct bnx2x_queue_state_params q_params = {NULL};
2978         struct bnx2x_queue_update_params *update_params;
2979
2980         q_params.q_obj = &bnx2x_vfq(vf, i, sp_obj);
2981
2982         /* validate the Q is UP */
2983         if (bnx2x_get_q_logical_state(bp, q_params.q_obj) !=
2984             BNX2X_Q_LOGICAL_STATE_ACTIVE)
2985             continue;
2986
2987         __set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
2988         q_params.cmd = BNX2X_Q_CMD_UPDATE;
2989         update_params = &q_params.params.update;
2990         __set_bit(BNX2X_Q_UPDATE_ANTI_SPOOF_CHNG,
2991               &update_params->update_flags);
2992         if (val) {
2993             __set_bit(BNX2X_Q_UPDATE_ANTI_SPOOF,
2994                   &update_params->update_flags);
2995         } else {
2996             __clear_bit(BNX2X_Q_UPDATE_ANTI_SPOOF,
2997                     &update_params->update_flags);
2998         }
2999
3000         /* Update the Queue state */
3001         rc = bnx2x_queue_state_change(bp, &q_params);
3002         if (rc) {
3003             BNX2X_ERR("Failed to %s spoofchk on VF %d - vfq %d\n",
3004                   val ? "enable" : "disable", idx, i);
3005             goto out;
3006         }
3007     }
3008 out:
3009     if (!rc)
3010         DP(BNX2X_MSG_IOV,
3011            "%s spoofchk for VF[%d]\n", val ? "Enabled" : "Disabled",
3012            idx);
3013
3014     return rc;
3015 }
3016
3017 /* crc is the first field in the bulletin board. Compute the crc over the
3018  * entire bulletin board excluding the crc field itself. Use the length field
3019  * as the Bulletin Board was posted by a PF with possibly a different version
3020  * from the vf which will sample it. Therefore, the length is computed by the
3021  * PF and then used blindly by the VF.
3022  */
3023 u32 bnx2x_crc_vf_bulletin(struct pf_vf_bulletin_content *bulletin)
3024 {
3025     return crc32(BULLETIN_CRC_SEED,
3026          ((u8 *)bulletin) + sizeof(bulletin->crc),
3027          bulletin->length - sizeof(bulletin->crc));
3028 }
3029
3030 /* Check for new posts on the bulletin board */
3031 enum sample_bulletin_result bnx2x_sample_bulletin(struct bnx2x *bp)
3032 {
3033     struct pf_vf_bulletin_content *bulletin;
3034     int attempts;
3035
3036     /* sampling structure in mid post may result with corrupted data
3037      * validate crc to ensure coherency.
3038      */
3039     for (attempts = 0; attempts < BULLETIN_ATTEMPTS; attempts++) {
3040         u32 crc;
3041
3042         /* sample the bulletin board */
3043         memcpy(&bp->shadow_bulletin, bp->pf2vf_bulletin,
3044                sizeof(union pf_vf_bulletin));
3045
3046         crc = bnx2x_crc_vf_bulletin(&bp->shadow_bulletin.content);
3047
3048         if (bp->shadow_bulletin.content.crc == crc)
3049             break;
3050
3051         BNX2X_ERR("bad crc on bulletin board. Contained %x computed %x\n",
3052               bp->shadow_bulletin.content.crc, crc);
3053     }
3054
3055     if (attempts >= BULLETIN_ATTEMPTS) {
3056         BNX2X_ERR("pf to vf bulletin board crc was wrong %d consecutive times. Aborting\n",
3057               attempts);
3058         return PFVF_BULLETIN_CRC_ERR;
3059     }
3060     bulletin = &bp->shadow_bulletin.content;
3061
3062     /* bulletin board hasn't changed since last sample */
3063     if (bp->old_bulletin.version == bulletin->version)
3064         return PFVF_BULLETIN_UNCHANGED;
3065
3066     /* the mac address in bulletin board is valid and is new */
3067     if (bulletin->valid_bitmap & 1 << MAC_ADDR_VALID &&
3068         !ether_addr_equal(bulletin->mac, bp->old_bulletin.mac)) {
3069         /* update new mac to net device */
3070         eth_hw_addr_set(bp->dev, bulletin->mac);
3071     }
3072
3073     if (bulletin->valid_bitmap & (1 << LINK_VALID)) {
3074         DP(BNX2X_MSG_IOV, "link update speed %d flags %x\n",
3075            bulletin->link_speed, bulletin->link_flags);
3076
3077         bp->vf_link_vars.line_speed = bulletin->link_speed;
3078         bp->vf_link_vars.link_report_flags = 0;
3079         /* Link is down */
3080         if (bulletin->link_flags & VFPF_LINK_REPORT_LINK_DOWN)
3081             __set_bit(BNX2X_LINK_REPORT_LINK_DOWN,
3082                   &bp->vf_link_vars.link_report_flags);
3083         /* Full DUPLEX */
3084         if (bulletin->link_flags & VFPF_LINK_REPORT_FULL_DUPLEX)
3085             __set_bit(BNX2X_LINK_REPORT_FD,
3086                   &bp->vf_link_vars.link_report_flags);
3087         /* Rx Flow Control is ON */
3088         if (bulletin->link_flags & VFPF_LINK_REPORT_RX_FC_ON)
3089             __set_bit(BNX2X_LINK_REPORT_RX_FC_ON,
3090                   &bp->vf_link_vars.link_report_flags);
3091         /* Tx Flow Control is ON */
3092         if (bulletin->link_flags & VFPF_LINK_REPORT_TX_FC_ON)
3093             __set_bit(BNX2X_LINK_REPORT_TX_FC_ON,
3094                   &bp->vf_link_vars.link_report_flags);
3095         __bnx2x_link_report(bp);
3096     }
3097
3098     /* copy new bulletin board to bp */
3099     memcpy(&bp->old_bulletin, bulletin,
3100            sizeof(struct pf_vf_bulletin_content));
3101
3102     return PFVF_BULLETIN_UPDATED;
3103 }
3104
3105 void bnx2x_timer_sriov(struct bnx2x *bp)
3106 {
3107     bnx2x_sample_bulletin(bp);
3108
3109     /* if channel is down we need to self destruct */
3110     if (bp->old_bulletin.valid_bitmap & 1 << CHANNEL_DOWN)
3111         bnx2x_schedule_sp_rtnl(bp, BNX2X_SP_RTNL_VFPF_CHANNEL_DOWN,
3112                        BNX2X_MSG_IOV);
3113 }
3114
3115 void __iomem *bnx2x_vf_doorbells(struct bnx2x *bp)
3116 {
3117     /* vf doorbells are embedded within the regview */
3118     return bp->regview + PXP_VF_ADDR_DB_START;
3119 }
3120
3121 void bnx2x_vf_pci_dealloc(struct bnx2x *bp)
3122 {
3123     BNX2X_PCI_FREE(bp->vf2pf_mbox, bp->vf2pf_mbox_mapping,
3124                sizeof(struct bnx2x_vf_mbx_msg));
3125     BNX2X_PCI_FREE(bp->pf2vf_bulletin, bp->pf2vf_bulletin_mapping,
3126                sizeof(union pf_vf_bulletin));
3127 }
3128
3129 int bnx2x_vf_pci_alloc(struct bnx2x *bp)
3130 {
3131     mutex_init(&bp->vf2pf_mutex);
3132
3133     /* allocate vf2pf mailbox for vf to pf channel */
3134     bp->vf2pf_mbox = BNX2X_PCI_ALLOC(&bp->vf2pf_mbox_mapping,
3135                      sizeof(struct bnx2x_vf_mbx_msg));
3136     if (!bp->vf2pf_mbox)
3137         goto alloc_mem_err;
3138
3139     /* allocate pf 2 vf bulletin board */
3140     bp->pf2vf_bulletin = BNX2X_PCI_ALLOC(&bp->pf2vf_bulletin_mapping,
3141                          sizeof(union pf_vf_bulletin));
3142     if (!bp->pf2vf_bulletin)
3143         goto alloc_mem_err;
3144
3145     bnx2x_vf_bulletin_finalize(&bp->pf2vf_bulletin->content, true);
3146
3147     return 0;
3148
3149 alloc_mem_err:
3150     bnx2x_vf_pci_dealloc(bp);
3151     return -ENOMEM;
3152 }
3153
3154 void bnx2x_iov_channel_down(struct bnx2x *bp)
3155 {
3156     int vf_idx;
3157     struct pf_vf_bulletin_content *bulletin;
3158
3159     if (!IS_SRIOV(bp))
3160         return;
3161
3162     for_each_vf(bp, vf_idx) {
3163         /* locate this VFs bulletin board and update the channel down
3164          * bit
3165          */
3166         bulletin = BP_VF_BULLETIN(bp, vf_idx);
3167         bulletin->valid_bitmap |= 1 << CHANNEL_DOWN;
3168
3169         /* update vf bulletin board */
3170         bnx2x_post_vf_bulletin(bp, vf_idx);
3171     }
3172 }
3173
3174 void bnx2x_iov_task(struct work_struct *work)
3175 {
3176     struct bnx2x *bp = container_of(work, struct bnx2x, iov_task.work);
3177
3178     if (!netif_running(bp->dev))
3179         return;
3180
3181     if (test_and_clear_bit(BNX2X_IOV_HANDLE_FLR,
3182                    &bp->iov_task_state))
3183         bnx2x_vf_handle_flr_event(bp);
3184
3185     if (test_and_clear_bit(BNX2X_IOV_HANDLE_VF_MSG,
3186                    &bp->iov_task_state))
3187         bnx2x_vf_mbx(bp);
3188 }
3189
3190 void bnx2x_schedule_iov_task(struct bnx2x *bp, enum bnx2x_iov_flag flag)
3191 {
3192     smp_mb__before_atomic();
3193     set_bit(flag, &bp->iov_task_state);
3194     smp_mb__after_atomic();
3195     DP(BNX2X_MSG_IOV, "Scheduling iov task [Flag: %d]\n", flag);
3196     queue_delayed_work(bnx2x_iov_wq, &bp->iov_task, 0);
3197 }