broadcom/bnx2x/bnx2x_dcb.h

0001 /* bnx2x_dcb.h: QLogic Everest network driver.
0002  *
0003  * Copyright 2009-2013 Broadcom Corporation
0004  * Copyright 2014 QLogic Corporation
0005  * All rights reserved
0006  *
0007  * Unless you and QLogic execute a separate written software license
0008  * agreement governing use of this software, this software is licensed to you
0009  * under the terms of the GNU General Public License version 2, available
0010  * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
0011  *
0012  * Notwithstanding the above, under no circumstances may you combine this
0013  * software in any way with any other QLogic software provided under a
0014  * license other than the GPL, without QLogic's express prior written
0015  * consent.
0016  *
0017  * Maintained by: Ariel Elior <ariel.elior@qlogic.com>
0018  * Written by: Dmitry Kravkov
0019  *
0020  */
0021 #ifndef BNX2X_DCB_H
0022 #define BNX2X_DCB_H
0023
0024 #include "bnx2x_hsi.h"
0025
0026 #define LLFC_DRIVER_TRAFFIC_TYPE_MAX 3 /* NW, iSCSI, FCoE */
0027 struct bnx2x_dcbx_app_params {
0028     u32 enabled;
0029     u32 traffic_type_priority[LLFC_DRIVER_TRAFFIC_TYPE_MAX];
0030 };
0031
0032 #define DCBX_COS_MAX_NUM_E2 DCBX_E2E3_MAX_NUM_COS
0033 /* bnx2x currently limits numbers of supported COSes to 3 to be extended to 6 */
0034 #define BNX2X_MAX_COS_SUPPORT   3
0035 #define DCBX_COS_MAX_NUM_E3B0   BNX2X_MAX_COS_SUPPORT
0036 #define DCBX_COS_MAX_NUM    BNX2X_MAX_COS_SUPPORT
0037
0038 struct bnx2x_dcbx_cos_params {
0039     u32 bw_tbl;
0040     u32 pri_bitmask;
0041     /*
0042      * strict priority: valid values are 0..5; 0 is highest priority.
0043      * There can't be two COSes with the same priority.
0044      */
0045     u8  strict;
0046 #define BNX2X_DCBX_STRICT_INVALID           DCBX_COS_MAX_NUM
0047 #define BNX2X_DCBX_STRICT_COS_HIGHEST           0
0048 #define BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(sp)    ((sp) + 1)
0049     u8  pauseable;
0050 };
0051
0052 struct bnx2x_dcbx_pg_params {
0053     u32 enabled;
0054     u8 num_of_cos; /* valid COS entries */
0055     struct bnx2x_dcbx_cos_params    cos_params[DCBX_COS_MAX_NUM];
0056 };
0057
0058 struct bnx2x_dcbx_pfc_params {
0059     u32 enabled;
0060     u32 priority_non_pauseable_mask;
0061 };
0062
0063 struct bnx2x_dcbx_port_params {
0064     struct bnx2x_dcbx_pfc_params pfc;
0065     struct bnx2x_dcbx_pg_params  ets;
0066     struct bnx2x_dcbx_app_params app;
0067 };
0068
0069 #define BNX2X_DCBX_CONFIG_INV_VALUE         (0xFFFFFFFF)
0070 #define BNX2X_DCBX_OVERWRITE_SETTINGS_DISABLE       0
0071 #define BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE        1
0072 #define BNX2X_DCBX_OVERWRITE_SETTINGS_INVALID   (BNX2X_DCBX_CONFIG_INV_VALUE)
0073 #define BNX2X_IS_ETS_ENABLED(bp) ((bp)->dcb_state == BNX2X_DCB_STATE_ON &&\
0074                   (bp)->dcbx_port_params.ets.enabled)
0075
0076 struct bnx2x_config_lldp_params {
0077     u32 overwrite_settings;
0078     u32 msg_tx_hold;
0079     u32 msg_fast_tx;
0080     u32 tx_credit_max;
0081     u32 msg_tx_interval;
0082     u32 tx_fast;
0083 };
0084
0085 struct bnx2x_admin_priority_app_table {
0086         u32 valid;
0087         u32 priority;
0088 #define INVALID_TRAFFIC_TYPE_PRIORITY   (0xFFFFFFFF)
0089         u32 traffic_type;
0090 #define TRAFFIC_TYPE_ETH        0
0091 #define TRAFFIC_TYPE_PORT       1
0092         u32 app_id;
0093 };
0094
0095 #define DCBX_CONFIG_MAX_APP_PROTOCOL 4
0096 struct bnx2x_config_dcbx_params {
0097     u32 overwrite_settings;
0098     u32 admin_dcbx_version;
0099     u32 admin_ets_enable;
0100     u32 admin_pfc_enable;
0101     u32 admin_tc_supported_tx_enable;
0102     u32 admin_ets_configuration_tx_enable;
0103     u32 admin_ets_recommendation_tx_enable;
0104     u32 admin_pfc_tx_enable;
0105     u32 admin_application_priority_tx_enable;
0106     u32 admin_ets_willing;
0107     u32 admin_ets_reco_valid;
0108     u32 admin_pfc_willing;
0109     u32 admin_app_priority_willing;
0110     u32 admin_configuration_bw_precentage[8];
0111     u32 admin_configuration_ets_pg[8];
0112     u32 admin_recommendation_bw_precentage[8];
0113     u32 admin_recommendation_ets_pg[8];
0114     u32 admin_pfc_bitmap;
0115     struct bnx2x_admin_priority_app_table
0116         admin_priority_app_table[DCBX_CONFIG_MAX_APP_PROTOCOL];
0117     u32 admin_default_priority;
0118 };
0119
0120 #define GET_FLAGS(flags, bits)      ((flags) & (bits))
0121 #define SET_FLAGS(flags, bits)      ((flags) |= (bits))
0122 #define RESET_FLAGS(flags, bits)    ((flags) &= ~(bits))
0123
0124 enum {
0125     DCBX_READ_LOCAL_MIB,
0126     DCBX_READ_REMOTE_MIB
0127 };
0128
0129 #define ETH_TYPE_FCOE       (0x8906)
0130 #define TCP_PORT_ISCSI      (0xCBC)
0131
0132 #define PFC_VALUE_FRAME_SIZE                (512)
0133 #define PFC_QUANTA_IN_NANOSEC_FROM_SPEED_MEGA(mega_speed)  \
0134                 ((1000 * PFC_VALUE_FRAME_SIZE)/(mega_speed))
0135
0136 #define PFC_BRB1_REG_HIGH_LLFC_LOW_THRESHOLD            130
0137 #define PFC_BRB1_REG_HIGH_LLFC_HIGH_THRESHOLD           170
0138
0139 struct cos_entry_help_data {
0140     u32         pri_join_mask;
0141     u32         cos_bw;
0142     u8          strict;
0143     bool            pausable;
0144 };
0145
0146 struct cos_help_data {
0147     struct cos_entry_help_data  data[DCBX_COS_MAX_NUM];
0148     u8              num_of_cos;
0149 };
0150
0151 #define DCBX_ILLEGAL_PG             (0xFF)
0152 #define DCBX_PFC_PRI_MASK           (0xFF)
0153 #define DCBX_STRICT_PRIORITY            (15)
0154 #define DCBX_INVALID_COS_BW         (0xFFFFFFFF)
0155 #define DCBX_PFC_PRI_NON_PAUSE_MASK(bp)     \
0156             ((bp)->dcbx_port_params.pfc.priority_non_pauseable_mask)
0157 #define DCBX_PFC_PRI_PAUSE_MASK(bp)     \
0158                     ((u8)~DCBX_PFC_PRI_NON_PAUSE_MASK(bp))
0159 #define DCBX_PFC_PRI_GET_PAUSE(bp, pg_pri)  \
0160                 ((pg_pri) & (DCBX_PFC_PRI_PAUSE_MASK(bp)))
0161 #define DCBX_PFC_PRI_GET_NON_PAUSE(bp, pg_pri)  \
0162             (DCBX_PFC_PRI_NON_PAUSE_MASK(bp) & (pg_pri))
0163 #define DCBX_IS_PFC_PRI_SOME_PAUSE(bp, pg_pri)  \
0164             (0 != DCBX_PFC_PRI_GET_PAUSE(bp, pg_pri))
0165 #define IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pg_pri)  \
0166             (pg_pri == DCBX_PFC_PRI_GET_PAUSE((bp), (pg_pri)))
0167 #define IS_DCBX_PFC_PRI_ONLY_NON_PAUSE(bp, pg_pri)\
0168             ((pg_pri) == DCBX_PFC_PRI_GET_NON_PAUSE((bp), (pg_pri)))
0169 #define IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pg_pri)   \
0170             (!(IS_DCBX_PFC_PRI_ONLY_NON_PAUSE((bp), (pg_pri)) || \
0171              IS_DCBX_PFC_PRI_ONLY_PAUSE((bp), (pg_pri))))
0172
0173 struct pg_entry_help_data {
0174     u8  num_of_dif_pri;
0175     u8  pg;
0176     u32 pg_priority;
0177 };
0178
0179 struct pg_help_data {
0180     struct pg_entry_help_data   data[LLFC_DRIVER_TRAFFIC_TYPE_MAX];
0181     u8              num_of_pg;
0182 };
0183
0184 /* forward DCB/PFC related declarations */
0185 struct bnx2x;
0186 void bnx2x_dcbx_update(struct work_struct *work);
0187 void bnx2x_dcbx_init_params(struct bnx2x *bp);
0188 void bnx2x_dcbx_set_state(struct bnx2x *bp, bool dcb_on, u32 dcbx_enabled);
0189
0190 enum {
0191     BNX2X_DCBX_STATE_NEG_RECEIVED = 0x1,
0192     BNX2X_DCBX_STATE_TX_PAUSED,
0193     BNX2X_DCBX_STATE_TX_RELEASED
0194 };
0195
0196 void bnx2x_dcbx_set_params(struct bnx2x *bp, u32 state);
0197 void bnx2x_dcbx_pmf_update(struct bnx2x *bp);
0198 /* DCB netlink */
0199 #ifdef BCM_DCBNL
0200 extern const struct dcbnl_rtnl_ops bnx2x_dcbnl_ops;
0201 int bnx2x_dcbnl_update_applist(struct bnx2x *bp, bool delall);
0202 #endif /* BCM_DCBNL */
0203
0204 int bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp);
0205 int bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp);
0206
0207 #endif /* BNX2X_DCB_H */