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0010 #ifndef __XGENE_ENET_V2_ENET_H__
0011 #define __XGENE_ENET_V2_ENET_H__
0012
0013 #define ENET_CLKEN 0xc008
0014 #define ENET_SRST 0xc000
0015 #define ENET_SHIM 0xc010
0016 #define CFG_MEM_RAM_SHUTDOWN 0xd070
0017 #define BLOCK_MEM_RDY 0xd074
0018
0019 #define MEM_RDY 0xffffffff
0020 #define DEVM_ARAUX_COH BIT(19)
0021 #define DEVM_AWAUX_COH BIT(3)
0022
0023 #define CFG_FORCE_LINK_STATUS_EN 0x229c
0024 #define FORCE_LINK_STATUS 0x22a0
0025 #define CFG_LINK_AGGR_RESUME 0x27c8
0026 #define RX_DV_GATE_REG 0x2dfc
0027
0028 void xge_wr_csr(struct xge_pdata *pdata, u32 offset, u32 val);
0029 u32 xge_rd_csr(struct xge_pdata *pdata, u32 offset);
0030 int xge_port_reset(struct net_device *ndev);
0031 void xge_port_init(struct net_device *ndev);
0032
0033 #endif