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0001 /* 0002 * AMD 10Gb Ethernet driver 0003 * 0004 * This file is available to you under your choice of the following two 0005 * licenses: 0006 * 0007 * License 1: GPLv2 0008 * 0009 * Copyright (c) 2014 Advanced Micro Devices, Inc. 0010 * 0011 * This file is free software; you may copy, redistribute and/or modify 0012 * it under the terms of the GNU General Public License as published by 0013 * the Free Software Foundation, either version 2 of the License, or (at 0014 * your option) any later version. 0015 * 0016 * This file is distributed in the hope that it will be useful, but 0017 * WITHOUT ANY WARRANTY; without even the implied warranty of 0018 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 0019 * General Public License for more details. 0020 * 0021 * You should have received a copy of the GNU General Public License 0022 * along with this program. If not, see <http://www.gnu.org/licenses/>. 0023 * 0024 * This file incorporates work covered by the following copyright and 0025 * permission notice: 0026 * The Synopsys DWC ETHER XGMAC Software Driver and documentation 0027 * (hereinafter "Software") is an unsupported proprietary work of Synopsys, 0028 * Inc. unless otherwise expressly agreed to in writing between Synopsys 0029 * and you. 0030 * 0031 * The Software IS NOT an item of Licensed Software or Licensed Product 0032 * under any End User Software License Agreement or Agreement for Licensed 0033 * Product with Synopsys or any supplement thereto. Permission is hereby 0034 * granted, free of charge, to any person obtaining a copy of this software 0035 * annotated with this license and the Software, to deal in the Software 0036 * without restriction, including without limitation the rights to use, 0037 * copy, modify, merge, publish, distribute, sublicense, and/or sell copies 0038 * of the Software, and to permit persons to whom the Software is furnished 0039 * to do so, subject to the following conditions: 0040 * 0041 * The above copyright notice and this permission notice shall be included 0042 * in all copies or substantial portions of the Software. 0043 * 0044 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" 0045 * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 0046 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 0047 * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS 0048 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 0049 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 0050 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 0051 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 0052 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 0053 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 0054 * THE POSSIBILITY OF SUCH DAMAGE. 0055 * 0056 * 0057 * License 2: Modified BSD 0058 * 0059 * Copyright (c) 2014 Advanced Micro Devices, Inc. 0060 * All rights reserved. 0061 * 0062 * Redistribution and use in source and binary forms, with or without 0063 * modification, are permitted provided that the following conditions are met: 0064 * * Redistributions of source code must retain the above copyright 0065 * notice, this list of conditions and the following disclaimer. 0066 * * Redistributions in binary form must reproduce the above copyright 0067 * notice, this list of conditions and the following disclaimer in the 0068 * documentation and/or other materials provided with the distribution. 0069 * * Neither the name of Advanced Micro Devices, Inc. nor the 0070 * names of its contributors may be used to endorse or promote products 0071 * derived from this software without specific prior written permission. 0072 * 0073 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 0074 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 0075 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 0076 * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY 0077 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 0078 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 0079 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 0080 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 0081 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 0082 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 0083 * 0084 * This file incorporates work covered by the following copyright and 0085 * permission notice: 0086 * The Synopsys DWC ETHER XGMAC Software Driver and documentation 0087 * (hereinafter "Software") is an unsupported proprietary work of Synopsys, 0088 * Inc. unless otherwise expressly agreed to in writing between Synopsys 0089 * and you. 0090 * 0091 * The Software IS NOT an item of Licensed Software or Licensed Product 0092 * under any End User Software License Agreement or Agreement for Licensed 0093 * Product with Synopsys or any supplement thereto. Permission is hereby 0094 * granted, free of charge, to any person obtaining a copy of this software 0095 * annotated with this license and the Software, to deal in the Software 0096 * without restriction, including without limitation the rights to use, 0097 * copy, modify, merge, publish, distribute, sublicense, and/or sell copies 0098 * of the Software, and to permit persons to whom the Software is furnished 0099 * to do so, subject to the following conditions: 0100 * 0101 * The above copyright notice and this permission notice shall be included 0102 * in all copies or substantial portions of the Software. 0103 * 0104 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" 0105 * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 0106 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 0107 * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS 0108 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 0109 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 0110 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 0111 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 0112 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 0113 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 0114 * THE POSSIBILITY OF SUCH DAMAGE. 0115 */ 0116 0117 #include <linux/clk.h> 0118 #include <linux/clocksource.h> 0119 #include <linux/ptp_clock_kernel.h> 0120 #include <linux/net_tstamp.h> 0121 0122 #include "xgbe.h" 0123 #include "xgbe-common.h" 0124 0125 static u64 xgbe_cc_read(const struct cyclecounter *cc) 0126 { 0127 struct xgbe_prv_data *pdata = container_of(cc, 0128 struct xgbe_prv_data, 0129 tstamp_cc); 0130 u64 nsec; 0131 0132 nsec = pdata->hw_if.get_tstamp_time(pdata); 0133 0134 return nsec; 0135 } 0136 0137 static int xgbe_adjfreq(struct ptp_clock_info *info, s32 delta) 0138 { 0139 struct xgbe_prv_data *pdata = container_of(info, 0140 struct xgbe_prv_data, 0141 ptp_clock_info); 0142 unsigned long flags; 0143 u64 adjust; 0144 u32 addend, diff; 0145 unsigned int neg_adjust = 0; 0146 0147 if (delta < 0) { 0148 neg_adjust = 1; 0149 delta = -delta; 0150 } 0151 0152 adjust = pdata->tstamp_addend; 0153 adjust *= delta; 0154 diff = div_u64(adjust, 1000000000UL); 0155 0156 addend = (neg_adjust) ? pdata->tstamp_addend - diff : 0157 pdata->tstamp_addend + diff; 0158 0159 spin_lock_irqsave(&pdata->tstamp_lock, flags); 0160 0161 pdata->hw_if.update_tstamp_addend(pdata, addend); 0162 0163 spin_unlock_irqrestore(&pdata->tstamp_lock, flags); 0164 0165 return 0; 0166 } 0167 0168 static int xgbe_adjtime(struct ptp_clock_info *info, s64 delta) 0169 { 0170 struct xgbe_prv_data *pdata = container_of(info, 0171 struct xgbe_prv_data, 0172 ptp_clock_info); 0173 unsigned long flags; 0174 0175 spin_lock_irqsave(&pdata->tstamp_lock, flags); 0176 timecounter_adjtime(&pdata->tstamp_tc, delta); 0177 spin_unlock_irqrestore(&pdata->tstamp_lock, flags); 0178 0179 return 0; 0180 } 0181 0182 static int xgbe_gettime(struct ptp_clock_info *info, struct timespec64 *ts) 0183 { 0184 struct xgbe_prv_data *pdata = container_of(info, 0185 struct xgbe_prv_data, 0186 ptp_clock_info); 0187 unsigned long flags; 0188 u64 nsec; 0189 0190 spin_lock_irqsave(&pdata->tstamp_lock, flags); 0191 0192 nsec = timecounter_read(&pdata->tstamp_tc); 0193 0194 spin_unlock_irqrestore(&pdata->tstamp_lock, flags); 0195 0196 *ts = ns_to_timespec64(nsec); 0197 0198 return 0; 0199 } 0200 0201 static int xgbe_settime(struct ptp_clock_info *info, 0202 const struct timespec64 *ts) 0203 { 0204 struct xgbe_prv_data *pdata = container_of(info, 0205 struct xgbe_prv_data, 0206 ptp_clock_info); 0207 unsigned long flags; 0208 u64 nsec; 0209 0210 nsec = timespec64_to_ns(ts); 0211 0212 spin_lock_irqsave(&pdata->tstamp_lock, flags); 0213 0214 timecounter_init(&pdata->tstamp_tc, &pdata->tstamp_cc, nsec); 0215 0216 spin_unlock_irqrestore(&pdata->tstamp_lock, flags); 0217 0218 return 0; 0219 } 0220 0221 static int xgbe_enable(struct ptp_clock_info *info, 0222 struct ptp_clock_request *request, int on) 0223 { 0224 return -EOPNOTSUPP; 0225 } 0226 0227 void xgbe_ptp_register(struct xgbe_prv_data *pdata) 0228 { 0229 struct ptp_clock_info *info = &pdata->ptp_clock_info; 0230 struct ptp_clock *clock; 0231 struct cyclecounter *cc = &pdata->tstamp_cc; 0232 u64 dividend; 0233 0234 snprintf(info->name, sizeof(info->name), "%s", 0235 netdev_name(pdata->netdev)); 0236 info->owner = THIS_MODULE; 0237 info->max_adj = pdata->ptpclk_rate; 0238 info->adjfreq = xgbe_adjfreq; 0239 info->adjtime = xgbe_adjtime; 0240 info->gettime64 = xgbe_gettime; 0241 info->settime64 = xgbe_settime; 0242 info->enable = xgbe_enable; 0243 0244 clock = ptp_clock_register(info, pdata->dev); 0245 if (IS_ERR(clock)) { 0246 dev_err(pdata->dev, "ptp_clock_register failed\n"); 0247 return; 0248 } 0249 0250 pdata->ptp_clock = clock; 0251 0252 /* Calculate the addend: 0253 * addend = 2^32 / (PTP ref clock / 50Mhz) 0254 * = (2^32 * 50Mhz) / PTP ref clock 0255 */ 0256 dividend = 50000000; 0257 dividend <<= 32; 0258 pdata->tstamp_addend = div_u64(dividend, pdata->ptpclk_rate); 0259 0260 /* Setup the timecounter */ 0261 cc->read = xgbe_cc_read; 0262 cc->mask = CLOCKSOURCE_MASK(64); 0263 cc->mult = 1; 0264 cc->shift = 0; 0265 0266 timecounter_init(&pdata->tstamp_tc, &pdata->tstamp_cc, 0267 ktime_to_ns(ktime_get_real())); 0268 0269 /* Disable all timestamping to start */ 0270 XGMAC_IOWRITE(pdata, MAC_TSCR, 0); 0271 pdata->tstamp_config.tx_type = HWTSTAMP_TX_OFF; 0272 pdata->tstamp_config.rx_filter = HWTSTAMP_FILTER_NONE; 0273 } 0274 0275 void xgbe_ptp_unregister(struct xgbe_prv_data *pdata) 0276 { 0277 if (pdata->ptp_clock) 0278 ptp_clock_unregister(pdata->ptp_clock); 0279 }
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