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OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /* Random defines and structures for the HP Lance driver.
0003  * Copyright (C) 05/1998 Peter Maydell <pmaydell@chiark.greenend.org.uk>
0004  * Based on the Sun Lance driver and the NetBSD HP Lance driver
0005  */
0006 
0007 /* Registers */
0008 #define HPLANCE_ID      0x01        /* DIO register: ID byte */
0009 #define HPLANCE_STATUS      0x03        /* DIO register: interrupt enable/status */
0010 
0011 /* Control and status bits for the status register */
0012 #define LE_IE 0x80                                /* interrupt enable */
0013 #define LE_IR 0x40                                /* interrupt requested */
0014 #define LE_LOCK 0x08                              /* lock status register */
0015 #define LE_ACK 0x04                               /* ack of lock */
0016 #define LE_JAB 0x02                               /* loss of tx clock (???) */
0017 /* We can also extract the IPL from the status register with the standard
0018  * DIO_IPL(hplance) macro, or using dio_scodetoipl()
0019  */
0020 
0021 /* These are the offsets for the DIO regs (hplance_reg), lance_ioreg,
0022  * memory and NVRAM:
0023  */
0024 #define HPLANCE_IDOFF 0                           /* board baseaddr */
0025 #define HPLANCE_REGOFF 0x4000                     /* lance registers */
0026 #define HPLANCE_MEMOFF 0x8000                     /* struct lance_init_block */
0027 #define HPLANCE_NVRAMOFF 0xC008                   /* etheraddress as one *nibble* per byte */