ethernet/amd/atarilance.c

0001 /* atarilance.c: Ethernet driver for VME Lance cards on the Atari */
0002 /*
0003     Written 1995/96 by Roman Hodek (Roman.Hodek@informatik.uni-erlangen.de)
0004
0005     This software may be used and distributed according to the terms
0006     of the GNU General Public License, incorporated herein by reference.
0007
0008     This drivers was written with the following sources of reference:
0009      - The driver for the Riebl Lance card by the TU Vienna.
0010      - The modified TUW driver for PAM's VME cards
0011      - The PC-Linux driver for Lance cards (but this is for bus master
0012        cards, not the shared memory ones)
0013      - The Amiga Ariadne driver
0014
0015     v1.0: (in 1.2.13pl4/0.9.13)
0016           Initial version
0017     v1.1: (in 1.2.13pl5)
0018           more comments
0019           deleted some debugging stuff
0020           optimized register access (keep AREG pointing to CSR0)
0021           following AMD, CSR0_STRT should be set only after IDON is detected
0022           use memcpy() for data transfers, that also employs long word moves
0023           better probe procedure for 24-bit systems
0024           non-VME-RieblCards need extra delays in memcpy
0025           must also do write test, since 0xfxe00000 may hit ROM
0026           use 8/32 tx/rx buffers, which should give better NFS performance;
0027             this is made possible by shifting the last packet buffer after the
0028             RieblCard reserved area
0029     v1.2: (in 1.2.13pl8)
0030           again fixed probing for the Falcon; 0xfe01000 hits phys. 0x00010000
0031           and thus RAM, in case of no Lance found all memory contents have to
0032           be restored!
0033           Now possible to compile as module.
0034     v1.3: 03/30/96 Jes Sorensen, Roman (in 1.3)
0035           Several little 1.3 adaptions
0036           When the lance is stopped it jumps back into little-endian
0037           mode. It is therefore necessary to put it back where it
0038           belongs, in big endian mode, in order to make things work.
0039           This might be the reason why multicast-mode didn't work
0040           before, but I'm not able to test it as I only got an Amiga
0041           (we had similar problems with the A2065 driver).
0042
0043 */
0044
0045 static const char version[] = "atarilance.c: v1.3 04/04/96 "
0046                   "Roman.Hodek@informatik.uni-erlangen.de\n";
0047
0048 #include <linux/netdevice.h>
0049 #include <linux/etherdevice.h>
0050 #include <linux/module.h>
0051 #include <linux/stddef.h>
0052 #include <linux/kernel.h>
0053 #include <linux/string.h>
0054 #include <linux/errno.h>
0055 #include <linux/skbuff.h>
0056 #include <linux/interrupt.h>
0057 #include <linux/init.h>
0058 #include <linux/bitops.h>
0059
0060 #include <asm/setup.h>
0061 #include <asm/irq.h>
0062 #include <asm/atarihw.h>
0063 #include <asm/atariints.h>
0064 #include <asm/io.h>
0065
0066 /* Debug level:
0067  *  0 = silent, print only serious errors
0068  *  1 = normal, print error messages
0069  *  2 = debug, print debug infos
0070  *  3 = debug, print even more debug infos (packet data)
0071  */
0072
0073 #define LANCE_DEBUG 1
0074
0075 #ifdef LANCE_DEBUG
0076 static int lance_debug = LANCE_DEBUG;
0077 #else
0078 static int lance_debug = 1;
0079 #endif
0080 module_param(lance_debug, int, 0);
0081 MODULE_PARM_DESC(lance_debug, "atarilance debug level (0-3)");
0082 MODULE_LICENSE("GPL");
0083
0084 /* Print debug messages on probing? */
0085 #undef LANCE_DEBUG_PROBE
0086
0087 #define DPRINTK(n,a)                            \
0088     do {                                        \
0089         if (lance_debug >= n)                   \
0090             printk a;                           \
0091     } while( 0 )
0092
0093 #ifdef LANCE_DEBUG_PROBE
0094 # define PROBE_PRINT(a) printk a
0095 #else
0096 # define PROBE_PRINT(a)
0097 #endif
0098
0099 /* These define the number of Rx and Tx buffers as log2. (Only powers
0100  * of two are valid)
0101  * Much more rx buffers (32) are reserved than tx buffers (8), since receiving
0102  * is more time critical then sending and packets may have to remain in the
0103  * board's memory when main memory is low.
0104  */
0105
0106 #define TX_LOG_RING_SIZE            3
0107 #define RX_LOG_RING_SIZE            5
0108
0109 /* These are the derived values */
0110
0111 #define TX_RING_SIZE            (1 << TX_LOG_RING_SIZE)
0112 #define TX_RING_LEN_BITS        (TX_LOG_RING_SIZE << 5)
0113 #define TX_RING_MOD_MASK        (TX_RING_SIZE - 1)
0114
0115 #define RX_RING_SIZE            (1 << RX_LOG_RING_SIZE)
0116 #define RX_RING_LEN_BITS        (RX_LOG_RING_SIZE << 5)
0117 #define RX_RING_MOD_MASK        (RX_RING_SIZE - 1)
0118
0119 #define TX_TIMEOUT  (HZ/5)
0120
0121 /* The LANCE Rx and Tx ring descriptors. */
0122 struct lance_rx_head {
0123     unsigned short          base;       /* Low word of base addr */
0124     volatile unsigned char  flag;
0125     unsigned char           base_hi;    /* High word of base addr (unused) */
0126     short                   buf_length; /* This length is 2s complement! */
0127     volatile short          msg_length; /* This length is "normal". */
0128 };
0129
0130 struct lance_tx_head {
0131     unsigned short          base;       /* Low word of base addr */
0132     volatile unsigned char  flag;
0133     unsigned char           base_hi;    /* High word of base addr (unused) */
0134     short                   length;     /* Length is 2s complement! */
0135     volatile short          misc;
0136 };
0137
0138 struct ringdesc {
0139     unsigned short  adr_lo;     /* Low 16 bits of address */
0140     unsigned char   len;        /* Length bits */
0141     unsigned char   adr_hi;     /* High 8 bits of address (unused) */
0142 };
0143
0144 /* The LANCE initialization block, described in databook. */
0145 struct lance_init_block {
0146     unsigned short  mode;       /* Pre-set mode */
0147     unsigned char   hwaddr[6];  /* Physical ethernet address */
0148     unsigned        filter[2];  /* Multicast filter (unused). */
0149     /* Receive and transmit ring base, along with length bits. */
0150     struct ringdesc rx_ring;
0151     struct ringdesc tx_ring;
0152 };
0153
0154 /* The whole layout of the Lance shared memory */
0155 struct lance_memory {
0156     struct lance_init_block init;
0157     struct lance_tx_head    tx_head[TX_RING_SIZE];
0158     struct lance_rx_head    rx_head[RX_RING_SIZE];
0159     char                    packet_area[];  /* packet data follow after the
0160                                              * init block and the ring
0161                                              * descriptors and are located
0162                                              * at runtime */
0163 };
0164
0165 /* RieblCard specifics:
0166  * The original TOS driver for these cards reserves the area from offset
0167  * 0xee70 to 0xeebb for storing configuration data. Of interest to us is the
0168  * Ethernet address there, and the magic for verifying the data's validity.
0169  * The reserved area isn't touch by packet buffers. Furthermore, offset 0xfffe
0170  * is reserved for the interrupt vector number.
0171  */
0172 #define RIEBL_RSVD_START    0xee70
0173 #define RIEBL_RSVD_END      0xeec0
0174 #define RIEBL_MAGIC         0x09051990
0175 #define RIEBL_MAGIC_ADDR    ((unsigned long *)(((char *)MEM) + 0xee8a))
0176 #define RIEBL_HWADDR_ADDR   ((unsigned char *)(((char *)MEM) + 0xee8e))
0177 #define RIEBL_IVEC_ADDR     ((unsigned short *)(((char *)MEM) + 0xfffe))
0178
0179 /* This is a default address for the old RieblCards without a battery
0180  * that have no ethernet address at boot time. 00:00:36:04 is the
0181  * prefix for Riebl cards, the 00:00 at the end is arbitrary.
0182  */
0183
0184 static unsigned char OldRieblDefHwaddr[6] = {
0185     0x00, 0x00, 0x36, 0x04, 0x00, 0x00
0186 };
0187
0188
0189 /* I/O registers of the Lance chip */
0190
0191 struct lance_ioreg {
0192 /* base+0x0 */  volatile unsigned short data;
0193 /* base+0x2 */  volatile unsigned short addr;
0194                 unsigned char           _dummy1[3];
0195 /* base+0x7 */  volatile unsigned char  ivec;
0196                 unsigned char           _dummy2[5];
0197 /* base+0xd */  volatile unsigned char  eeprom;
0198                 unsigned char           _dummy3;
0199 /* base+0xf */  volatile unsigned char  mem;
0200 };
0201
0202 /* Types of boards this driver supports */
0203
0204 enum lance_type {
0205     OLD_RIEBL,      /* old Riebl card without battery */
0206     NEW_RIEBL,      /* new Riebl card with battery */
0207     PAM_CARD        /* PAM card with EEPROM */
0208 };
0209
0210 static char *lance_names[] = {
0211     "Riebl-Card (without battery)",
0212     "Riebl-Card (with battery)",
0213     "PAM intern card"
0214 };
0215
0216 /* The driver's private device structure */
0217
0218 struct lance_private {
0219     enum lance_type     cardtype;
0220     struct lance_ioreg  *iobase;
0221     struct lance_memory *mem;
0222     int         cur_rx, cur_tx; /* The next free ring entry */
0223     int         dirty_tx;       /* Ring entries to be freed. */
0224                 /* copy function */
0225     void            *(*memcpy_f)( void *, const void *, size_t );
0226 /* This must be long for set_bit() */
0227     long            tx_full;
0228     spinlock_t      devlock;
0229 };
0230
0231 /* I/O register access macros */
0232
0233 #define MEM     lp->mem
0234 #define DREG    IO->data
0235 #define AREG    IO->addr
0236 #define REGA(a) (*( AREG = (a), &DREG ))
0237
0238 /* Definitions for packet buffer access: */
0239 #define PKT_BUF_SZ      1544
0240 /* Get the address of a packet buffer corresponding to a given buffer head */
0241 #define PKTBUF_ADDR(head)   (((unsigned char *)(MEM)) + (head)->base)
0242
0243 /* Possible memory/IO addresses for probing */
0244
0245 static struct lance_addr {
0246     unsigned long   memaddr;
0247     unsigned long   ioaddr;
0248     int             slow_flag;
0249 } lance_addr_list[] = {
0250     { 0xfe010000, 0xfe00fff0, 0 },  /* RieblCard VME in TT */
0251     { 0xffc10000, 0xffc0fff0, 0 },  /* RieblCard VME in MegaSTE
0252                                        (highest byte stripped) */
0253     { 0xffe00000, 0xffff7000, 1 },  /* RieblCard in ST
0254                                        (highest byte stripped) */
0255     { 0xffd00000, 0xffff7000, 1 },  /* RieblCard in ST with hw modif. to
0256                                        avoid conflict with ROM
0257                                        (highest byte stripped) */
0258     { 0xffcf0000, 0xffcffff0, 0 },  /* PAMCard VME in TT and MSTE
0259                                        (highest byte stripped) */
0260     { 0xfecf0000, 0xfecffff0, 0 },  /* Rhotron's PAMCard VME in TT and MSTE
0261                                        (highest byte stripped) */
0262 };
0263
0264 #define N_LANCE_ADDR    ARRAY_SIZE(lance_addr_list)
0265
0266
0267 /* Definitions for the Lance */
0268
0269 /* tx_head flags */
0270 #define TMD1_ENP        0x01    /* end of packet */
0271 #define TMD1_STP        0x02    /* start of packet */
0272 #define TMD1_DEF        0x04    /* deferred */
0273 #define TMD1_ONE        0x08    /* one retry needed */
0274 #define TMD1_MORE       0x10    /* more than one retry needed */
0275 #define TMD1_ERR        0x40    /* error summary */
0276 #define TMD1_OWN        0x80    /* ownership (set: chip owns) */
0277
0278 #define TMD1_OWN_CHIP   TMD1_OWN
0279 #define TMD1_OWN_HOST   0
0280
0281 /* tx_head misc field */
0282 #define TMD3_TDR        0x03FF  /* Time Domain Reflectometry counter */
0283 #define TMD3_RTRY       0x0400  /* failed after 16 retries */
0284 #define TMD3_LCAR       0x0800  /* carrier lost */
0285 #define TMD3_LCOL       0x1000  /* late collision */
0286 #define TMD3_UFLO       0x4000  /* underflow (late memory) */
0287 #define TMD3_BUFF       0x8000  /* buffering error (no ENP) */
0288
0289 /* rx_head flags */
0290 #define RMD1_ENP        0x01    /* end of packet */
0291 #define RMD1_STP        0x02    /* start of packet */
0292 #define RMD1_BUFF       0x04    /* buffer error */
0293 #define RMD1_CRC        0x08    /* CRC error */
0294 #define RMD1_OFLO       0x10    /* overflow */
0295 #define RMD1_FRAM       0x20    /* framing error */
0296 #define RMD1_ERR        0x40    /* error summary */
0297 #define RMD1_OWN        0x80    /* ownership (set: ship owns) */
0298
0299 #define RMD1_OWN_CHIP   RMD1_OWN
0300 #define RMD1_OWN_HOST   0
0301
0302 /* register names */
0303 #define CSR0    0       /* mode/status */
0304 #define CSR1    1       /* init block addr (low) */
0305 #define CSR2    2       /* init block addr (high) */
0306 #define CSR3    3       /* misc */
0307 #define CSR8    8       /* address filter */
0308 #define CSR15   15      /* promiscuous mode */
0309
0310 /* CSR0 */
0311 /* (R=readable, W=writeable, S=set on write, C=clear on write) */
0312 #define CSR0_INIT   0x0001      /* initialize (RS) */
0313 #define CSR0_STRT   0x0002      /* start (RS) */
0314 #define CSR0_STOP   0x0004      /* stop (RS) */
0315 #define CSR0_TDMD   0x0008      /* transmit demand (RS) */
0316 #define CSR0_TXON   0x0010      /* transmitter on (R) */
0317 #define CSR0_RXON   0x0020      /* receiver on (R) */
0318 #define CSR0_INEA   0x0040      /* interrupt enable (RW) */
0319 #define CSR0_INTR   0x0080      /* interrupt active (R) */
0320 #define CSR0_IDON   0x0100      /* initialization done (RC) */
0321 #define CSR0_TINT   0x0200      /* transmitter interrupt (RC) */
0322 #define CSR0_RINT   0x0400      /* receiver interrupt (RC) */
0323 #define CSR0_MERR   0x0800      /* memory error (RC) */
0324 #define CSR0_MISS   0x1000      /* missed frame (RC) */
0325 #define CSR0_CERR   0x2000      /* carrier error (no heartbeat :-) (RC) */
0326 #define CSR0_BABL   0x4000      /* babble: tx-ed too many bits (RC) */
0327 #define CSR0_ERR    0x8000      /* error (RC) */
0328
0329 /* CSR3 */
0330 #define CSR3_BCON   0x0001      /* byte control */
0331 #define CSR3_ACON   0x0002      /* ALE control */
0332 #define CSR3_BSWP   0x0004      /* byte swap (1=big endian) */
0333
0334
0335
0336 /***************************** Prototypes *****************************/
0337
0338 static unsigned long lance_probe1( struct net_device *dev, struct lance_addr
0339                                    *init_rec );
0340 static int lance_open( struct net_device *dev );
0341 static void lance_init_ring( struct net_device *dev );
0342 static netdev_tx_t lance_start_xmit(struct sk_buff *skb,
0343                     struct net_device *dev);
0344 static irqreturn_t lance_interrupt( int irq, void *dev_id );
0345 static int lance_rx( struct net_device *dev );
0346 static int lance_close( struct net_device *dev );
0347 static void set_multicast_list( struct net_device *dev );
0348 static int lance_set_mac_address( struct net_device *dev, void *addr );
0349 static void lance_tx_timeout (struct net_device *dev, unsigned int txqueue);
0350
0351 /************************* End of Prototypes **************************/
0352
0353
0354
0355
0356
0357 static void *slow_memcpy( void *dst, const void *src, size_t len )
0358
0359 {   char *cto = dst;
0360     const char *cfrom = src;
0361
0362     while( len-- ) {
0363         *cto++ = *cfrom++;
0364         MFPDELAY();
0365     }
0366     return dst;
0367 }
0368
0369
0370 struct net_device * __init atarilance_probe(void)
0371 {
0372     int i;
0373     static int found;
0374     struct net_device *dev;
0375     int err = -ENODEV;
0376
0377     if (!MACH_IS_ATARI || found)
0378         /* Assume there's only one board possible... That seems true, since
0379          * the Riebl/PAM board's address cannot be changed. */
0380         return ERR_PTR(-ENODEV);
0381
0382     dev = alloc_etherdev(sizeof(struct lance_private));
0383     if (!dev)
0384         return ERR_PTR(-ENOMEM);
0385
0386     for( i = 0; i < N_LANCE_ADDR; ++i ) {
0387         if (lance_probe1( dev, &lance_addr_list[i] )) {
0388             found = 1;
0389             err = register_netdev(dev);
0390             if (!err)
0391                 return dev;
0392             free_irq(dev->irq, dev);
0393             break;
0394         }
0395     }
0396     free_netdev(dev);
0397     return ERR_PTR(err);
0398 }
0399
0400
0401 /* Derived from hwreg_present() in atari/config.c: */
0402
0403 static noinline int __init addr_accessible(volatile void *regp, int wordflag,
0404                        int writeflag)
0405 {
0406     int     ret;
0407     unsigned long   flags;
0408     long    *vbr, save_berr;
0409
0410     local_irq_save(flags);
0411
0412     __asm__ __volatile__ ( "movec   %/vbr,%0" : "=r" (vbr) : );
0413     save_berr = vbr[2];
0414
0415     __asm__ __volatile__
0416     (   "movel  %/sp,%/d1\n\t"
0417         "movel  #Lberr,%2@\n\t"
0418         "moveq  #0,%0\n\t"
0419         "tstl   %3\n\t"
0420         "bne    1f\n\t"
0421         "moveb  %1@,%/d0\n\t"
0422         "nop    \n\t"
0423         "bra    2f\n"
0424 "1:      movew  %1@,%/d0\n\t"
0425         "nop    \n"
0426 "2:      tstl   %4\n\t"
0427         "beq    2f\n\t"
0428         "tstl   %3\n\t"
0429         "bne    1f\n\t"
0430         "clrb   %1@\n\t"
0431         "nop    \n\t"
0432         "moveb  %/d0,%1@\n\t"
0433         "nop    \n\t"
0434         "bra    2f\n"
0435 "1:      clrw   %1@\n\t"
0436         "nop    \n\t"
0437         "movew  %/d0,%1@\n\t"
0438         "nop    \n"
0439 "2:      moveq  #1,%0\n"
0440 "Lberr:  movel  %/d1,%/sp"
0441         : "=&d" (ret)
0442         : "a" (regp), "a" (&vbr[2]), "rm" (wordflag), "rm" (writeflag)
0443         : "d0", "d1", "memory"
0444     );
0445
0446     vbr[2] = save_berr;
0447     local_irq_restore(flags);
0448
0449     return ret;
0450 }
0451
0452 static const struct net_device_ops lance_netdev_ops = {
0453     .ndo_open       = lance_open,
0454     .ndo_stop       = lance_close,
0455     .ndo_start_xmit     = lance_start_xmit,
0456     .ndo_set_rx_mode    = set_multicast_list,
0457     .ndo_set_mac_address    = lance_set_mac_address,
0458     .ndo_tx_timeout     = lance_tx_timeout,
0459     .ndo_validate_addr  = eth_validate_addr,
0460 };
0461
0462 static unsigned long __init lance_probe1( struct net_device *dev,
0463                        struct lance_addr *init_rec )
0464 {
0465     volatile unsigned short *memaddr =
0466         (volatile unsigned short *)init_rec->memaddr;
0467     volatile unsigned short *ioaddr =
0468         (volatile unsigned short *)init_rec->ioaddr;
0469     struct lance_private    *lp;
0470     struct lance_ioreg      *IO;
0471     int                     i;
0472     static int              did_version;
0473     unsigned short          save1, save2;
0474     u8 addr[ETH_ALEN];
0475
0476     PROBE_PRINT(( "Probing for Lance card at mem %#lx io %#lx\n",
0477                   (long)memaddr, (long)ioaddr ));
0478
0479     /* Test whether memory readable and writable */
0480     PROBE_PRINT(( "lance_probe1: testing memory to be accessible\n" ));
0481     if (!addr_accessible( memaddr, 1, 1 )) goto probe_fail;
0482
0483     /* Written values should come back... */
0484     PROBE_PRINT(( "lance_probe1: testing memory to be writable (1)\n" ));
0485     save1 = *memaddr;
0486     *memaddr = 0x0001;
0487     if (*memaddr != 0x0001) goto probe_fail;
0488     PROBE_PRINT(( "lance_probe1: testing memory to be writable (2)\n" ));
0489     *memaddr = 0x0000;
0490     if (*memaddr != 0x0000) goto probe_fail;
0491     *memaddr = save1;
0492
0493     /* First port should be readable and writable */
0494     PROBE_PRINT(( "lance_probe1: testing ioport to be accessible\n" ));
0495     if (!addr_accessible( ioaddr, 1, 1 )) goto probe_fail;
0496
0497     /* and written values should be readable */
0498     PROBE_PRINT(( "lance_probe1: testing ioport to be writeable\n" ));
0499     save2 = ioaddr[1];
0500     ioaddr[1] = 0x0001;
0501     if (ioaddr[1] != 0x0001) goto probe_fail;
0502
0503     /* The CSR0_INIT bit should not be readable */
0504     PROBE_PRINT(( "lance_probe1: testing CSR0 register function (1)\n" ));
0505     save1 = ioaddr[0];
0506     ioaddr[1] = CSR0;
0507     ioaddr[0] = CSR0_INIT | CSR0_STOP;
0508     if (ioaddr[0] != CSR0_STOP) {
0509         ioaddr[0] = save1;
0510         ioaddr[1] = save2;
0511         goto probe_fail;
0512     }
0513     PROBE_PRINT(( "lance_probe1: testing CSR0 register function (2)\n" ));
0514     ioaddr[0] = CSR0_STOP;
0515     if (ioaddr[0] != CSR0_STOP) {
0516         ioaddr[0] = save1;
0517         ioaddr[1] = save2;
0518         goto probe_fail;
0519     }
0520
0521     /* Now ok... */
0522     PROBE_PRINT(( "lance_probe1: Lance card detected\n" ));
0523     goto probe_ok;
0524
0525   probe_fail:
0526     return 0;
0527
0528   probe_ok:
0529     lp = netdev_priv(dev);
0530     MEM = (struct lance_memory *)memaddr;
0531     IO = lp->iobase = (struct lance_ioreg *)ioaddr;
0532     dev->base_addr = (unsigned long)ioaddr; /* informational only */
0533     lp->memcpy_f = init_rec->slow_flag ? slow_memcpy : memcpy;
0534
0535     REGA( CSR0 ) = CSR0_STOP;
0536
0537     /* Now test for type: If the eeprom I/O port is readable, it is a
0538      * PAM card */
0539     if (addr_accessible( &(IO->eeprom), 0, 0 )) {
0540         /* Switch back to Ram */
0541         i = IO->mem;
0542         lp->cardtype = PAM_CARD;
0543     }
0544     else if (*RIEBL_MAGIC_ADDR == RIEBL_MAGIC) {
0545         lp->cardtype = NEW_RIEBL;
0546     }
0547     else
0548         lp->cardtype = OLD_RIEBL;
0549
0550     if (lp->cardtype == PAM_CARD ||
0551         memaddr == (unsigned short *)0xffe00000) {
0552         /* PAMs card and Riebl on ST use level 5 autovector */
0553         if (request_irq(IRQ_AUTO_5, lance_interrupt, 0,
0554                 "PAM,Riebl-ST Ethernet", dev)) {
0555             printk( "Lance: request for irq %d failed\n", IRQ_AUTO_5 );
0556             return 0;
0557         }
0558         dev->irq = IRQ_AUTO_5;
0559     }
0560     else {
0561         /* For VME-RieblCards, request a free VME int */
0562         unsigned int irq = atari_register_vme_int();
0563         if (!irq) {
0564             printk( "Lance: request for VME interrupt failed\n" );
0565             return 0;
0566         }
0567         if (request_irq(irq, lance_interrupt, 0, "Riebl-VME Ethernet",
0568                 dev)) {
0569             printk( "Lance: request for irq %u failed\n", irq );
0570             return 0;
0571         }
0572         dev->irq = irq;
0573     }
0574
0575     printk("%s: %s at io %#lx, mem %#lx, irq %d%s, hwaddr ",
0576            dev->name, lance_names[lp->cardtype],
0577            (unsigned long)ioaddr,
0578            (unsigned long)memaddr,
0579            dev->irq,
0580            init_rec->slow_flag ? " (slow memcpy)" : "" );
0581
0582     /* Get the ethernet address */
0583     switch( lp->cardtype ) {
0584       case OLD_RIEBL:
0585         /* No ethernet address! (Set some default address) */
0586         eth_hw_addr_set(dev, OldRieblDefHwaddr);
0587         break;
0588       case NEW_RIEBL:
0589         lp->memcpy_f(addr, RIEBL_HWADDR_ADDR, ETH_ALEN);
0590         eth_hw_addr_set(dev, addr);
0591         break;
0592       case PAM_CARD:
0593         i = IO->eeprom;
0594         for( i = 0; i < 6; ++i )
0595             addr[i] =
0596                 ((((unsigned short *)MEM)[i*2] & 0x0f) << 4) |
0597                 ((((unsigned short *)MEM)[i*2+1] & 0x0f));
0598         eth_hw_addr_set(dev, addr);
0599         i = IO->mem;
0600         break;
0601     }
0602     printk("%pM\n", dev->dev_addr);
0603     if (lp->cardtype == OLD_RIEBL) {
0604         printk( "%s: Warning: This is a default ethernet address!\n",
0605                 dev->name );
0606         printk( "      Use \"ifconfig hw ether ...\" to set the address.\n" );
0607     }
0608
0609     spin_lock_init(&lp->devlock);
0610
0611     MEM->init.mode = 0x0000;        /* Disable Rx and Tx. */
0612     for( i = 0; i < 6; i++ )
0613         MEM->init.hwaddr[i] = dev->dev_addr[i^1]; /* <- 16 bit swap! */
0614     MEM->init.filter[0] = 0x00000000;
0615     MEM->init.filter[1] = 0x00000000;
0616     MEM->init.rx_ring.adr_lo = offsetof( struct lance_memory, rx_head );
0617     MEM->init.rx_ring.adr_hi = 0;
0618     MEM->init.rx_ring.len    = RX_RING_LEN_BITS;
0619     MEM->init.tx_ring.adr_lo = offsetof( struct lance_memory, tx_head );
0620     MEM->init.tx_ring.adr_hi = 0;
0621     MEM->init.tx_ring.len    = TX_RING_LEN_BITS;
0622
0623     if (lp->cardtype == PAM_CARD)
0624         IO->ivec = IRQ_SOURCE_TO_VECTOR(dev->irq);
0625     else
0626         *RIEBL_IVEC_ADDR = IRQ_SOURCE_TO_VECTOR(dev->irq);
0627
0628     if (did_version++ == 0)
0629         DPRINTK( 1, ( version ));
0630
0631     dev->netdev_ops = &lance_netdev_ops;
0632
0633     /* XXX MSch */
0634     dev->watchdog_timeo = TX_TIMEOUT;
0635
0636     return 1;
0637 }
0638
0639
0640 static int lance_open( struct net_device *dev )
0641 {
0642     struct lance_private *lp = netdev_priv(dev);
0643     struct lance_ioreg   *IO = lp->iobase;
0644     int i;
0645
0646     DPRINTK( 2, ( "%s: lance_open()\n", dev->name ));
0647
0648     lance_init_ring(dev);
0649     /* Re-initialize the LANCE, and start it when done. */
0650
0651     REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0);
0652     REGA( CSR2 ) = 0;
0653     REGA( CSR1 ) = 0;
0654     REGA( CSR0 ) = CSR0_INIT;
0655     /* From now on, AREG is kept to point to CSR0 */
0656
0657     i = 1000000;
0658     while (--i > 0)
0659         if (DREG & CSR0_IDON)
0660             break;
0661     if (i <= 0 || (DREG & CSR0_ERR)) {
0662         DPRINTK( 2, ( "lance_open(): opening %s failed, i=%d, csr0=%04x\n",
0663                       dev->name, i, DREG ));
0664         DREG = CSR0_STOP;
0665         return -EIO;
0666     }
0667     DREG = CSR0_IDON;
0668     DREG = CSR0_STRT;
0669     DREG = CSR0_INEA;
0670
0671     netif_start_queue (dev);
0672
0673     DPRINTK( 2, ( "%s: LANCE is open, csr0 %04x\n", dev->name, DREG ));
0674
0675     return 0;
0676 }
0677
0678
0679 /* Initialize the LANCE Rx and Tx rings. */
0680
0681 static void lance_init_ring( struct net_device *dev )
0682 {
0683     struct lance_private *lp = netdev_priv(dev);
0684     int i;
0685     unsigned offset;
0686
0687     lp->tx_full = 0;
0688     lp->cur_rx = lp->cur_tx = 0;
0689     lp->dirty_tx = 0;
0690
0691     offset = offsetof( struct lance_memory, packet_area );
0692
0693 /* If the packet buffer at offset 'o' would conflict with the reserved area
0694  * of RieblCards, advance it */
0695 #define CHECK_OFFSET(o)                                                      \
0696     do {                                                                     \
0697         if (lp->cardtype == OLD_RIEBL || lp->cardtype == NEW_RIEBL) {        \
0698             if (((o) < RIEBL_RSVD_START) ? (o)+PKT_BUF_SZ > RIEBL_RSVD_START \
0699                                          : (o) < RIEBL_RSVD_END)             \
0700                 (o) = RIEBL_RSVD_END;                                        \
0701         }                                                                    \
0702     } while(0)
0703
0704     for( i = 0; i < TX_RING_SIZE; i++ ) {
0705         CHECK_OFFSET(offset);
0706         MEM->tx_head[i].base = offset;
0707         MEM->tx_head[i].flag = TMD1_OWN_HOST;
0708         MEM->tx_head[i].base_hi = 0;
0709         MEM->tx_head[i].length = 0;
0710         MEM->tx_head[i].misc = 0;
0711         offset += PKT_BUF_SZ;
0712     }
0713
0714     for( i = 0; i < RX_RING_SIZE; i++ ) {
0715         CHECK_OFFSET(offset);
0716         MEM->rx_head[i].base = offset;
0717         MEM->rx_head[i].flag = TMD1_OWN_CHIP;
0718         MEM->rx_head[i].base_hi = 0;
0719         MEM->rx_head[i].buf_length = -PKT_BUF_SZ;
0720         MEM->rx_head[i].msg_length = 0;
0721         offset += PKT_BUF_SZ;
0722     }
0723 }
0724
0725
0726 /* XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */
0727
0728
0729 static void lance_tx_timeout (struct net_device *dev, unsigned int txqueue)
0730 {
0731     struct lance_private *lp = netdev_priv(dev);
0732     struct lance_ioreg   *IO = lp->iobase;
0733
0734     AREG = CSR0;
0735     DPRINTK( 1, ( "%s: transmit timed out, status %04x, resetting.\n",
0736               dev->name, DREG ));
0737     DREG = CSR0_STOP;
0738     /*
0739      * Always set BSWP after a STOP as STOP puts it back into
0740      * little endian mode.
0741      */
0742     REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0);
0743     dev->stats.tx_errors++;
0744 #ifndef final_version
0745         {   int i;
0746             DPRINTK( 2, ( "Ring data: dirty_tx %d cur_tx %d%s cur_rx %d\n",
0747                           lp->dirty_tx, lp->cur_tx,
0748                           lp->tx_full ? " (full)" : "",
0749                           lp->cur_rx ));
0750             for( i = 0 ; i < RX_RING_SIZE; i++ )
0751                 DPRINTK( 2, ( "rx #%d: base=%04x blen=%04x mlen=%04x\n",
0752                               i, MEM->rx_head[i].base,
0753                               -MEM->rx_head[i].buf_length,
0754                               MEM->rx_head[i].msg_length ));
0755             for( i = 0 ; i < TX_RING_SIZE; i++ )
0756                 DPRINTK( 2, ( "tx #%d: base=%04x len=%04x misc=%04x\n",
0757                               i, MEM->tx_head[i].base,
0758                               -MEM->tx_head[i].length,
0759                               MEM->tx_head[i].misc ));
0760         }
0761 #endif
0762     /* XXX MSch: maybe purge/reinit ring here */
0763     /* lance_restart, essentially */
0764     lance_init_ring(dev);
0765     REGA( CSR0 ) = CSR0_INEA | CSR0_INIT | CSR0_STRT;
0766     netif_trans_update(dev); /* prevent tx timeout */
0767     netif_wake_queue(dev);
0768 }
0769
0770 /* XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */
0771
0772 static netdev_tx_t
0773 lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
0774 {
0775     struct lance_private *lp = netdev_priv(dev);
0776     struct lance_ioreg   *IO = lp->iobase;
0777     int entry, len;
0778     struct lance_tx_head *head;
0779     unsigned long flags;
0780
0781     DPRINTK( 2, ( "%s: lance_start_xmit() called, csr0 %4.4x.\n",
0782                   dev->name, DREG ));
0783
0784
0785     /* The old LANCE chips doesn't automatically pad buffers to min. size. */
0786     len = skb->len;
0787     if (len < ETH_ZLEN)
0788         len = ETH_ZLEN;
0789     /* PAM-Card has a bug: Can only send packets with even number of bytes! */
0790     else if (lp->cardtype == PAM_CARD && (len & 1))
0791         ++len;
0792
0793     if (len > skb->len) {
0794         if (skb_padto(skb, len))
0795             return NETDEV_TX_OK;
0796     }
0797
0798     netif_stop_queue (dev);
0799
0800     /* Fill in a Tx ring entry */
0801     if (lance_debug >= 3) {
0802         printk( "%s: TX pkt type 0x%04x from %pM to %pM"
0803                 " data at 0x%08x len %d\n",
0804                 dev->name, ((u_short *)skb->data)[6],
0805                 &skb->data[6], skb->data,
0806                 (int)skb->data, (int)skb->len );
0807     }
0808
0809     /* We're not prepared for the int until the last flags are set/reset. And
0810      * the int may happen already after setting the OWN_CHIP... */
0811     spin_lock_irqsave (&lp->devlock, flags);
0812
0813     /* Mask to ring buffer boundary. */
0814     entry = lp->cur_tx & TX_RING_MOD_MASK;
0815     head  = &(MEM->tx_head[entry]);
0816
0817     /* Caution: the write order is important here, set the "ownership" bits
0818      * last.
0819      */
0820
0821
0822     head->length = -len;
0823     head->misc = 0;
0824     lp->memcpy_f( PKTBUF_ADDR(head), (void *)skb->data, skb->len );
0825     head->flag = TMD1_OWN_CHIP | TMD1_ENP | TMD1_STP;
0826     dev->stats.tx_bytes += skb->len;
0827     dev_kfree_skb( skb );
0828     lp->cur_tx++;
0829     while( lp->cur_tx >= TX_RING_SIZE && lp->dirty_tx >= TX_RING_SIZE ) {
0830         lp->cur_tx -= TX_RING_SIZE;
0831         lp->dirty_tx -= TX_RING_SIZE;
0832     }
0833
0834     /* Trigger an immediate send poll. */
0835     DREG = CSR0_INEA | CSR0_TDMD;
0836
0837     if ((MEM->tx_head[(entry+1) & TX_RING_MOD_MASK].flag & TMD1_OWN) ==
0838         TMD1_OWN_HOST)
0839         netif_start_queue (dev);
0840     else
0841         lp->tx_full = 1;
0842     spin_unlock_irqrestore (&lp->devlock, flags);
0843
0844     return NETDEV_TX_OK;
0845 }
0846
0847 /* The LANCE interrupt handler. */
0848
0849 static irqreturn_t lance_interrupt( int irq, void *dev_id )
0850 {
0851     struct net_device *dev = dev_id;
0852     struct lance_private *lp;
0853     struct lance_ioreg   *IO;
0854     int csr0, boguscnt = 10;
0855     int handled = 0;
0856
0857     if (dev == NULL) {
0858         DPRINTK( 1, ( "lance_interrupt(): interrupt for unknown device.\n" ));
0859         return IRQ_NONE;
0860     }
0861
0862     lp = netdev_priv(dev);
0863     IO = lp->iobase;
0864     spin_lock (&lp->devlock);
0865
0866     AREG = CSR0;
0867
0868     while( ((csr0 = DREG) & (CSR0_ERR | CSR0_TINT | CSR0_RINT)) &&
0869            --boguscnt >= 0) {
0870         handled = 1;
0871         /* Acknowledge all of the current interrupt sources ASAP. */
0872         DREG = csr0 & ~(CSR0_INIT | CSR0_STRT | CSR0_STOP |
0873                                     CSR0_TDMD | CSR0_INEA);
0874
0875         DPRINTK( 2, ( "%s: interrupt  csr0=%04x new csr=%04x.\n",
0876                       dev->name, csr0, DREG ));
0877
0878         if (csr0 & CSR0_RINT)           /* Rx interrupt */
0879             lance_rx( dev );
0880
0881         if (csr0 & CSR0_TINT) {         /* Tx-done interrupt */
0882             int dirty_tx = lp->dirty_tx;
0883
0884             while( dirty_tx < lp->cur_tx) {
0885                 int entry = dirty_tx & TX_RING_MOD_MASK;
0886                 int status = MEM->tx_head[entry].flag;
0887
0888                 if (status & TMD1_OWN_CHIP)
0889                     break;          /* It still hasn't been Txed */
0890
0891                 MEM->tx_head[entry].flag = 0;
0892
0893                 if (status & TMD1_ERR) {
0894                     /* There was an major error, log it. */
0895                     int err_status = MEM->tx_head[entry].misc;
0896                     dev->stats.tx_errors++;
0897                     if (err_status & TMD3_RTRY) dev->stats.tx_aborted_errors++;
0898                     if (err_status & TMD3_LCAR) dev->stats.tx_carrier_errors++;
0899                     if (err_status & TMD3_LCOL) dev->stats.tx_window_errors++;
0900                     if (err_status & TMD3_UFLO) {
0901                         /* Ackk!  On FIFO errors the Tx unit is turned off! */
0902                         dev->stats.tx_fifo_errors++;
0903                         /* Remove this verbosity later! */
0904                         DPRINTK( 1, ( "%s: Tx FIFO error! Status %04x\n",
0905                                       dev->name, csr0 ));
0906                         /* Restart the chip. */
0907                         DREG = CSR0_STRT;
0908                     }
0909                 } else {
0910                     if (status & (TMD1_MORE | TMD1_ONE | TMD1_DEF))
0911                         dev->stats.collisions++;
0912                     dev->stats.tx_packets++;
0913                 }
0914
0915                 /* XXX MSch: free skb?? */
0916                 dirty_tx++;
0917             }
0918
0919 #ifndef final_version
0920             if (lp->cur_tx - dirty_tx >= TX_RING_SIZE) {
0921                 DPRINTK( 0, ( "out-of-sync dirty pointer,"
0922                               " %d vs. %d, full=%ld.\n",
0923                               dirty_tx, lp->cur_tx, lp->tx_full ));
0924                 dirty_tx += TX_RING_SIZE;
0925             }
0926 #endif
0927
0928             if (lp->tx_full && (netif_queue_stopped(dev)) &&
0929                 dirty_tx > lp->cur_tx - TX_RING_SIZE + 2) {
0930                 /* The ring is no longer full, clear tbusy. */
0931                 lp->tx_full = 0;
0932                 netif_wake_queue (dev);
0933             }
0934
0935             lp->dirty_tx = dirty_tx;
0936         }
0937
0938         /* Log misc errors. */
0939         if (csr0 & CSR0_BABL) dev->stats.tx_errors++; /* Tx babble. */
0940         if (csr0 & CSR0_MISS) dev->stats.rx_errors++; /* Missed a Rx frame. */
0941         if (csr0 & CSR0_MERR) {
0942             DPRINTK( 1, ( "%s: Bus master arbitration failure (?!?), "
0943                           "status %04x.\n", dev->name, csr0 ));
0944             /* Restart the chip. */
0945             DREG = CSR0_STRT;
0946         }
0947     }
0948
0949     /* Clear any other interrupt, and set interrupt enable. */
0950     DREG = CSR0_BABL | CSR0_CERR | CSR0_MISS | CSR0_MERR |
0951            CSR0_IDON | CSR0_INEA;
0952
0953     DPRINTK( 2, ( "%s: exiting interrupt, csr0=%#04x.\n",
0954                   dev->name, DREG ));
0955
0956     spin_unlock (&lp->devlock);
0957     return IRQ_RETVAL(handled);
0958 }
0959
0960
0961 static int lance_rx( struct net_device *dev )
0962 {
0963     struct lance_private *lp = netdev_priv(dev);
0964     int entry = lp->cur_rx & RX_RING_MOD_MASK;
0965     int i;
0966
0967     DPRINTK( 2, ( "%s: rx int, flag=%04x\n", dev->name,
0968                   MEM->rx_head[entry].flag ));
0969
0970     /* If we own the next entry, it's a new packet. Send it up. */
0971     while( (MEM->rx_head[entry].flag & RMD1_OWN) == RMD1_OWN_HOST ) {
0972         struct lance_rx_head *head = &(MEM->rx_head[entry]);
0973         int status = head->flag;
0974
0975         if (status != (RMD1_ENP|RMD1_STP)) {        /* There was an error. */
0976             /* There is a tricky error noted by John Murphy,
0977                <murf@perftech.com> to Russ Nelson: Even with full-sized
0978                buffers it's possible for a jabber packet to use two
0979                buffers, with only the last correctly noting the error. */
0980             if (status & RMD1_ENP)  /* Only count a general error at the */
0981                 dev->stats.rx_errors++; /* end of a packet.*/
0982             if (status & RMD1_FRAM) dev->stats.rx_frame_errors++;
0983             if (status & RMD1_OFLO) dev->stats.rx_over_errors++;
0984             if (status & RMD1_CRC) dev->stats.rx_crc_errors++;
0985             if (status & RMD1_BUFF) dev->stats.rx_fifo_errors++;
0986             head->flag &= (RMD1_ENP|RMD1_STP);
0987         } else {
0988             /* Malloc up new buffer, compatible with net-3. */
0989             short pkt_len = head->msg_length & 0xfff;
0990             struct sk_buff *skb;
0991
0992             if (pkt_len < 60) {
0993                 printk( "%s: Runt packet!\n", dev->name );
0994                 dev->stats.rx_errors++;
0995             }
0996             else {
0997                 skb = netdev_alloc_skb(dev, pkt_len + 2);
0998                 if (skb == NULL) {
0999                     for( i = 0; i < RX_RING_SIZE; i++ )
1000                         if (MEM->rx_head[(entry+i) & RX_RING_MOD_MASK].flag &
1001                             RMD1_OWN_CHIP)
1002                             break;
1003
1004                     if (i > RX_RING_SIZE - 2) {
1005                         dev->stats.rx_dropped++;
1006                         head->flag |= RMD1_OWN_CHIP;
1007                         lp->cur_rx++;
1008                     }
1009                     break;
1010                 }
1011
1012                 if (lance_debug >= 3) {
1013                     u_char *data = PKTBUF_ADDR(head);
1014
1015                     printk(KERN_DEBUG "%s: RX pkt type 0x%04x from %pM to %pM "
1016                            "data %8ph len %d\n",
1017                            dev->name, ((u_short *)data)[6],
1018                            &data[6], data, &data[15], pkt_len);
1019                 }
1020
1021                 skb_reserve( skb, 2 );  /* 16 byte align */
1022                 skb_put( skb, pkt_len );    /* Make room */
1023                 lp->memcpy_f( skb->data, PKTBUF_ADDR(head), pkt_len );
1024                 skb->protocol = eth_type_trans( skb, dev );
1025                 netif_rx( skb );
1026                 dev->stats.rx_packets++;
1027                 dev->stats.rx_bytes += pkt_len;
1028             }
1029         }
1030
1031         head->flag |= RMD1_OWN_CHIP;
1032         entry = (++lp->cur_rx) & RX_RING_MOD_MASK;
1033     }
1034     lp->cur_rx &= RX_RING_MOD_MASK;
1035
1036     /* From lance.c (Donald Becker): */
1037     /* We should check that at least two ring entries are free.  If not,
1038        we should free one and mark stats->rx_dropped++. */
1039
1040     return 0;
1041 }
1042
1043
1044 static int lance_close( struct net_device *dev )
1045 {
1046     struct lance_private *lp = netdev_priv(dev);
1047     struct lance_ioreg   *IO = lp->iobase;
1048
1049     netif_stop_queue (dev);
1050
1051     AREG = CSR0;
1052
1053     DPRINTK( 2, ( "%s: Shutting down ethercard, status was %2.2x.\n",
1054                   dev->name, DREG ));
1055
1056     /* We stop the LANCE here -- it occasionally polls
1057        memory if we don't. */
1058     DREG = CSR0_STOP;
1059
1060     return 0;
1061 }
1062
1063
1064 /* Set or clear the multicast filter for this adaptor.
1065    num_addrs == -1      Promiscuous mode, receive all packets
1066    num_addrs == 0       Normal mode, clear multicast list
1067    num_addrs > 0        Multicast mode, receive normal and MC packets, and do
1068                         best-effort filtering.
1069  */
1070
1071 static void set_multicast_list( struct net_device *dev )
1072 {
1073     struct lance_private *lp = netdev_priv(dev);
1074     struct lance_ioreg   *IO = lp->iobase;
1075
1076     if (netif_running(dev))
1077         /* Only possible if board is already started */
1078         return;
1079
1080     /* We take the simple way out and always enable promiscuous mode. */
1081     DREG = CSR0_STOP; /* Temporarily stop the lance. */
1082
1083     if (dev->flags & IFF_PROMISC) {
1084         /* Log any net taps. */
1085         DPRINTK( 2, ( "%s: Promiscuous mode enabled.\n", dev->name ));
1086         REGA( CSR15 ) = 0x8000; /* Set promiscuous mode */
1087     } else {
1088         short multicast_table[4];
1089         int num_addrs = netdev_mc_count(dev);
1090         int i;
1091         /* We don't use the multicast table, but rely on upper-layer
1092          * filtering. */
1093         memset( multicast_table, (num_addrs == 0) ? 0 : -1,
1094                 sizeof(multicast_table) );
1095         for( i = 0; i < 4; i++ )
1096             REGA( CSR8+i ) = multicast_table[i];
1097         REGA( CSR15 ) = 0; /* Unset promiscuous mode */
1098     }
1099
1100     /*
1101      * Always set BSWP after a STOP as STOP puts it back into
1102      * little endian mode.
1103      */
1104     REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0);
1105
1106     /* Resume normal operation and reset AREG to CSR0 */
1107     REGA( CSR0 ) = CSR0_IDON | CSR0_INEA | CSR0_STRT;
1108 }
1109
1110
1111 /* This is needed for old RieblCards and possible for new RieblCards */
1112
1113 static int lance_set_mac_address( struct net_device *dev, void *addr )
1114 {
1115     struct lance_private *lp = netdev_priv(dev);
1116     struct sockaddr *saddr = addr;
1117     int i;
1118
1119     if (lp->cardtype != OLD_RIEBL && lp->cardtype != NEW_RIEBL)
1120         return -EOPNOTSUPP;
1121
1122     if (netif_running(dev)) {
1123         /* Only possible while card isn't started */
1124         DPRINTK( 1, ( "%s: hwaddr can be set only while card isn't open.\n",
1125                       dev->name ));
1126         return -EIO;
1127     }
1128
1129     eth_hw_addr_set(dev, saddr->sa_data);
1130     for( i = 0; i < 6; i++ )
1131         MEM->init.hwaddr[i] = dev->dev_addr[i^1]; /* <- 16 bit swap! */
1132     lp->memcpy_f( RIEBL_HWADDR_ADDR, dev->dev_addr, 6 );
1133     /* set also the magic for future sessions */
1134     *RIEBL_MAGIC_ADDR = RIEBL_MAGIC;
1135
1136     return 0;
1137 }
1138
1139 static struct net_device *atarilance_dev;
1140
1141 static int __init atarilance_module_init(void)
1142 {
1143     atarilance_dev = atarilance_probe();
1144     return PTR_ERR_OR_ZERO(atarilance_dev);
1145 }
1146
1147 static void __exit atarilance_module_exit(void)
1148 {
1149     unregister_netdev(atarilance_dev);
1150     free_irq(atarilance_dev->irq, atarilance_dev);
1151     free_netdev(atarilance_dev);
1152 }
1153 module_init(atarilance_module_init);
1154 module_exit(atarilance_module_exit);