ethernet/amd/7990.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * 7990.c -- LANCE ethernet IC generic routines.
0004  * This is an attempt to separate out the bits of various ethernet
0005  * drivers that are common because they all use the AMD 7990 LANCE
0006  * (Local Area Network Controller for Ethernet) chip.
0007  *
0008  * Copyright (C) 05/1998 Peter Maydell <pmaydell@chiark.greenend.org.uk>
0009  *
0010  * Most of this stuff was obtained by looking at other LANCE drivers,
0011  * in particular a2065.[ch]. The AMD C-LANCE datasheet was also helpful.
0012  * NB: this was made easy by the fact that Jes Sorensen had cleaned up
0013  * most of a2025 and sunlance with the aim of merging them, so the
0014  * common code was pretty obvious.
0015  */
0016 #include <linux/crc32.h>
0017 #include <linux/delay.h>
0018 #include <linux/errno.h>
0019 #include <linux/netdevice.h>
0020 #include <linux/etherdevice.h>
0021 #include <linux/module.h>
0022 #include <linux/kernel.h>
0023 #include <linux/types.h>
0024 #include <linux/fcntl.h>
0025 #include <linux/interrupt.h>
0026 #include <linux/ioport.h>
0027 #include <linux/in.h>
0028 #include <linux/route.h>
0029 #include <linux/string.h>
0030 #include <linux/skbuff.h>
0031 #include <linux/pgtable.h>
0032 #include <asm/irq.h>
0033 /* Used for the temporal inet entries and routing */
0034 #include <linux/socket.h>
0035 #include <linux/bitops.h>
0036
0037 #include <asm/io.h>
0038 #include <asm/dma.h>
0039 #ifdef CONFIG_HP300
0040 #include <asm/blinken.h>
0041 #endif
0042
0043 #include "7990.h"
0044
0045 #define WRITERAP(lp, x) out_be16(lp->base + LANCE_RAP, (x))
0046 #define WRITERDP(lp, x) out_be16(lp->base + LANCE_RDP, (x))
0047 #define READRDP(lp) in_be16(lp->base + LANCE_RDP)
0048
0049 #if IS_ENABLED(CONFIG_HPLANCE)
0050 #include "hplance.h"
0051
0052 #undef WRITERAP
0053 #undef WRITERDP
0054 #undef READRDP
0055
0056 #if IS_ENABLED(CONFIG_MVME147_NET)
0057
0058 /* Lossage Factor Nine, Mr Sulu. */
0059 #define WRITERAP(lp, x) (lp->writerap(lp, x))
0060 #define WRITERDP(lp, x) (lp->writerdp(lp, x))
0061 #define READRDP(lp) (lp->readrdp(lp))
0062
0063 #else
0064
0065 /* These inlines can be used if only CONFIG_HPLANCE is defined */
0066 static inline void WRITERAP(struct lance_private *lp, __u16 value)
0067 {
0068     do {
0069         out_be16(lp->base + HPLANCE_REGOFF + LANCE_RAP, value);
0070     } while ((in_8(lp->base + HPLANCE_STATUS) & LE_ACK) == 0);
0071 }
0072
0073 static inline void WRITERDP(struct lance_private *lp, __u16 value)
0074 {
0075     do {
0076         out_be16(lp->base + HPLANCE_REGOFF + LANCE_RDP, value);
0077     } while ((in_8(lp->base + HPLANCE_STATUS) & LE_ACK) == 0);
0078 }
0079
0080 static inline __u16 READRDP(struct lance_private *lp)
0081 {
0082     __u16 value;
0083     do {
0084         value = in_be16(lp->base + HPLANCE_REGOFF + LANCE_RDP);
0085     } while ((in_8(lp->base + HPLANCE_STATUS) & LE_ACK) == 0);
0086     return value;
0087 }
0088
0089 #endif
0090 #endif /* IS_ENABLED(CONFIG_HPLANCE) */
0091
0092 /* debugging output macros, various flavours */
0093 /* #define TEST_HITS */
0094 #ifdef UNDEF
0095 #define PRINT_RINGS() \
0096 do { \
0097     int t; \
0098     for (t = 0; t < RX_RING_SIZE; t++) { \
0099         printk("R%d: @(%02X %04X) len %04X, mblen %04X, bits %02X\n", \
0100                t, ib->brx_ring[t].rmd1_hadr, ib->brx_ring[t].rmd0, \
0101                ib->brx_ring[t].length, \
0102                ib->brx_ring[t].mblength, ib->brx_ring[t].rmd1_bits); \
0103     } \
0104     for (t = 0; t < TX_RING_SIZE; t++) { \
0105         printk("T%d: @(%02X %04X) len %04X, misc %04X, bits %02X\n", \
0106                t, ib->btx_ring[t].tmd1_hadr, ib->btx_ring[t].tmd0, \
0107                ib->btx_ring[t].length, \
0108                ib->btx_ring[t].misc, ib->btx_ring[t].tmd1_bits); \
0109     } \
0110 } while (0)
0111 #else
0112 #define PRINT_RINGS()
0113 #endif
0114
0115 /* Load the CSR registers. The LANCE has to be STOPped when we do this! */
0116 static void load_csrs(struct lance_private *lp)
0117 {
0118     volatile struct lance_init_block *aib = lp->lance_init_block;
0119     int leptr;
0120
0121     leptr = LANCE_ADDR(aib);
0122
0123     WRITERAP(lp, LE_CSR1);                    /* load address of init block */
0124     WRITERDP(lp, leptr & 0xFFFF);
0125     WRITERAP(lp, LE_CSR2);
0126     WRITERDP(lp, leptr >> 16);
0127     WRITERAP(lp, LE_CSR3);
0128     WRITERDP(lp, lp->busmaster_regval);       /* set byteswap/ALEctrl/byte ctrl */
0129
0130     /* Point back to csr0 */
0131     WRITERAP(lp, LE_CSR0);
0132 }
0133
0134 /* #define to 0 or 1 appropriately */
0135 #define DEBUG_IRING 0
0136 /* Set up the Lance Rx and Tx rings and the init block */
0137 static void lance_init_ring(struct net_device *dev)
0138 {
0139     struct lance_private *lp = netdev_priv(dev);
0140     volatile struct lance_init_block *ib = lp->init_block;
0141     volatile struct lance_init_block *aib; /* for LANCE_ADDR computations */
0142     int leptr;
0143     int i;
0144
0145     aib = lp->lance_init_block;
0146
0147     lp->rx_new = lp->tx_new = 0;
0148     lp->rx_old = lp->tx_old = 0;
0149
0150     ib->mode = LE_MO_PROM;                             /* normal, enable Tx & Rx */
0151
0152     /* Copy the ethernet address to the lance init block
0153      * Notice that we do a byteswap if we're big endian.
0154      * [I think this is the right criterion; at least, sunlance,
0155      * a2065 and atarilance do the byteswap and lance.c (PC) doesn't.
0156      * However, the datasheet says that the BSWAP bit doesn't affect
0157      * the init block, so surely it should be low byte first for
0158      * everybody? Um.]
0159      * We could define the ib->physaddr as three 16bit values and
0160      * use (addr[1] << 8) | addr[0] & co, but this is more efficient.
0161      */
0162 #ifdef __BIG_ENDIAN
0163     ib->phys_addr[0] = dev->dev_addr[1];
0164     ib->phys_addr[1] = dev->dev_addr[0];
0165     ib->phys_addr[2] = dev->dev_addr[3];
0166     ib->phys_addr[3] = dev->dev_addr[2];
0167     ib->phys_addr[4] = dev->dev_addr[5];
0168     ib->phys_addr[5] = dev->dev_addr[4];
0169 #else
0170     for (i = 0; i < 6; i++)
0171            ib->phys_addr[i] = dev->dev_addr[i];
0172 #endif
0173
0174     if (DEBUG_IRING)
0175         printk("TX rings:\n");
0176
0177     lp->tx_full = 0;
0178     /* Setup the Tx ring entries */
0179     for (i = 0; i < (1 << lp->lance_log_tx_bufs); i++) {
0180         leptr = LANCE_ADDR(&aib->tx_buf[i][0]);
0181         ib->btx_ring[i].tmd0      = leptr;
0182         ib->btx_ring[i].tmd1_hadr = leptr >> 16;
0183         ib->btx_ring[i].tmd1_bits = 0;
0184         ib->btx_ring[i].length    = 0xf000; /* The ones required by tmd2 */
0185         ib->btx_ring[i].misc      = 0;
0186         if (DEBUG_IRING)
0187             printk("%d: 0x%8.8x\n", i, leptr);
0188     }
0189
0190     /* Setup the Rx ring entries */
0191     if (DEBUG_IRING)
0192         printk("RX rings:\n");
0193     for (i = 0; i < (1 << lp->lance_log_rx_bufs); i++) {
0194         leptr = LANCE_ADDR(&aib->rx_buf[i][0]);
0195
0196         ib->brx_ring[i].rmd0      = leptr;
0197         ib->brx_ring[i].rmd1_hadr = leptr >> 16;
0198         ib->brx_ring[i].rmd1_bits = LE_R1_OWN;
0199         /* 0xf000 == bits that must be one (reserved, presumably) */
0200         ib->brx_ring[i].length    = -RX_BUFF_SIZE | 0xf000;
0201         ib->brx_ring[i].mblength  = 0;
0202         if (DEBUG_IRING)
0203             printk("%d: 0x%8.8x\n", i, leptr);
0204     }
0205
0206     /* Setup the initialization block */
0207
0208     /* Setup rx descriptor pointer */
0209     leptr = LANCE_ADDR(&aib->brx_ring);
0210     ib->rx_len = (lp->lance_log_rx_bufs << 13) | (leptr >> 16);
0211     ib->rx_ptr = leptr;
0212     if (DEBUG_IRING)
0213         printk("RX ptr: %8.8x\n", leptr);
0214
0215     /* Setup tx descriptor pointer */
0216     leptr = LANCE_ADDR(&aib->btx_ring);
0217     ib->tx_len = (lp->lance_log_tx_bufs << 13) | (leptr >> 16);
0218     ib->tx_ptr = leptr;
0219     if (DEBUG_IRING)
0220         printk("TX ptr: %8.8x\n", leptr);
0221
0222     /* Clear the multicast filter */
0223     ib->filter[0] = 0;
0224     ib->filter[1] = 0;
0225     PRINT_RINGS();
0226 }
0227
0228 /* LANCE must be STOPped before we do this, too... */
0229 static int init_restart_lance(struct lance_private *lp)
0230 {
0231     int i;
0232
0233     WRITERAP(lp, LE_CSR0);
0234     WRITERDP(lp, LE_C0_INIT);
0235
0236     /* Need a hook here for sunlance ledma stuff */
0237
0238     /* Wait for the lance to complete initialization */
0239     for (i = 0; (i < 100) && !(READRDP(lp) & (LE_C0_ERR | LE_C0_IDON)); i++)
0240         barrier();
0241     if ((i == 100) || (READRDP(lp) & LE_C0_ERR)) {
0242         printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", i, READRDP(lp));
0243         return -1;
0244     }
0245
0246     /* Clear IDON by writing a "1", enable interrupts and start lance */
0247     WRITERDP(lp, LE_C0_IDON);
0248     WRITERDP(lp, LE_C0_INEA | LE_C0_STRT);
0249
0250     return 0;
0251 }
0252
0253 static int lance_reset(struct net_device *dev)
0254 {
0255     struct lance_private *lp = netdev_priv(dev);
0256     int status;
0257
0258     /* Stop the lance */
0259     WRITERAP(lp, LE_CSR0);
0260     WRITERDP(lp, LE_C0_STOP);
0261
0262     load_csrs(lp);
0263     lance_init_ring(dev);
0264     netif_trans_update(dev); /* prevent tx timeout */
0265     status = init_restart_lance(lp);
0266 #ifdef DEBUG_DRIVER
0267     printk("Lance restart=%d\n", status);
0268 #endif
0269     return status;
0270 }
0271
0272 static int lance_rx(struct net_device *dev)
0273 {
0274     struct lance_private *lp = netdev_priv(dev);
0275     volatile struct lance_init_block *ib = lp->init_block;
0276     volatile struct lance_rx_desc *rd;
0277     unsigned char bits;
0278 #ifdef TEST_HITS
0279     int i;
0280 #endif
0281
0282 #ifdef TEST_HITS
0283     printk("[");
0284     for (i = 0; i < RX_RING_SIZE; i++) {
0285         if (i == lp->rx_new)
0286             printk("%s",
0287                    ib->brx_ring[i].rmd1_bits & LE_R1_OWN ? "_" : "X");
0288         else
0289             printk("%s",
0290                   ib->brx_ring[i].rmd1_bits & LE_R1_OWN ? "." : "1");
0291     }
0292     printk("]");
0293 #endif
0294 #ifdef CONFIG_HP300
0295     blinken_leds(0x40, 0);
0296 #endif
0297     WRITERDP(lp, LE_C0_RINT | LE_C0_INEA);     /* ack Rx int, reenable ints */
0298     for (rd = &ib->brx_ring[lp->rx_new];     /* For each Rx ring we own... */
0299          !((bits = rd->rmd1_bits) & LE_R1_OWN);
0300          rd = &ib->brx_ring[lp->rx_new]) {
0301
0302         /* We got an incomplete frame? */
0303         if ((bits & LE_R1_POK) != LE_R1_POK) {
0304             dev->stats.rx_over_errors++;
0305             dev->stats.rx_errors++;
0306             continue;
0307         } else if (bits & LE_R1_ERR) {
0308             /* Count only the end frame as a rx error,
0309              * not the beginning
0310              */
0311             if (bits & LE_R1_BUF)
0312                 dev->stats.rx_fifo_errors++;
0313             if (bits & LE_R1_CRC)
0314                 dev->stats.rx_crc_errors++;
0315             if (bits & LE_R1_OFL)
0316                 dev->stats.rx_over_errors++;
0317             if (bits & LE_R1_FRA)
0318                 dev->stats.rx_frame_errors++;
0319             if (bits & LE_R1_EOP)
0320                 dev->stats.rx_errors++;
0321         } else {
0322             int len = (rd->mblength & 0xfff) - 4;
0323             struct sk_buff *skb = netdev_alloc_skb(dev, len + 2);
0324
0325             if (!skb) {
0326                 dev->stats.rx_dropped++;
0327                 rd->mblength = 0;
0328                 rd->rmd1_bits = LE_R1_OWN;
0329                 lp->rx_new = (lp->rx_new + 1) & lp->rx_ring_mod_mask;
0330                 return 0;
0331             }
0332
0333             skb_reserve(skb, 2);           /* 16 byte align */
0334             skb_put(skb, len);             /* make room */
0335             skb_copy_to_linear_data(skb,
0336                      (unsigned char *)&(ib->rx_buf[lp->rx_new][0]),
0337                      len);
0338             skb->protocol = eth_type_trans(skb, dev);
0339             netif_rx(skb);
0340             dev->stats.rx_packets++;
0341             dev->stats.rx_bytes += len;
0342         }
0343
0344         /* Return the packet to the pool */
0345         rd->mblength = 0;
0346         rd->rmd1_bits = LE_R1_OWN;
0347         lp->rx_new = (lp->rx_new + 1) & lp->rx_ring_mod_mask;
0348     }
0349     return 0;
0350 }
0351
0352 static int lance_tx(struct net_device *dev)
0353 {
0354     struct lance_private *lp = netdev_priv(dev);
0355     volatile struct lance_init_block *ib = lp->init_block;
0356     volatile struct lance_tx_desc *td;
0357     int i, j;
0358     int status;
0359
0360 #ifdef CONFIG_HP300
0361     blinken_leds(0x80, 0);
0362 #endif
0363     /* csr0 is 2f3 */
0364     WRITERDP(lp, LE_C0_TINT | LE_C0_INEA);
0365     /* csr0 is 73 */
0366
0367     j = lp->tx_old;
0368     for (i = j; i != lp->tx_new; i = j) {
0369         td = &ib->btx_ring[i];
0370
0371         /* If we hit a packet not owned by us, stop */
0372         if (td->tmd1_bits & LE_T1_OWN)
0373             break;
0374
0375         if (td->tmd1_bits & LE_T1_ERR) {
0376             status = td->misc;
0377
0378             dev->stats.tx_errors++;
0379             if (status & LE_T3_RTY)
0380                 dev->stats.tx_aborted_errors++;
0381             if (status & LE_T3_LCOL)
0382                 dev->stats.tx_window_errors++;
0383
0384             if (status & LE_T3_CLOS) {
0385                 dev->stats.tx_carrier_errors++;
0386                 if (lp->auto_select) {
0387                     lp->tpe = 1 - lp->tpe;
0388                     printk("%s: Carrier Lost, trying %s\n",
0389                            dev->name,
0390                            lp->tpe ? "TPE" : "AUI");
0391                     /* Stop the lance */
0392                     WRITERAP(lp, LE_CSR0);
0393                     WRITERDP(lp, LE_C0_STOP);
0394                     lance_init_ring(dev);
0395                     load_csrs(lp);
0396                     init_restart_lance(lp);
0397                     return 0;
0398                 }
0399             }
0400
0401             /* buffer errors and underflows turn off the transmitter */
0402             /* Restart the adapter */
0403             if (status & (LE_T3_BUF|LE_T3_UFL)) {
0404                 dev->stats.tx_fifo_errors++;
0405
0406                 printk("%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
0407                        dev->name);
0408                 /* Stop the lance */
0409                 WRITERAP(lp, LE_CSR0);
0410                 WRITERDP(lp, LE_C0_STOP);
0411                 lance_init_ring(dev);
0412                 load_csrs(lp);
0413                 init_restart_lance(lp);
0414                 return 0;
0415             }
0416         } else if ((td->tmd1_bits & LE_T1_POK) == LE_T1_POK) {
0417             /*
0418              * So we don't count the packet more than once.
0419              */
0420             td->tmd1_bits &= ~(LE_T1_POK);
0421
0422             /* One collision before packet was sent. */
0423             if (td->tmd1_bits & LE_T1_EONE)
0424                 dev->stats.collisions++;
0425
0426             /* More than one collision, be optimistic. */
0427             if (td->tmd1_bits & LE_T1_EMORE)
0428                 dev->stats.collisions += 2;
0429
0430             dev->stats.tx_packets++;
0431         }
0432
0433         j = (j + 1) & lp->tx_ring_mod_mask;
0434     }
0435     lp->tx_old = j;
0436     WRITERDP(lp, LE_C0_TINT | LE_C0_INEA);
0437     return 0;
0438 }
0439
0440 static irqreturn_t
0441 lance_interrupt(int irq, void *dev_id)
0442 {
0443     struct net_device *dev = (struct net_device *)dev_id;
0444     struct lance_private *lp = netdev_priv(dev);
0445     int csr0;
0446
0447     spin_lock(&lp->devlock);
0448
0449     WRITERAP(lp, LE_CSR0);              /* LANCE Controller Status */
0450     csr0 = READRDP(lp);
0451
0452     PRINT_RINGS();
0453
0454     if (!(csr0 & LE_C0_INTR)) {     /* Check if any interrupt has */
0455         spin_unlock(&lp->devlock);
0456         return IRQ_NONE;        /* been generated by the Lance. */
0457     }
0458
0459     /* Acknowledge all the interrupt sources ASAP */
0460     WRITERDP(lp, csr0 & ~(LE_C0_INEA|LE_C0_TDMD|LE_C0_STOP|LE_C0_STRT|LE_C0_INIT));
0461
0462     if ((csr0 & LE_C0_ERR)) {
0463         /* Clear the error condition */
0464         WRITERDP(lp, LE_C0_BABL|LE_C0_ERR|LE_C0_MISS|LE_C0_INEA);
0465     }
0466
0467     if (csr0 & LE_C0_RINT)
0468         lance_rx(dev);
0469
0470     if (csr0 & LE_C0_TINT)
0471         lance_tx(dev);
0472
0473     /* Log misc errors. */
0474     if (csr0 & LE_C0_BABL)
0475         dev->stats.tx_errors++;       /* Tx babble. */
0476     if (csr0 & LE_C0_MISS)
0477         dev->stats.rx_errors++;       /* Missed a Rx frame. */
0478     if (csr0 & LE_C0_MERR) {
0479         printk("%s: Bus master arbitration failure, status %4.4x.\n",
0480                dev->name, csr0);
0481         /* Restart the chip. */
0482         WRITERDP(lp, LE_C0_STRT);
0483     }
0484
0485     if (lp->tx_full && netif_queue_stopped(dev) && (TX_BUFFS_AVAIL >= 0)) {
0486         lp->tx_full = 0;
0487         netif_wake_queue(dev);
0488     }
0489
0490     WRITERAP(lp, LE_CSR0);
0491     WRITERDP(lp, LE_C0_BABL|LE_C0_CERR|LE_C0_MISS|LE_C0_MERR|LE_C0_IDON|LE_C0_INEA);
0492
0493     spin_unlock(&lp->devlock);
0494     return IRQ_HANDLED;
0495 }
0496
0497 int lance_open(struct net_device *dev)
0498 {
0499     struct lance_private *lp = netdev_priv(dev);
0500     int res;
0501
0502     /* Install the Interrupt handler. Or we could shunt this out to specific drivers? */
0503     if (request_irq(lp->irq, lance_interrupt, IRQF_SHARED, lp->name, dev))
0504         return -EAGAIN;
0505
0506     res = lance_reset(dev);
0507     spin_lock_init(&lp->devlock);
0508     netif_start_queue(dev);
0509
0510     return res;
0511 }
0512 EXPORT_SYMBOL_GPL(lance_open);
0513
0514 int lance_close(struct net_device *dev)
0515 {
0516     struct lance_private *lp = netdev_priv(dev);
0517
0518     netif_stop_queue(dev);
0519
0520     /* Stop the LANCE */
0521     WRITERAP(lp, LE_CSR0);
0522     WRITERDP(lp, LE_C0_STOP);
0523
0524     free_irq(lp->irq, dev);
0525
0526     return 0;
0527 }
0528 EXPORT_SYMBOL_GPL(lance_close);
0529
0530 void lance_tx_timeout(struct net_device *dev, unsigned int txqueue)
0531 {
0532     printk("lance_tx_timeout\n");
0533     lance_reset(dev);
0534     netif_trans_update(dev); /* prevent tx timeout */
0535     netif_wake_queue(dev);
0536 }
0537 EXPORT_SYMBOL_GPL(lance_tx_timeout);
0538
0539 netdev_tx_t lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
0540 {
0541     struct lance_private *lp = netdev_priv(dev);
0542     volatile struct lance_init_block *ib = lp->init_block;
0543     int entry, skblen, len;
0544     static int outs;
0545     unsigned long flags;
0546
0547     netif_stop_queue(dev);
0548
0549     if (!TX_BUFFS_AVAIL) {
0550         dev_consume_skb_any(skb);
0551         return NETDEV_TX_OK;
0552     }
0553
0554     skblen = skb->len;
0555
0556 #ifdef DEBUG_DRIVER
0557     /* dump the packet */
0558     {
0559         int i;
0560
0561         for (i = 0; i < 64; i++) {
0562             if ((i % 16) == 0)
0563                 printk("\n");
0564             printk("%2.2x ", skb->data[i]);
0565         }
0566     }
0567 #endif
0568     len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen;
0569     entry = lp->tx_new & lp->tx_ring_mod_mask;
0570     ib->btx_ring[entry].length = (-len) | 0xf000;
0571     ib->btx_ring[entry].misc = 0;
0572
0573     if (skb->len < ETH_ZLEN)
0574         memset((void *)&ib->tx_buf[entry][0], 0, ETH_ZLEN);
0575     skb_copy_from_linear_data(skb, (void *)&ib->tx_buf[entry][0], skblen);
0576
0577     /* Now, give the packet to the lance */
0578     ib->btx_ring[entry].tmd1_bits = (LE_T1_POK|LE_T1_OWN);
0579     lp->tx_new = (lp->tx_new + 1) & lp->tx_ring_mod_mask;
0580
0581     outs++;
0582     /* Kick the lance: transmit now */
0583     WRITERDP(lp, LE_C0_INEA | LE_C0_TDMD);
0584     dev_consume_skb_any(skb);
0585
0586     spin_lock_irqsave(&lp->devlock, flags);
0587     if (TX_BUFFS_AVAIL)
0588         netif_start_queue(dev);
0589     else
0590         lp->tx_full = 1;
0591     spin_unlock_irqrestore(&lp->devlock, flags);
0592
0593     return NETDEV_TX_OK;
0594 }
0595 EXPORT_SYMBOL_GPL(lance_start_xmit);
0596
0597 /* taken from the depca driver via a2065.c */
0598 static void lance_load_multicast(struct net_device *dev)
0599 {
0600     struct lance_private *lp = netdev_priv(dev);
0601     volatile struct lance_init_block *ib = lp->init_block;
0602     volatile u16 *mcast_table = (u16 *)&ib->filter;
0603     struct netdev_hw_addr *ha;
0604     u32 crc;
0605
0606     /* set all multicast bits */
0607     if (dev->flags & IFF_ALLMULTI) {
0608         ib->filter[0] = 0xffffffff;
0609         ib->filter[1] = 0xffffffff;
0610         return;
0611     }
0612     /* clear the multicast filter */
0613     ib->filter[0] = 0;
0614     ib->filter[1] = 0;
0615
0616     /* Add addresses */
0617     netdev_for_each_mc_addr(ha, dev) {
0618         crc = ether_crc_le(6, ha->addr);
0619         crc = crc >> 26;
0620         mcast_table[crc >> 4] |= 1 << (crc & 0xf);
0621     }
0622 }
0623
0624
0625 void lance_set_multicast(struct net_device *dev)
0626 {
0627     struct lance_private *lp = netdev_priv(dev);
0628     volatile struct lance_init_block *ib = lp->init_block;
0629     int stopped;
0630
0631     stopped = netif_queue_stopped(dev);
0632     if (!stopped)
0633         netif_stop_queue(dev);
0634
0635     while (lp->tx_old != lp->tx_new)
0636         schedule();
0637
0638     WRITERAP(lp, LE_CSR0);
0639     WRITERDP(lp, LE_C0_STOP);
0640     lance_init_ring(dev);
0641
0642     if (dev->flags & IFF_PROMISC) {
0643         ib->mode |= LE_MO_PROM;
0644     } else {
0645         ib->mode &= ~LE_MO_PROM;
0646         lance_load_multicast(dev);
0647     }
0648     load_csrs(lp);
0649     init_restart_lance(lp);
0650
0651     if (!stopped)
0652         netif_start_queue(dev);
0653 }
0654 EXPORT_SYMBOL_GPL(lance_set_multicast);
0655
0656 #ifdef CONFIG_NET_POLL_CONTROLLER
0657 void lance_poll(struct net_device *dev)
0658 {
0659     struct lance_private *lp = netdev_priv(dev);
0660
0661     spin_lock(&lp->devlock);
0662     WRITERAP(lp, LE_CSR0);
0663     WRITERDP(lp, LE_C0_STRT);
0664     spin_unlock(&lp->devlock);
0665     lance_interrupt(dev->irq, dev);
0666 }
0667 EXPORT_SYMBOL_GPL(lance_poll);
0668 #endif
0669
0670 MODULE_LICENSE("GPL");