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0001 // SPDX-License-Identifier: GPL-2.0
0002 /* Copyright 2019-2021 NXP
0003  *
0004  * This is an umbrella module for all network switches that are
0005  * register-compatible with Ocelot and that perform I/O to their host CPU
0006  * through an NPI (Node Processor Interface) Ethernet port.
0007  */
0008 #include <uapi/linux/if_bridge.h>
0009 #include <soc/mscc/ocelot_vcap.h>
0010 #include <soc/mscc/ocelot_qsys.h>
0011 #include <soc/mscc/ocelot_sys.h>
0012 #include <soc/mscc/ocelot_dev.h>
0013 #include <soc/mscc/ocelot_ana.h>
0014 #include <soc/mscc/ocelot_ptp.h>
0015 #include <soc/mscc/ocelot.h>
0016 #include <linux/dsa/8021q.h>
0017 #include <linux/dsa/ocelot.h>
0018 #include <linux/platform_device.h>
0019 #include <linux/ptp_classify.h>
0020 #include <linux/module.h>
0021 #include <linux/of_net.h>
0022 #include <linux/pci.h>
0023 #include <linux/of.h>
0024 #include <net/pkt_sched.h>
0025 #include <net/dsa.h>
0026 #include "felix.h"
0027 
0028 /* Translate the DSA database API into the ocelot switch library API,
0029  * which uses VID 0 for all ports that aren't part of a bridge,
0030  * and expects the bridge_dev to be NULL in that case.
0031  */
0032 static struct net_device *felix_classify_db(struct dsa_db db)
0033 {
0034     switch (db.type) {
0035     case DSA_DB_PORT:
0036     case DSA_DB_LAG:
0037         return NULL;
0038     case DSA_DB_BRIDGE:
0039         return db.bridge.dev;
0040     default:
0041         return ERR_PTR(-EOPNOTSUPP);
0042     }
0043 }
0044 
0045 /* Set up VCAP ES0 rules for pushing a tag_8021q VLAN towards the CPU such that
0046  * the tagger can perform RX source port identification.
0047  */
0048 static int felix_tag_8021q_vlan_add_rx(struct dsa_switch *ds, int port,
0049                        int upstream, u16 vid)
0050 {
0051     struct ocelot_vcap_filter *outer_tagging_rule;
0052     struct ocelot *ocelot = ds->priv;
0053     unsigned long cookie;
0054     int key_length, err;
0055 
0056     key_length = ocelot->vcap[VCAP_ES0].keys[VCAP_ES0_IGR_PORT].length;
0057 
0058     outer_tagging_rule = kzalloc(sizeof(struct ocelot_vcap_filter),
0059                      GFP_KERNEL);
0060     if (!outer_tagging_rule)
0061         return -ENOMEM;
0062 
0063     cookie = OCELOT_VCAP_ES0_TAG_8021Q_RXVLAN(ocelot, port, upstream);
0064 
0065     outer_tagging_rule->key_type = OCELOT_VCAP_KEY_ANY;
0066     outer_tagging_rule->prio = 1;
0067     outer_tagging_rule->id.cookie = cookie;
0068     outer_tagging_rule->id.tc_offload = false;
0069     outer_tagging_rule->block_id = VCAP_ES0;
0070     outer_tagging_rule->type = OCELOT_VCAP_FILTER_OFFLOAD;
0071     outer_tagging_rule->lookup = 0;
0072     outer_tagging_rule->ingress_port.value = port;
0073     outer_tagging_rule->ingress_port.mask = GENMASK(key_length - 1, 0);
0074     outer_tagging_rule->egress_port.value = upstream;
0075     outer_tagging_rule->egress_port.mask = GENMASK(key_length - 1, 0);
0076     outer_tagging_rule->action.push_outer_tag = OCELOT_ES0_TAG;
0077     outer_tagging_rule->action.tag_a_tpid_sel = OCELOT_TAG_TPID_SEL_8021AD;
0078     outer_tagging_rule->action.tag_a_vid_sel = 1;
0079     outer_tagging_rule->action.vid_a_val = vid;
0080 
0081     err = ocelot_vcap_filter_add(ocelot, outer_tagging_rule, NULL);
0082     if (err)
0083         kfree(outer_tagging_rule);
0084 
0085     return err;
0086 }
0087 
0088 static int felix_tag_8021q_vlan_del_rx(struct dsa_switch *ds, int port,
0089                        int upstream, u16 vid)
0090 {
0091     struct ocelot_vcap_filter *outer_tagging_rule;
0092     struct ocelot_vcap_block *block_vcap_es0;
0093     struct ocelot *ocelot = ds->priv;
0094     unsigned long cookie;
0095 
0096     block_vcap_es0 = &ocelot->block[VCAP_ES0];
0097     cookie = OCELOT_VCAP_ES0_TAG_8021Q_RXVLAN(ocelot, port, upstream);
0098 
0099     outer_tagging_rule = ocelot_vcap_block_find_filter_by_id(block_vcap_es0,
0100                                  cookie, false);
0101     if (!outer_tagging_rule)
0102         return -ENOENT;
0103 
0104     return ocelot_vcap_filter_del(ocelot, outer_tagging_rule);
0105 }
0106 
0107 /* Set up VCAP IS1 rules for stripping the tag_8021q VLAN on TX and VCAP IS2
0108  * rules for steering those tagged packets towards the correct destination port
0109  */
0110 static int felix_tag_8021q_vlan_add_tx(struct dsa_switch *ds, int port,
0111                        u16 vid)
0112 {
0113     struct ocelot_vcap_filter *untagging_rule, *redirect_rule;
0114     unsigned long cpu_ports = dsa_cpu_ports(ds);
0115     struct ocelot *ocelot = ds->priv;
0116     unsigned long cookie;
0117     int err;
0118 
0119     untagging_rule = kzalloc(sizeof(struct ocelot_vcap_filter), GFP_KERNEL);
0120     if (!untagging_rule)
0121         return -ENOMEM;
0122 
0123     redirect_rule = kzalloc(sizeof(struct ocelot_vcap_filter), GFP_KERNEL);
0124     if (!redirect_rule) {
0125         kfree(untagging_rule);
0126         return -ENOMEM;
0127     }
0128 
0129     cookie = OCELOT_VCAP_IS1_TAG_8021Q_TXVLAN(ocelot, port);
0130 
0131     untagging_rule->key_type = OCELOT_VCAP_KEY_ANY;
0132     untagging_rule->ingress_port_mask = cpu_ports;
0133     untagging_rule->vlan.vid.value = vid;
0134     untagging_rule->vlan.vid.mask = VLAN_VID_MASK;
0135     untagging_rule->prio = 1;
0136     untagging_rule->id.cookie = cookie;
0137     untagging_rule->id.tc_offload = false;
0138     untagging_rule->block_id = VCAP_IS1;
0139     untagging_rule->type = OCELOT_VCAP_FILTER_OFFLOAD;
0140     untagging_rule->lookup = 0;
0141     untagging_rule->action.vlan_pop_cnt_ena = true;
0142     untagging_rule->action.vlan_pop_cnt = 1;
0143     untagging_rule->action.pag_override_mask = 0xff;
0144     untagging_rule->action.pag_val = port;
0145 
0146     err = ocelot_vcap_filter_add(ocelot, untagging_rule, NULL);
0147     if (err) {
0148         kfree(untagging_rule);
0149         kfree(redirect_rule);
0150         return err;
0151     }
0152 
0153     cookie = OCELOT_VCAP_IS2_TAG_8021Q_TXVLAN(ocelot, port);
0154 
0155     redirect_rule->key_type = OCELOT_VCAP_KEY_ANY;
0156     redirect_rule->ingress_port_mask = cpu_ports;
0157     redirect_rule->pag = port;
0158     redirect_rule->prio = 1;
0159     redirect_rule->id.cookie = cookie;
0160     redirect_rule->id.tc_offload = false;
0161     redirect_rule->block_id = VCAP_IS2;
0162     redirect_rule->type = OCELOT_VCAP_FILTER_OFFLOAD;
0163     redirect_rule->lookup = 0;
0164     redirect_rule->action.mask_mode = OCELOT_MASK_MODE_REDIRECT;
0165     redirect_rule->action.port_mask = BIT(port);
0166 
0167     err = ocelot_vcap_filter_add(ocelot, redirect_rule, NULL);
0168     if (err) {
0169         ocelot_vcap_filter_del(ocelot, untagging_rule);
0170         kfree(redirect_rule);
0171         return err;
0172     }
0173 
0174     return 0;
0175 }
0176 
0177 static int felix_tag_8021q_vlan_del_tx(struct dsa_switch *ds, int port, u16 vid)
0178 {
0179     struct ocelot_vcap_filter *untagging_rule, *redirect_rule;
0180     struct ocelot_vcap_block *block_vcap_is1;
0181     struct ocelot_vcap_block *block_vcap_is2;
0182     struct ocelot *ocelot = ds->priv;
0183     unsigned long cookie;
0184     int err;
0185 
0186     block_vcap_is1 = &ocelot->block[VCAP_IS1];
0187     block_vcap_is2 = &ocelot->block[VCAP_IS2];
0188 
0189     cookie = OCELOT_VCAP_IS1_TAG_8021Q_TXVLAN(ocelot, port);
0190     untagging_rule = ocelot_vcap_block_find_filter_by_id(block_vcap_is1,
0191                                  cookie, false);
0192     if (!untagging_rule)
0193         return -ENOENT;
0194 
0195     err = ocelot_vcap_filter_del(ocelot, untagging_rule);
0196     if (err)
0197         return err;
0198 
0199     cookie = OCELOT_VCAP_IS2_TAG_8021Q_TXVLAN(ocelot, port);
0200     redirect_rule = ocelot_vcap_block_find_filter_by_id(block_vcap_is2,
0201                                 cookie, false);
0202     if (!redirect_rule)
0203         return -ENOENT;
0204 
0205     return ocelot_vcap_filter_del(ocelot, redirect_rule);
0206 }
0207 
0208 static int felix_tag_8021q_vlan_add(struct dsa_switch *ds, int port, u16 vid,
0209                     u16 flags)
0210 {
0211     struct dsa_port *cpu_dp;
0212     int err;
0213 
0214     /* tag_8021q.c assumes we are implementing this via port VLAN
0215      * membership, which we aren't. So we don't need to add any VCAP filter
0216      * for the CPU port.
0217      */
0218     if (!dsa_is_user_port(ds, port))
0219         return 0;
0220 
0221     dsa_switch_for_each_cpu_port(cpu_dp, ds) {
0222         err = felix_tag_8021q_vlan_add_rx(ds, port, cpu_dp->index, vid);
0223         if (err)
0224             return err;
0225     }
0226 
0227     err = felix_tag_8021q_vlan_add_tx(ds, port, vid);
0228     if (err)
0229         goto add_tx_failed;
0230 
0231     return 0;
0232 
0233 add_tx_failed:
0234     dsa_switch_for_each_cpu_port(cpu_dp, ds)
0235         felix_tag_8021q_vlan_del_rx(ds, port, cpu_dp->index, vid);
0236 
0237     return err;
0238 }
0239 
0240 static int felix_tag_8021q_vlan_del(struct dsa_switch *ds, int port, u16 vid)
0241 {
0242     struct dsa_port *cpu_dp;
0243     int err;
0244 
0245     if (!dsa_is_user_port(ds, port))
0246         return 0;
0247 
0248     dsa_switch_for_each_cpu_port(cpu_dp, ds) {
0249         err = felix_tag_8021q_vlan_del_rx(ds, port, cpu_dp->index, vid);
0250         if (err)
0251             return err;
0252     }
0253 
0254     err = felix_tag_8021q_vlan_del_tx(ds, port, vid);
0255     if (err)
0256         goto del_tx_failed;
0257 
0258     return 0;
0259 
0260 del_tx_failed:
0261     dsa_switch_for_each_cpu_port(cpu_dp, ds)
0262         felix_tag_8021q_vlan_add_rx(ds, port, cpu_dp->index, vid);
0263 
0264     return err;
0265 }
0266 
0267 static int felix_trap_get_cpu_port(struct dsa_switch *ds,
0268                    const struct ocelot_vcap_filter *trap)
0269 {
0270     struct dsa_port *dp;
0271     int first_port;
0272 
0273     if (WARN_ON(!trap->ingress_port_mask))
0274         return -1;
0275 
0276     first_port = __ffs(trap->ingress_port_mask);
0277     dp = dsa_to_port(ds, first_port);
0278 
0279     return dp->cpu_dp->index;
0280 }
0281 
0282 /* On switches with no extraction IRQ wired, trapped packets need to be
0283  * replicated over Ethernet as well, otherwise we'd get no notification of
0284  * their arrival when using the ocelot-8021q tagging protocol.
0285  */
0286 static int felix_update_trapping_destinations(struct dsa_switch *ds,
0287                           bool using_tag_8021q)
0288 {
0289     struct ocelot *ocelot = ds->priv;
0290     struct felix *felix = ocelot_to_felix(ocelot);
0291     struct ocelot_vcap_block *block_vcap_is2;
0292     struct ocelot_vcap_filter *trap;
0293     enum ocelot_mask_mode mask_mode;
0294     unsigned long port_mask;
0295     bool cpu_copy_ena;
0296     int err;
0297 
0298     if (!felix->info->quirk_no_xtr_irq)
0299         return 0;
0300 
0301     /* We are sure that "cpu" was found, otherwise
0302      * dsa_tree_setup_default_cpu() would have failed earlier.
0303      */
0304     block_vcap_is2 = &ocelot->block[VCAP_IS2];
0305 
0306     /* Make sure all traps are set up for that destination */
0307     list_for_each_entry(trap, &block_vcap_is2->rules, list) {
0308         if (!trap->is_trap)
0309             continue;
0310 
0311         /* Figure out the current trapping destination */
0312         if (using_tag_8021q) {
0313             /* Redirect to the tag_8021q CPU port. If timestamps
0314              * are necessary, also copy trapped packets to the CPU
0315              * port module.
0316              */
0317             mask_mode = OCELOT_MASK_MODE_REDIRECT;
0318             port_mask = BIT(felix_trap_get_cpu_port(ds, trap));
0319             cpu_copy_ena = !!trap->take_ts;
0320         } else {
0321             /* Trap packets only to the CPU port module, which is
0322              * redirected to the NPI port (the DSA CPU port)
0323              */
0324             mask_mode = OCELOT_MASK_MODE_PERMIT_DENY;
0325             port_mask = 0;
0326             cpu_copy_ena = true;
0327         }
0328 
0329         if (trap->action.mask_mode == mask_mode &&
0330             trap->action.port_mask == port_mask &&
0331             trap->action.cpu_copy_ena == cpu_copy_ena)
0332             continue;
0333 
0334         trap->action.mask_mode = mask_mode;
0335         trap->action.port_mask = port_mask;
0336         trap->action.cpu_copy_ena = cpu_copy_ena;
0337 
0338         err = ocelot_vcap_filter_replace(ocelot, trap);
0339         if (err)
0340             return err;
0341     }
0342 
0343     return 0;
0344 }
0345 
0346 /* The CPU port module is connected to the Node Processor Interface (NPI). This
0347  * is the mode through which frames can be injected from and extracted to an
0348  * external CPU, over Ethernet. In NXP SoCs, the "external CPU" is the ARM CPU
0349  * running Linux, and this forms a DSA setup together with the enetc or fman
0350  * DSA master.
0351  */
0352 static void felix_npi_port_init(struct ocelot *ocelot, int port)
0353 {
0354     ocelot->npi = port;
0355 
0356     ocelot_write(ocelot, QSYS_EXT_CPU_CFG_EXT_CPUQ_MSK_M |
0357              QSYS_EXT_CPU_CFG_EXT_CPU_PORT(port),
0358              QSYS_EXT_CPU_CFG);
0359 
0360     /* NPI port Injection/Extraction configuration */
0361     ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_XTR_HDR,
0362                 ocelot->npi_xtr_prefix);
0363     ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_INJ_HDR,
0364                 ocelot->npi_inj_prefix);
0365 
0366     /* Disable transmission of pause frames */
0367     ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, 0);
0368 }
0369 
0370 static void felix_npi_port_deinit(struct ocelot *ocelot, int port)
0371 {
0372     /* Restore hardware defaults */
0373     int unused_port = ocelot->num_phys_ports + 2;
0374 
0375     ocelot->npi = -1;
0376 
0377     ocelot_write(ocelot, QSYS_EXT_CPU_CFG_EXT_CPU_PORT(unused_port),
0378              QSYS_EXT_CPU_CFG);
0379 
0380     ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_XTR_HDR,
0381                 OCELOT_TAG_PREFIX_DISABLED);
0382     ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_INJ_HDR,
0383                 OCELOT_TAG_PREFIX_DISABLED);
0384 
0385     /* Enable transmission of pause frames */
0386     ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, 1);
0387 }
0388 
0389 static int felix_tag_npi_setup(struct dsa_switch *ds)
0390 {
0391     struct dsa_port *dp, *first_cpu_dp = NULL;
0392     struct ocelot *ocelot = ds->priv;
0393 
0394     dsa_switch_for_each_user_port(dp, ds) {
0395         if (first_cpu_dp && dp->cpu_dp != first_cpu_dp) {
0396             dev_err(ds->dev, "Multiple NPI ports not supported\n");
0397             return -EINVAL;
0398         }
0399 
0400         first_cpu_dp = dp->cpu_dp;
0401     }
0402 
0403     if (!first_cpu_dp)
0404         return -EINVAL;
0405 
0406     felix_npi_port_init(ocelot, first_cpu_dp->index);
0407 
0408     return 0;
0409 }
0410 
0411 static void felix_tag_npi_teardown(struct dsa_switch *ds)
0412 {
0413     struct ocelot *ocelot = ds->priv;
0414 
0415     felix_npi_port_deinit(ocelot, ocelot->npi);
0416 }
0417 
0418 static unsigned long felix_tag_npi_get_host_fwd_mask(struct dsa_switch *ds)
0419 {
0420     struct ocelot *ocelot = ds->priv;
0421 
0422     return BIT(ocelot->num_phys_ports);
0423 }
0424 
0425 /* Alternatively to using the NPI functionality, that same hardware MAC
0426  * connected internally to the enetc or fman DSA master can be configured to
0427  * use the software-defined tag_8021q frame format. As far as the hardware is
0428  * concerned, it thinks it is a "dumb switch" - the queues of the CPU port
0429  * module are now disconnected from it, but can still be accessed through
0430  * register-based MMIO.
0431  */
0432 static const struct felix_tag_proto_ops felix_tag_npi_proto_ops = {
0433     .setup          = felix_tag_npi_setup,
0434     .teardown       = felix_tag_npi_teardown,
0435     .get_host_fwd_mask  = felix_tag_npi_get_host_fwd_mask,
0436 };
0437 
0438 static int felix_tag_8021q_setup(struct dsa_switch *ds)
0439 {
0440     struct ocelot *ocelot = ds->priv;
0441     struct dsa_port *dp;
0442     int err;
0443 
0444     err = dsa_tag_8021q_register(ds, htons(ETH_P_8021AD));
0445     if (err)
0446         return err;
0447 
0448     dsa_switch_for_each_user_port(dp, ds)
0449         ocelot_port_assign_dsa_8021q_cpu(ocelot, dp->index,
0450                          dp->cpu_dp->index);
0451 
0452     dsa_switch_for_each_available_port(dp, ds)
0453         /* This overwrites ocelot_init():
0454          * Do not forward BPDU frames to the CPU port module,
0455          * for 2 reasons:
0456          * - When these packets are injected from the tag_8021q
0457          *   CPU port, we want them to go out, not loop back
0458          *   into the system.
0459          * - STP traffic ingressing on a user port should go to
0460          *   the tag_8021q CPU port, not to the hardware CPU
0461          *   port module.
0462          */
0463         ocelot_write_gix(ocelot,
0464                  ANA_PORT_CPU_FWD_BPDU_CFG_BPDU_REDIR_ENA(0),
0465                  ANA_PORT_CPU_FWD_BPDU_CFG, dp->index);
0466 
0467     /* The ownership of the CPU port module's queues might have just been
0468      * transferred to the tag_8021q tagger from the NPI-based tagger.
0469      * So there might still be all sorts of crap in the queues. On the
0470      * other hand, the MMIO-based matching of PTP frames is very brittle,
0471      * so we need to be careful that there are no extra frames to be
0472      * dequeued over MMIO, since we would never know to discard them.
0473      */
0474     ocelot_drain_cpu_queue(ocelot, 0);
0475 
0476     return 0;
0477 }
0478 
0479 static void felix_tag_8021q_teardown(struct dsa_switch *ds)
0480 {
0481     struct ocelot *ocelot = ds->priv;
0482     struct dsa_port *dp;
0483 
0484     dsa_switch_for_each_available_port(dp, ds)
0485         /* Restore the logic from ocelot_init:
0486          * do not forward BPDU frames to the front ports.
0487          */
0488         ocelot_write_gix(ocelot,
0489                  ANA_PORT_CPU_FWD_BPDU_CFG_BPDU_REDIR_ENA(0xffff),
0490                  ANA_PORT_CPU_FWD_BPDU_CFG,
0491                  dp->index);
0492 
0493     dsa_switch_for_each_user_port(dp, ds)
0494         ocelot_port_unassign_dsa_8021q_cpu(ocelot, dp->index);
0495 
0496     dsa_tag_8021q_unregister(ds);
0497 }
0498 
0499 static unsigned long felix_tag_8021q_get_host_fwd_mask(struct dsa_switch *ds)
0500 {
0501     return dsa_cpu_ports(ds);
0502 }
0503 
0504 static const struct felix_tag_proto_ops felix_tag_8021q_proto_ops = {
0505     .setup          = felix_tag_8021q_setup,
0506     .teardown       = felix_tag_8021q_teardown,
0507     .get_host_fwd_mask  = felix_tag_8021q_get_host_fwd_mask,
0508 };
0509 
0510 static void felix_set_host_flood(struct dsa_switch *ds, unsigned long mask,
0511                  bool uc, bool mc, bool bc)
0512 {
0513     struct ocelot *ocelot = ds->priv;
0514     unsigned long val;
0515 
0516     val = uc ? mask : 0;
0517     ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_UC);
0518 
0519     val = mc ? mask : 0;
0520     ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_MC);
0521     ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_MCIPV4);
0522     ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_MCIPV6);
0523 
0524     val = bc ? mask : 0;
0525     ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_BC);
0526 }
0527 
0528 static void
0529 felix_migrate_host_flood(struct dsa_switch *ds,
0530              const struct felix_tag_proto_ops *proto_ops,
0531              const struct felix_tag_proto_ops *old_proto_ops)
0532 {
0533     struct ocelot *ocelot = ds->priv;
0534     struct felix *felix = ocelot_to_felix(ocelot);
0535     unsigned long mask;
0536 
0537     if (old_proto_ops) {
0538         mask = old_proto_ops->get_host_fwd_mask(ds);
0539         felix_set_host_flood(ds, mask, false, false, false);
0540     }
0541 
0542     mask = proto_ops->get_host_fwd_mask(ds);
0543     felix_set_host_flood(ds, mask, !!felix->host_flood_uc_mask,
0544                  !!felix->host_flood_mc_mask, true);
0545 }
0546 
0547 static int felix_migrate_mdbs(struct dsa_switch *ds,
0548                   const struct felix_tag_proto_ops *proto_ops,
0549                   const struct felix_tag_proto_ops *old_proto_ops)
0550 {
0551     struct ocelot *ocelot = ds->priv;
0552     unsigned long from, to;
0553 
0554     if (!old_proto_ops)
0555         return 0;
0556 
0557     from = old_proto_ops->get_host_fwd_mask(ds);
0558     to = proto_ops->get_host_fwd_mask(ds);
0559 
0560     return ocelot_migrate_mdbs(ocelot, from, to);
0561 }
0562 
0563 /* Configure the shared hardware resources for a transition between
0564  * @old_proto_ops and @proto_ops.
0565  * Manual migration is needed because as far as DSA is concerned, no change of
0566  * the CPU port is taking place here, just of the tagging protocol.
0567  */
0568 static int
0569 felix_tag_proto_setup_shared(struct dsa_switch *ds,
0570                  const struct felix_tag_proto_ops *proto_ops,
0571                  const struct felix_tag_proto_ops *old_proto_ops)
0572 {
0573     bool using_tag_8021q = (proto_ops == &felix_tag_8021q_proto_ops);
0574     int err;
0575 
0576     err = felix_migrate_mdbs(ds, proto_ops, old_proto_ops);
0577     if (err)
0578         return err;
0579 
0580     felix_update_trapping_destinations(ds, using_tag_8021q);
0581 
0582     felix_migrate_host_flood(ds, proto_ops, old_proto_ops);
0583 
0584     return 0;
0585 }
0586 
0587 /* This always leaves the switch in a consistent state, because although the
0588  * tag_8021q setup can fail, the NPI setup can't. So either the change is made,
0589  * or the restoration is guaranteed to work.
0590  */
0591 static int felix_change_tag_protocol(struct dsa_switch *ds,
0592                      enum dsa_tag_protocol proto)
0593 {
0594     const struct felix_tag_proto_ops *old_proto_ops, *proto_ops;
0595     struct ocelot *ocelot = ds->priv;
0596     struct felix *felix = ocelot_to_felix(ocelot);
0597     int err;
0598 
0599     switch (proto) {
0600     case DSA_TAG_PROTO_SEVILLE:
0601     case DSA_TAG_PROTO_OCELOT:
0602         proto_ops = &felix_tag_npi_proto_ops;
0603         break;
0604     case DSA_TAG_PROTO_OCELOT_8021Q:
0605         proto_ops = &felix_tag_8021q_proto_ops;
0606         break;
0607     default:
0608         return -EPROTONOSUPPORT;
0609     }
0610 
0611     old_proto_ops = felix->tag_proto_ops;
0612 
0613     if (proto_ops == old_proto_ops)
0614         return 0;
0615 
0616     err = proto_ops->setup(ds);
0617     if (err)
0618         goto setup_failed;
0619 
0620     err = felix_tag_proto_setup_shared(ds, proto_ops, old_proto_ops);
0621     if (err)
0622         goto setup_shared_failed;
0623 
0624     if (old_proto_ops)
0625         old_proto_ops->teardown(ds);
0626 
0627     felix->tag_proto_ops = proto_ops;
0628     felix->tag_proto = proto;
0629 
0630     return 0;
0631 
0632 setup_shared_failed:
0633     proto_ops->teardown(ds);
0634 setup_failed:
0635     return err;
0636 }
0637 
0638 static enum dsa_tag_protocol felix_get_tag_protocol(struct dsa_switch *ds,
0639                             int port,
0640                             enum dsa_tag_protocol mp)
0641 {
0642     struct ocelot *ocelot = ds->priv;
0643     struct felix *felix = ocelot_to_felix(ocelot);
0644 
0645     return felix->tag_proto;
0646 }
0647 
0648 static void felix_port_set_host_flood(struct dsa_switch *ds, int port,
0649                       bool uc, bool mc)
0650 {
0651     struct ocelot *ocelot = ds->priv;
0652     struct felix *felix = ocelot_to_felix(ocelot);
0653     unsigned long mask;
0654 
0655     if (uc)
0656         felix->host_flood_uc_mask |= BIT(port);
0657     else
0658         felix->host_flood_uc_mask &= ~BIT(port);
0659 
0660     if (mc)
0661         felix->host_flood_mc_mask |= BIT(port);
0662     else
0663         felix->host_flood_mc_mask &= ~BIT(port);
0664 
0665     mask = felix->tag_proto_ops->get_host_fwd_mask(ds);
0666     felix_set_host_flood(ds, mask, !!felix->host_flood_uc_mask,
0667                  !!felix->host_flood_mc_mask, true);
0668 }
0669 
0670 static int felix_set_ageing_time(struct dsa_switch *ds,
0671                  unsigned int ageing_time)
0672 {
0673     struct ocelot *ocelot = ds->priv;
0674 
0675     ocelot_set_ageing_time(ocelot, ageing_time);
0676 
0677     return 0;
0678 }
0679 
0680 static void felix_port_fast_age(struct dsa_switch *ds, int port)
0681 {
0682     struct ocelot *ocelot = ds->priv;
0683     int err;
0684 
0685     err = ocelot_mact_flush(ocelot, port);
0686     if (err)
0687         dev_err(ds->dev, "Flushing MAC table on port %d returned %pe\n",
0688             port, ERR_PTR(err));
0689 }
0690 
0691 static int felix_fdb_dump(struct dsa_switch *ds, int port,
0692               dsa_fdb_dump_cb_t *cb, void *data)
0693 {
0694     struct ocelot *ocelot = ds->priv;
0695 
0696     return ocelot_fdb_dump(ocelot, port, cb, data);
0697 }
0698 
0699 static int felix_fdb_add(struct dsa_switch *ds, int port,
0700              const unsigned char *addr, u16 vid,
0701              struct dsa_db db)
0702 {
0703     struct net_device *bridge_dev = felix_classify_db(db);
0704     struct dsa_port *dp = dsa_to_port(ds, port);
0705     struct ocelot *ocelot = ds->priv;
0706 
0707     if (IS_ERR(bridge_dev))
0708         return PTR_ERR(bridge_dev);
0709 
0710     if (dsa_port_is_cpu(dp) && !bridge_dev &&
0711         dsa_fdb_present_in_other_db(ds, port, addr, vid, db))
0712         return 0;
0713 
0714     if (dsa_port_is_cpu(dp))
0715         port = PGID_CPU;
0716 
0717     return ocelot_fdb_add(ocelot, port, addr, vid, bridge_dev);
0718 }
0719 
0720 static int felix_fdb_del(struct dsa_switch *ds, int port,
0721              const unsigned char *addr, u16 vid,
0722              struct dsa_db db)
0723 {
0724     struct net_device *bridge_dev = felix_classify_db(db);
0725     struct dsa_port *dp = dsa_to_port(ds, port);
0726     struct ocelot *ocelot = ds->priv;
0727 
0728     if (IS_ERR(bridge_dev))
0729         return PTR_ERR(bridge_dev);
0730 
0731     if (dsa_port_is_cpu(dp) && !bridge_dev &&
0732         dsa_fdb_present_in_other_db(ds, port, addr, vid, db))
0733         return 0;
0734 
0735     if (dsa_port_is_cpu(dp))
0736         port = PGID_CPU;
0737 
0738     return ocelot_fdb_del(ocelot, port, addr, vid, bridge_dev);
0739 }
0740 
0741 static int felix_lag_fdb_add(struct dsa_switch *ds, struct dsa_lag lag,
0742                  const unsigned char *addr, u16 vid,
0743                  struct dsa_db db)
0744 {
0745     struct net_device *bridge_dev = felix_classify_db(db);
0746     struct ocelot *ocelot = ds->priv;
0747 
0748     if (IS_ERR(bridge_dev))
0749         return PTR_ERR(bridge_dev);
0750 
0751     return ocelot_lag_fdb_add(ocelot, lag.dev, addr, vid, bridge_dev);
0752 }
0753 
0754 static int felix_lag_fdb_del(struct dsa_switch *ds, struct dsa_lag lag,
0755                  const unsigned char *addr, u16 vid,
0756                  struct dsa_db db)
0757 {
0758     struct net_device *bridge_dev = felix_classify_db(db);
0759     struct ocelot *ocelot = ds->priv;
0760 
0761     if (IS_ERR(bridge_dev))
0762         return PTR_ERR(bridge_dev);
0763 
0764     return ocelot_lag_fdb_del(ocelot, lag.dev, addr, vid, bridge_dev);
0765 }
0766 
0767 static int felix_mdb_add(struct dsa_switch *ds, int port,
0768              const struct switchdev_obj_port_mdb *mdb,
0769              struct dsa_db db)
0770 {
0771     struct net_device *bridge_dev = felix_classify_db(db);
0772     struct ocelot *ocelot = ds->priv;
0773 
0774     if (IS_ERR(bridge_dev))
0775         return PTR_ERR(bridge_dev);
0776 
0777     if (dsa_is_cpu_port(ds, port) && !bridge_dev &&
0778         dsa_mdb_present_in_other_db(ds, port, mdb, db))
0779         return 0;
0780 
0781     if (port == ocelot->npi)
0782         port = ocelot->num_phys_ports;
0783 
0784     return ocelot_port_mdb_add(ocelot, port, mdb, bridge_dev);
0785 }
0786 
0787 static int felix_mdb_del(struct dsa_switch *ds, int port,
0788              const struct switchdev_obj_port_mdb *mdb,
0789              struct dsa_db db)
0790 {
0791     struct net_device *bridge_dev = felix_classify_db(db);
0792     struct ocelot *ocelot = ds->priv;
0793 
0794     if (IS_ERR(bridge_dev))
0795         return PTR_ERR(bridge_dev);
0796 
0797     if (dsa_is_cpu_port(ds, port) && !bridge_dev &&
0798         dsa_mdb_present_in_other_db(ds, port, mdb, db))
0799         return 0;
0800 
0801     if (port == ocelot->npi)
0802         port = ocelot->num_phys_ports;
0803 
0804     return ocelot_port_mdb_del(ocelot, port, mdb, bridge_dev);
0805 }
0806 
0807 static void felix_bridge_stp_state_set(struct dsa_switch *ds, int port,
0808                        u8 state)
0809 {
0810     struct ocelot *ocelot = ds->priv;
0811 
0812     return ocelot_bridge_stp_state_set(ocelot, port, state);
0813 }
0814 
0815 static int felix_pre_bridge_flags(struct dsa_switch *ds, int port,
0816                   struct switchdev_brport_flags val,
0817                   struct netlink_ext_ack *extack)
0818 {
0819     struct ocelot *ocelot = ds->priv;
0820 
0821     return ocelot_port_pre_bridge_flags(ocelot, port, val);
0822 }
0823 
0824 static int felix_bridge_flags(struct dsa_switch *ds, int port,
0825                   struct switchdev_brport_flags val,
0826                   struct netlink_ext_ack *extack)
0827 {
0828     struct ocelot *ocelot = ds->priv;
0829 
0830     if (port == ocelot->npi)
0831         port = ocelot->num_phys_ports;
0832 
0833     ocelot_port_bridge_flags(ocelot, port, val);
0834 
0835     return 0;
0836 }
0837 
0838 static int felix_bridge_join(struct dsa_switch *ds, int port,
0839                  struct dsa_bridge bridge, bool *tx_fwd_offload,
0840                  struct netlink_ext_ack *extack)
0841 {
0842     struct ocelot *ocelot = ds->priv;
0843 
0844     return ocelot_port_bridge_join(ocelot, port, bridge.dev, bridge.num,
0845                        extack);
0846 }
0847 
0848 static void felix_bridge_leave(struct dsa_switch *ds, int port,
0849                    struct dsa_bridge bridge)
0850 {
0851     struct ocelot *ocelot = ds->priv;
0852 
0853     ocelot_port_bridge_leave(ocelot, port, bridge.dev);
0854 }
0855 
0856 static int felix_lag_join(struct dsa_switch *ds, int port,
0857               struct dsa_lag lag,
0858               struct netdev_lag_upper_info *info)
0859 {
0860     struct ocelot *ocelot = ds->priv;
0861 
0862     return ocelot_port_lag_join(ocelot, port, lag.dev, info);
0863 }
0864 
0865 static int felix_lag_leave(struct dsa_switch *ds, int port,
0866                struct dsa_lag lag)
0867 {
0868     struct ocelot *ocelot = ds->priv;
0869 
0870     ocelot_port_lag_leave(ocelot, port, lag.dev);
0871 
0872     return 0;
0873 }
0874 
0875 static int felix_lag_change(struct dsa_switch *ds, int port)
0876 {
0877     struct dsa_port *dp = dsa_to_port(ds, port);
0878     struct ocelot *ocelot = ds->priv;
0879 
0880     ocelot_port_lag_change(ocelot, port, dp->lag_tx_enabled);
0881 
0882     return 0;
0883 }
0884 
0885 static int felix_vlan_prepare(struct dsa_switch *ds, int port,
0886                   const struct switchdev_obj_port_vlan *vlan,
0887                   struct netlink_ext_ack *extack)
0888 {
0889     struct ocelot *ocelot = ds->priv;
0890     u16 flags = vlan->flags;
0891 
0892     /* Ocelot switches copy frames as-is to the CPU, so the flags:
0893      * egress-untagged or not, pvid or not, make no difference. This
0894      * behavior is already better than what DSA just tries to approximate
0895      * when it installs the VLAN with the same flags on the CPU port.
0896      * Just accept any configuration, and don't let ocelot deny installing
0897      * multiple native VLANs on the NPI port, because the switch doesn't
0898      * look at the port tag settings towards the NPI interface anyway.
0899      */
0900     if (port == ocelot->npi)
0901         return 0;
0902 
0903     return ocelot_vlan_prepare(ocelot, port, vlan->vid,
0904                    flags & BRIDGE_VLAN_INFO_PVID,
0905                    flags & BRIDGE_VLAN_INFO_UNTAGGED,
0906                    extack);
0907 }
0908 
0909 static int felix_vlan_filtering(struct dsa_switch *ds, int port, bool enabled,
0910                 struct netlink_ext_ack *extack)
0911 {
0912     struct ocelot *ocelot = ds->priv;
0913 
0914     return ocelot_port_vlan_filtering(ocelot, port, enabled, extack);
0915 }
0916 
0917 static int felix_vlan_add(struct dsa_switch *ds, int port,
0918               const struct switchdev_obj_port_vlan *vlan,
0919               struct netlink_ext_ack *extack)
0920 {
0921     struct ocelot *ocelot = ds->priv;
0922     u16 flags = vlan->flags;
0923     int err;
0924 
0925     err = felix_vlan_prepare(ds, port, vlan, extack);
0926     if (err)
0927         return err;
0928 
0929     return ocelot_vlan_add(ocelot, port, vlan->vid,
0930                    flags & BRIDGE_VLAN_INFO_PVID,
0931                    flags & BRIDGE_VLAN_INFO_UNTAGGED);
0932 }
0933 
0934 static int felix_vlan_del(struct dsa_switch *ds, int port,
0935               const struct switchdev_obj_port_vlan *vlan)
0936 {
0937     struct ocelot *ocelot = ds->priv;
0938 
0939     return ocelot_vlan_del(ocelot, port, vlan->vid);
0940 }
0941 
0942 static void felix_phylink_get_caps(struct dsa_switch *ds, int port,
0943                    struct phylink_config *config)
0944 {
0945     struct ocelot *ocelot = ds->priv;
0946 
0947     /* This driver does not make use of the speed, duplex, pause or the
0948      * advertisement in its mac_config, so it is safe to mark this driver
0949      * as non-legacy.
0950      */
0951     config->legacy_pre_march2020 = false;
0952 
0953     __set_bit(ocelot->ports[port]->phy_mode,
0954           config->supported_interfaces);
0955 }
0956 
0957 static void felix_phylink_validate(struct dsa_switch *ds, int port,
0958                    unsigned long *supported,
0959                    struct phylink_link_state *state)
0960 {
0961     struct ocelot *ocelot = ds->priv;
0962     struct felix *felix = ocelot_to_felix(ocelot);
0963 
0964     if (felix->info->phylink_validate)
0965         felix->info->phylink_validate(ocelot, port, supported, state);
0966 }
0967 
0968 static struct phylink_pcs *felix_phylink_mac_select_pcs(struct dsa_switch *ds,
0969                             int port,
0970                             phy_interface_t iface)
0971 {
0972     struct ocelot *ocelot = ds->priv;
0973     struct felix *felix = ocelot_to_felix(ocelot);
0974     struct phylink_pcs *pcs = NULL;
0975 
0976     if (felix->pcs && felix->pcs[port])
0977         pcs = felix->pcs[port];
0978 
0979     return pcs;
0980 }
0981 
0982 static void felix_phylink_mac_link_down(struct dsa_switch *ds, int port,
0983                     unsigned int link_an_mode,
0984                     phy_interface_t interface)
0985 {
0986     struct ocelot *ocelot = ds->priv;
0987 
0988     ocelot_phylink_mac_link_down(ocelot, port, link_an_mode, interface,
0989                      FELIX_MAC_QUIRKS);
0990 }
0991 
0992 static void felix_phylink_mac_link_up(struct dsa_switch *ds, int port,
0993                       unsigned int link_an_mode,
0994                       phy_interface_t interface,
0995                       struct phy_device *phydev,
0996                       int speed, int duplex,
0997                       bool tx_pause, bool rx_pause)
0998 {
0999     struct ocelot *ocelot = ds->priv;
1000     struct felix *felix = ocelot_to_felix(ocelot);
1001 
1002     ocelot_phylink_mac_link_up(ocelot, port, phydev, link_an_mode,
1003                    interface, speed, duplex, tx_pause, rx_pause,
1004                    FELIX_MAC_QUIRKS);
1005 
1006     if (felix->info->port_sched_speed_set)
1007         felix->info->port_sched_speed_set(ocelot, port, speed);
1008 }
1009 
1010 static void felix_port_qos_map_init(struct ocelot *ocelot, int port)
1011 {
1012     int i;
1013 
1014     ocelot_rmw_gix(ocelot,
1015                ANA_PORT_QOS_CFG_QOS_PCP_ENA,
1016                ANA_PORT_QOS_CFG_QOS_PCP_ENA,
1017                ANA_PORT_QOS_CFG,
1018                port);
1019 
1020     for (i = 0; i < OCELOT_NUM_TC * 2; i++) {
1021         ocelot_rmw_ix(ocelot,
1022                   (ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL & i) |
1023                   ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL(i),
1024                   ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL |
1025                   ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL_M,
1026                   ANA_PORT_PCP_DEI_MAP,
1027                   port, i);
1028     }
1029 }
1030 
1031 static void felix_get_strings(struct dsa_switch *ds, int port,
1032                   u32 stringset, u8 *data)
1033 {
1034     struct ocelot *ocelot = ds->priv;
1035 
1036     return ocelot_get_strings(ocelot, port, stringset, data);
1037 }
1038 
1039 static void felix_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data)
1040 {
1041     struct ocelot *ocelot = ds->priv;
1042 
1043     ocelot_get_ethtool_stats(ocelot, port, data);
1044 }
1045 
1046 static int felix_get_sset_count(struct dsa_switch *ds, int port, int sset)
1047 {
1048     struct ocelot *ocelot = ds->priv;
1049 
1050     return ocelot_get_sset_count(ocelot, port, sset);
1051 }
1052 
1053 static int felix_get_ts_info(struct dsa_switch *ds, int port,
1054                  struct ethtool_ts_info *info)
1055 {
1056     struct ocelot *ocelot = ds->priv;
1057 
1058     return ocelot_get_ts_info(ocelot, port, info);
1059 }
1060 
1061 static const u32 felix_phy_match_table[PHY_INTERFACE_MODE_MAX] = {
1062     [PHY_INTERFACE_MODE_INTERNAL] = OCELOT_PORT_MODE_INTERNAL,
1063     [PHY_INTERFACE_MODE_SGMII] = OCELOT_PORT_MODE_SGMII,
1064     [PHY_INTERFACE_MODE_QSGMII] = OCELOT_PORT_MODE_QSGMII,
1065     [PHY_INTERFACE_MODE_USXGMII] = OCELOT_PORT_MODE_USXGMII,
1066     [PHY_INTERFACE_MODE_1000BASEX] = OCELOT_PORT_MODE_1000BASEX,
1067     [PHY_INTERFACE_MODE_2500BASEX] = OCELOT_PORT_MODE_2500BASEX,
1068 };
1069 
1070 static int felix_validate_phy_mode(struct felix *felix, int port,
1071                    phy_interface_t phy_mode)
1072 {
1073     u32 modes = felix->info->port_modes[port];
1074 
1075     if (felix_phy_match_table[phy_mode] & modes)
1076         return 0;
1077     return -EOPNOTSUPP;
1078 }
1079 
1080 static int felix_parse_ports_node(struct felix *felix,
1081                   struct device_node *ports_node,
1082                   phy_interface_t *port_phy_modes)
1083 {
1084     struct device *dev = felix->ocelot.dev;
1085     struct device_node *child;
1086 
1087     for_each_available_child_of_node(ports_node, child) {
1088         phy_interface_t phy_mode;
1089         u32 port;
1090         int err;
1091 
1092         /* Get switch port number from DT */
1093         if (of_property_read_u32(child, "reg", &port) < 0) {
1094             dev_err(dev, "Port number not defined in device tree "
1095                 "(property \"reg\")\n");
1096             of_node_put(child);
1097             return -ENODEV;
1098         }
1099 
1100         /* Get PHY mode from DT */
1101         err = of_get_phy_mode(child, &phy_mode);
1102         if (err) {
1103             dev_err(dev, "Failed to read phy-mode or "
1104                 "phy-interface-type property for port %d\n",
1105                 port);
1106             of_node_put(child);
1107             return -ENODEV;
1108         }
1109 
1110         err = felix_validate_phy_mode(felix, port, phy_mode);
1111         if (err < 0) {
1112             dev_err(dev, "Unsupported PHY mode %s on port %d\n",
1113                 phy_modes(phy_mode), port);
1114             of_node_put(child);
1115             return err;
1116         }
1117 
1118         port_phy_modes[port] = phy_mode;
1119     }
1120 
1121     return 0;
1122 }
1123 
1124 static int felix_parse_dt(struct felix *felix, phy_interface_t *port_phy_modes)
1125 {
1126     struct device *dev = felix->ocelot.dev;
1127     struct device_node *switch_node;
1128     struct device_node *ports_node;
1129     int err;
1130 
1131     switch_node = dev->of_node;
1132 
1133     ports_node = of_get_child_by_name(switch_node, "ports");
1134     if (!ports_node)
1135         ports_node = of_get_child_by_name(switch_node, "ethernet-ports");
1136     if (!ports_node) {
1137         dev_err(dev, "Incorrect bindings: absent \"ports\" or \"ethernet-ports\" node\n");
1138         return -ENODEV;
1139     }
1140 
1141     err = felix_parse_ports_node(felix, ports_node, port_phy_modes);
1142     of_node_put(ports_node);
1143 
1144     return err;
1145 }
1146 
1147 static int felix_init_structs(struct felix *felix, int num_phys_ports)
1148 {
1149     struct ocelot *ocelot = &felix->ocelot;
1150     phy_interface_t *port_phy_modes;
1151     struct resource res;
1152     int port, i, err;
1153 
1154     ocelot->num_phys_ports = num_phys_ports;
1155     ocelot->ports = devm_kcalloc(ocelot->dev, num_phys_ports,
1156                      sizeof(struct ocelot_port *), GFP_KERNEL);
1157     if (!ocelot->ports)
1158         return -ENOMEM;
1159 
1160     ocelot->map     = felix->info->map;
1161     ocelot->stats_layout    = felix->info->stats_layout;
1162     ocelot->num_mact_rows   = felix->info->num_mact_rows;
1163     ocelot->vcap        = felix->info->vcap;
1164     ocelot->vcap_pol.base   = felix->info->vcap_pol_base;
1165     ocelot->vcap_pol.max    = felix->info->vcap_pol_max;
1166     ocelot->vcap_pol.base2  = felix->info->vcap_pol_base2;
1167     ocelot->vcap_pol.max2   = felix->info->vcap_pol_max2;
1168     ocelot->ops     = felix->info->ops;
1169     ocelot->npi_inj_prefix  = OCELOT_TAG_PREFIX_SHORT;
1170     ocelot->npi_xtr_prefix  = OCELOT_TAG_PREFIX_SHORT;
1171     ocelot->devlink     = felix->ds->devlink;
1172 
1173     port_phy_modes = kcalloc(num_phys_ports, sizeof(phy_interface_t),
1174                  GFP_KERNEL);
1175     if (!port_phy_modes)
1176         return -ENOMEM;
1177 
1178     err = felix_parse_dt(felix, port_phy_modes);
1179     if (err) {
1180         kfree(port_phy_modes);
1181         return err;
1182     }
1183 
1184     for (i = 0; i < TARGET_MAX; i++) {
1185         struct regmap *target;
1186 
1187         if (!felix->info->target_io_res[i].name)
1188             continue;
1189 
1190         memcpy(&res, &felix->info->target_io_res[i], sizeof(res));
1191         res.flags = IORESOURCE_MEM;
1192         res.start += felix->switch_base;
1193         res.end += felix->switch_base;
1194 
1195         target = felix->info->init_regmap(ocelot, &res);
1196         if (IS_ERR(target)) {
1197             dev_err(ocelot->dev,
1198                 "Failed to map device memory space\n");
1199             kfree(port_phy_modes);
1200             return PTR_ERR(target);
1201         }
1202 
1203         ocelot->targets[i] = target;
1204     }
1205 
1206     err = ocelot_regfields_init(ocelot, felix->info->regfields);
1207     if (err) {
1208         dev_err(ocelot->dev, "failed to init reg fields map\n");
1209         kfree(port_phy_modes);
1210         return err;
1211     }
1212 
1213     for (port = 0; port < num_phys_ports; port++) {
1214         struct ocelot_port *ocelot_port;
1215         struct regmap *target;
1216 
1217         ocelot_port = devm_kzalloc(ocelot->dev,
1218                        sizeof(struct ocelot_port),
1219                        GFP_KERNEL);
1220         if (!ocelot_port) {
1221             dev_err(ocelot->dev,
1222                 "failed to allocate port memory\n");
1223             kfree(port_phy_modes);
1224             return -ENOMEM;
1225         }
1226 
1227         memcpy(&res, &felix->info->port_io_res[port], sizeof(res));
1228         res.flags = IORESOURCE_MEM;
1229         res.start += felix->switch_base;
1230         res.end += felix->switch_base;
1231 
1232         target = felix->info->init_regmap(ocelot, &res);
1233         if (IS_ERR(target)) {
1234             dev_err(ocelot->dev,
1235                 "Failed to map memory space for port %d\n",
1236                 port);
1237             kfree(port_phy_modes);
1238             return PTR_ERR(target);
1239         }
1240 
1241         ocelot_port->phy_mode = port_phy_modes[port];
1242         ocelot_port->ocelot = ocelot;
1243         ocelot_port->target = target;
1244         ocelot_port->index = port;
1245         ocelot->ports[port] = ocelot_port;
1246     }
1247 
1248     kfree(port_phy_modes);
1249 
1250     if (felix->info->mdio_bus_alloc) {
1251         err = felix->info->mdio_bus_alloc(ocelot);
1252         if (err < 0)
1253             return err;
1254     }
1255 
1256     return 0;
1257 }
1258 
1259 static void ocelot_port_purge_txtstamp_skb(struct ocelot *ocelot, int port,
1260                        struct sk_buff *skb)
1261 {
1262     struct ocelot_port *ocelot_port = ocelot->ports[port];
1263     struct sk_buff *clone = OCELOT_SKB_CB(skb)->clone;
1264     struct sk_buff *skb_match = NULL, *skb_tmp;
1265     unsigned long flags;
1266 
1267     if (!clone)
1268         return;
1269 
1270     spin_lock_irqsave(&ocelot_port->tx_skbs.lock, flags);
1271 
1272     skb_queue_walk_safe(&ocelot_port->tx_skbs, skb, skb_tmp) {
1273         if (skb != clone)
1274             continue;
1275         __skb_unlink(skb, &ocelot_port->tx_skbs);
1276         skb_match = skb;
1277         break;
1278     }
1279 
1280     spin_unlock_irqrestore(&ocelot_port->tx_skbs.lock, flags);
1281 
1282     WARN_ONCE(!skb_match,
1283           "Could not find skb clone in TX timestamping list\n");
1284 }
1285 
1286 #define work_to_xmit_work(w) \
1287         container_of((w), struct felix_deferred_xmit_work, work)
1288 
1289 static void felix_port_deferred_xmit(struct kthread_work *work)
1290 {
1291     struct felix_deferred_xmit_work *xmit_work = work_to_xmit_work(work);
1292     struct dsa_switch *ds = xmit_work->dp->ds;
1293     struct sk_buff *skb = xmit_work->skb;
1294     u32 rew_op = ocelot_ptp_rew_op(skb);
1295     struct ocelot *ocelot = ds->priv;
1296     int port = xmit_work->dp->index;
1297     int retries = 10;
1298 
1299     do {
1300         if (ocelot_can_inject(ocelot, 0))
1301             break;
1302 
1303         cpu_relax();
1304     } while (--retries);
1305 
1306     if (!retries) {
1307         dev_err(ocelot->dev, "port %d failed to inject skb\n",
1308             port);
1309         ocelot_port_purge_txtstamp_skb(ocelot, port, skb);
1310         kfree_skb(skb);
1311         return;
1312     }
1313 
1314     ocelot_port_inject_frame(ocelot, port, 0, rew_op, skb);
1315 
1316     consume_skb(skb);
1317     kfree(xmit_work);
1318 }
1319 
1320 static int felix_connect_tag_protocol(struct dsa_switch *ds,
1321                       enum dsa_tag_protocol proto)
1322 {
1323     struct ocelot_8021q_tagger_data *tagger_data;
1324 
1325     switch (proto) {
1326     case DSA_TAG_PROTO_OCELOT_8021Q:
1327         tagger_data = ocelot_8021q_tagger_data(ds);
1328         tagger_data->xmit_work_fn = felix_port_deferred_xmit;
1329         return 0;
1330     case DSA_TAG_PROTO_OCELOT:
1331     case DSA_TAG_PROTO_SEVILLE:
1332         return 0;
1333     default:
1334         return -EPROTONOSUPPORT;
1335     }
1336 }
1337 
1338 /* Hardware initialization done here so that we can allocate structures with
1339  * devm without fear of dsa_register_switch returning -EPROBE_DEFER and causing
1340  * us to allocate structures twice (leak memory) and map PCI memory twice
1341  * (which will not work).
1342  */
1343 static int felix_setup(struct dsa_switch *ds)
1344 {
1345     struct ocelot *ocelot = ds->priv;
1346     struct felix *felix = ocelot_to_felix(ocelot);
1347     struct dsa_port *dp;
1348     int err;
1349 
1350     err = felix_init_structs(felix, ds->num_ports);
1351     if (err)
1352         return err;
1353 
1354     err = ocelot_init(ocelot);
1355     if (err)
1356         goto out_mdiobus_free;
1357 
1358     if (ocelot->ptp) {
1359         err = ocelot_init_timestamp(ocelot, felix->info->ptp_caps);
1360         if (err) {
1361             dev_err(ocelot->dev,
1362                 "Timestamp initialization failed\n");
1363             ocelot->ptp = 0;
1364         }
1365     }
1366 
1367     dsa_switch_for_each_available_port(dp, ds) {
1368         ocelot_init_port(ocelot, dp->index);
1369 
1370         /* Set the default QoS Classification based on PCP and DEI
1371          * bits of vlan tag.
1372          */
1373         felix_port_qos_map_init(ocelot, dp->index);
1374     }
1375 
1376     err = ocelot_devlink_sb_register(ocelot);
1377     if (err)
1378         goto out_deinit_ports;
1379 
1380     /* The initial tag protocol is NPI which won't fail during initial
1381      * setup, there's no real point in checking for errors.
1382      */
1383     felix_change_tag_protocol(ds, felix->tag_proto);
1384 
1385     ds->mtu_enforcement_ingress = true;
1386     ds->assisted_learning_on_cpu_port = true;
1387     ds->fdb_isolation = true;
1388     ds->max_num_bridges = ds->num_ports;
1389 
1390     return 0;
1391 
1392 out_deinit_ports:
1393     dsa_switch_for_each_available_port(dp, ds)
1394         ocelot_deinit_port(ocelot, dp->index);
1395 
1396     ocelot_deinit_timestamp(ocelot);
1397     ocelot_deinit(ocelot);
1398 
1399 out_mdiobus_free:
1400     if (felix->info->mdio_bus_free)
1401         felix->info->mdio_bus_free(ocelot);
1402 
1403     return err;
1404 }
1405 
1406 static void felix_teardown(struct dsa_switch *ds)
1407 {
1408     struct ocelot *ocelot = ds->priv;
1409     struct felix *felix = ocelot_to_felix(ocelot);
1410     struct dsa_port *dp;
1411 
1412     if (felix->tag_proto_ops)
1413         felix->tag_proto_ops->teardown(ds);
1414 
1415     dsa_switch_for_each_available_port(dp, ds)
1416         ocelot_deinit_port(ocelot, dp->index);
1417 
1418     ocelot_devlink_sb_unregister(ocelot);
1419     ocelot_deinit_timestamp(ocelot);
1420     ocelot_deinit(ocelot);
1421 
1422     if (felix->info->mdio_bus_free)
1423         felix->info->mdio_bus_free(ocelot);
1424 }
1425 
1426 static int felix_hwtstamp_get(struct dsa_switch *ds, int port,
1427                   struct ifreq *ifr)
1428 {
1429     struct ocelot *ocelot = ds->priv;
1430 
1431     return ocelot_hwstamp_get(ocelot, port, ifr);
1432 }
1433 
1434 static int felix_hwtstamp_set(struct dsa_switch *ds, int port,
1435                   struct ifreq *ifr)
1436 {
1437     struct ocelot *ocelot = ds->priv;
1438     struct felix *felix = ocelot_to_felix(ocelot);
1439     bool using_tag_8021q;
1440     int err;
1441 
1442     err = ocelot_hwstamp_set(ocelot, port, ifr);
1443     if (err)
1444         return err;
1445 
1446     using_tag_8021q = felix->tag_proto == DSA_TAG_PROTO_OCELOT_8021Q;
1447 
1448     return felix_update_trapping_destinations(ds, using_tag_8021q);
1449 }
1450 
1451 static bool felix_check_xtr_pkt(struct ocelot *ocelot)
1452 {
1453     struct felix *felix = ocelot_to_felix(ocelot);
1454     int err = 0, grp = 0;
1455 
1456     if (felix->tag_proto != DSA_TAG_PROTO_OCELOT_8021Q)
1457         return false;
1458 
1459     if (!felix->info->quirk_no_xtr_irq)
1460         return false;
1461 
1462     while (ocelot_read(ocelot, QS_XTR_DATA_PRESENT) & BIT(grp)) {
1463         struct sk_buff *skb;
1464         unsigned int type;
1465 
1466         err = ocelot_xtr_poll_frame(ocelot, grp, &skb);
1467         if (err)
1468             goto out;
1469 
1470         /* We trap to the CPU port module all PTP frames, but
1471          * felix_rxtstamp() only gets called for event frames.
1472          * So we need to avoid sending duplicate general
1473          * message frames by running a second BPF classifier
1474          * here and dropping those.
1475          */
1476         __skb_push(skb, ETH_HLEN);
1477 
1478         type = ptp_classify_raw(skb);
1479 
1480         __skb_pull(skb, ETH_HLEN);
1481 
1482         if (type == PTP_CLASS_NONE) {
1483             kfree_skb(skb);
1484             continue;
1485         }
1486 
1487         netif_rx(skb);
1488     }
1489 
1490 out:
1491     if (err < 0) {
1492         dev_err_ratelimited(ocelot->dev,
1493                     "Error during packet extraction: %pe\n",
1494                     ERR_PTR(err));
1495         ocelot_drain_cpu_queue(ocelot, 0);
1496     }
1497 
1498     return true;
1499 }
1500 
1501 static bool felix_rxtstamp(struct dsa_switch *ds, int port,
1502                struct sk_buff *skb, unsigned int type)
1503 {
1504     u32 tstamp_lo = OCELOT_SKB_CB(skb)->tstamp_lo;
1505     struct skb_shared_hwtstamps *shhwtstamps;
1506     struct ocelot *ocelot = ds->priv;
1507     struct timespec64 ts;
1508     u32 tstamp_hi;
1509     u64 tstamp;
1510 
1511     /* If the "no XTR IRQ" workaround is in use, tell DSA to defer this skb
1512      * for RX timestamping. Then free it, and poll for its copy through
1513      * MMIO in the CPU port module, and inject that into the stack from
1514      * ocelot_xtr_poll().
1515      */
1516     if (felix_check_xtr_pkt(ocelot)) {
1517         kfree_skb(skb);
1518         return true;
1519     }
1520 
1521     ocelot_ptp_gettime64(&ocelot->ptp_info, &ts);
1522     tstamp = ktime_set(ts.tv_sec, ts.tv_nsec);
1523 
1524     tstamp_hi = tstamp >> 32;
1525     if ((tstamp & 0xffffffff) < tstamp_lo)
1526         tstamp_hi--;
1527 
1528     tstamp = ((u64)tstamp_hi << 32) | tstamp_lo;
1529 
1530     shhwtstamps = skb_hwtstamps(skb);
1531     memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps));
1532     shhwtstamps->hwtstamp = tstamp;
1533     return false;
1534 }
1535 
1536 static void felix_txtstamp(struct dsa_switch *ds, int port,
1537                struct sk_buff *skb)
1538 {
1539     struct ocelot *ocelot = ds->priv;
1540     struct sk_buff *clone = NULL;
1541 
1542     if (!ocelot->ptp)
1543         return;
1544 
1545     if (ocelot_port_txtstamp_request(ocelot, port, skb, &clone)) {
1546         dev_err_ratelimited(ds->dev,
1547                     "port %d delivering skb without TX timestamp\n",
1548                     port);
1549         return;
1550     }
1551 
1552     if (clone)
1553         OCELOT_SKB_CB(skb)->clone = clone;
1554 }
1555 
1556 static int felix_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
1557 {
1558     struct ocelot *ocelot = ds->priv;
1559     struct ocelot_port *ocelot_port = ocelot->ports[port];
1560     struct felix *felix = ocelot_to_felix(ocelot);
1561 
1562     ocelot_port_set_maxlen(ocelot, port, new_mtu);
1563 
1564     mutex_lock(&ocelot->tas_lock);
1565 
1566     if (ocelot_port->taprio && felix->info->tas_guard_bands_update)
1567         felix->info->tas_guard_bands_update(ocelot, port);
1568 
1569     mutex_unlock(&ocelot->tas_lock);
1570 
1571     return 0;
1572 }
1573 
1574 static int felix_get_max_mtu(struct dsa_switch *ds, int port)
1575 {
1576     struct ocelot *ocelot = ds->priv;
1577 
1578     return ocelot_get_max_mtu(ocelot, port);
1579 }
1580 
1581 static int felix_cls_flower_add(struct dsa_switch *ds, int port,
1582                 struct flow_cls_offload *cls, bool ingress)
1583 {
1584     struct ocelot *ocelot = ds->priv;
1585     struct felix *felix = ocelot_to_felix(ocelot);
1586     bool using_tag_8021q;
1587     int err;
1588 
1589     err = ocelot_cls_flower_replace(ocelot, port, cls, ingress);
1590     if (err)
1591         return err;
1592 
1593     using_tag_8021q = felix->tag_proto == DSA_TAG_PROTO_OCELOT_8021Q;
1594 
1595     return felix_update_trapping_destinations(ds, using_tag_8021q);
1596 }
1597 
1598 static int felix_cls_flower_del(struct dsa_switch *ds, int port,
1599                 struct flow_cls_offload *cls, bool ingress)
1600 {
1601     struct ocelot *ocelot = ds->priv;
1602 
1603     return ocelot_cls_flower_destroy(ocelot, port, cls, ingress);
1604 }
1605 
1606 static int felix_cls_flower_stats(struct dsa_switch *ds, int port,
1607                   struct flow_cls_offload *cls, bool ingress)
1608 {
1609     struct ocelot *ocelot = ds->priv;
1610 
1611     return ocelot_cls_flower_stats(ocelot, port, cls, ingress);
1612 }
1613 
1614 static int felix_port_policer_add(struct dsa_switch *ds, int port,
1615                   struct dsa_mall_policer_tc_entry *policer)
1616 {
1617     struct ocelot *ocelot = ds->priv;
1618     struct ocelot_policer pol = {
1619         .rate = div_u64(policer->rate_bytes_per_sec, 1000) * 8,
1620         .burst = policer->burst,
1621     };
1622 
1623     return ocelot_port_policer_add(ocelot, port, &pol);
1624 }
1625 
1626 static void felix_port_policer_del(struct dsa_switch *ds, int port)
1627 {
1628     struct ocelot *ocelot = ds->priv;
1629 
1630     ocelot_port_policer_del(ocelot, port);
1631 }
1632 
1633 static int felix_port_mirror_add(struct dsa_switch *ds, int port,
1634                  struct dsa_mall_mirror_tc_entry *mirror,
1635                  bool ingress, struct netlink_ext_ack *extack)
1636 {
1637     struct ocelot *ocelot = ds->priv;
1638 
1639     return ocelot_port_mirror_add(ocelot, port, mirror->to_local_port,
1640                       ingress, extack);
1641 }
1642 
1643 static void felix_port_mirror_del(struct dsa_switch *ds, int port,
1644                   struct dsa_mall_mirror_tc_entry *mirror)
1645 {
1646     struct ocelot *ocelot = ds->priv;
1647 
1648     ocelot_port_mirror_del(ocelot, port, mirror->ingress);
1649 }
1650 
1651 static int felix_port_setup_tc(struct dsa_switch *ds, int port,
1652                    enum tc_setup_type type,
1653                    void *type_data)
1654 {
1655     struct ocelot *ocelot = ds->priv;
1656     struct felix *felix = ocelot_to_felix(ocelot);
1657 
1658     if (felix->info->port_setup_tc)
1659         return felix->info->port_setup_tc(ds, port, type, type_data);
1660     else
1661         return -EOPNOTSUPP;
1662 }
1663 
1664 static int felix_sb_pool_get(struct dsa_switch *ds, unsigned int sb_index,
1665                  u16 pool_index,
1666                  struct devlink_sb_pool_info *pool_info)
1667 {
1668     struct ocelot *ocelot = ds->priv;
1669 
1670     return ocelot_sb_pool_get(ocelot, sb_index, pool_index, pool_info);
1671 }
1672 
1673 static int felix_sb_pool_set(struct dsa_switch *ds, unsigned int sb_index,
1674                  u16 pool_index, u32 size,
1675                  enum devlink_sb_threshold_type threshold_type,
1676                  struct netlink_ext_ack *extack)
1677 {
1678     struct ocelot *ocelot = ds->priv;
1679 
1680     return ocelot_sb_pool_set(ocelot, sb_index, pool_index, size,
1681                   threshold_type, extack);
1682 }
1683 
1684 static int felix_sb_port_pool_get(struct dsa_switch *ds, int port,
1685                   unsigned int sb_index, u16 pool_index,
1686                   u32 *p_threshold)
1687 {
1688     struct ocelot *ocelot = ds->priv;
1689 
1690     return ocelot_sb_port_pool_get(ocelot, port, sb_index, pool_index,
1691                        p_threshold);
1692 }
1693 
1694 static int felix_sb_port_pool_set(struct dsa_switch *ds, int port,
1695                   unsigned int sb_index, u16 pool_index,
1696                   u32 threshold, struct netlink_ext_ack *extack)
1697 {
1698     struct ocelot *ocelot = ds->priv;
1699 
1700     return ocelot_sb_port_pool_set(ocelot, port, sb_index, pool_index,
1701                        threshold, extack);
1702 }
1703 
1704 static int felix_sb_tc_pool_bind_get(struct dsa_switch *ds, int port,
1705                      unsigned int sb_index, u16 tc_index,
1706                      enum devlink_sb_pool_type pool_type,
1707                      u16 *p_pool_index, u32 *p_threshold)
1708 {
1709     struct ocelot *ocelot = ds->priv;
1710 
1711     return ocelot_sb_tc_pool_bind_get(ocelot, port, sb_index, tc_index,
1712                       pool_type, p_pool_index,
1713                       p_threshold);
1714 }
1715 
1716 static int felix_sb_tc_pool_bind_set(struct dsa_switch *ds, int port,
1717                      unsigned int sb_index, u16 tc_index,
1718                      enum devlink_sb_pool_type pool_type,
1719                      u16 pool_index, u32 threshold,
1720                      struct netlink_ext_ack *extack)
1721 {
1722     struct ocelot *ocelot = ds->priv;
1723 
1724     return ocelot_sb_tc_pool_bind_set(ocelot, port, sb_index, tc_index,
1725                       pool_type, pool_index, threshold,
1726                       extack);
1727 }
1728 
1729 static int felix_sb_occ_snapshot(struct dsa_switch *ds,
1730                  unsigned int sb_index)
1731 {
1732     struct ocelot *ocelot = ds->priv;
1733 
1734     return ocelot_sb_occ_snapshot(ocelot, sb_index);
1735 }
1736 
1737 static int felix_sb_occ_max_clear(struct dsa_switch *ds,
1738                   unsigned int sb_index)
1739 {
1740     struct ocelot *ocelot = ds->priv;
1741 
1742     return ocelot_sb_occ_max_clear(ocelot, sb_index);
1743 }
1744 
1745 static int felix_sb_occ_port_pool_get(struct dsa_switch *ds, int port,
1746                       unsigned int sb_index, u16 pool_index,
1747                       u32 *p_cur, u32 *p_max)
1748 {
1749     struct ocelot *ocelot = ds->priv;
1750 
1751     return ocelot_sb_occ_port_pool_get(ocelot, port, sb_index, pool_index,
1752                        p_cur, p_max);
1753 }
1754 
1755 static int felix_sb_occ_tc_port_bind_get(struct dsa_switch *ds, int port,
1756                      unsigned int sb_index, u16 tc_index,
1757                      enum devlink_sb_pool_type pool_type,
1758                      u32 *p_cur, u32 *p_max)
1759 {
1760     struct ocelot *ocelot = ds->priv;
1761 
1762     return ocelot_sb_occ_tc_port_bind_get(ocelot, port, sb_index, tc_index,
1763                           pool_type, p_cur, p_max);
1764 }
1765 
1766 static int felix_mrp_add(struct dsa_switch *ds, int port,
1767              const struct switchdev_obj_mrp *mrp)
1768 {
1769     struct ocelot *ocelot = ds->priv;
1770 
1771     return ocelot_mrp_add(ocelot, port, mrp);
1772 }
1773 
1774 static int felix_mrp_del(struct dsa_switch *ds, int port,
1775              const struct switchdev_obj_mrp *mrp)
1776 {
1777     struct ocelot *ocelot = ds->priv;
1778 
1779     return ocelot_mrp_add(ocelot, port, mrp);
1780 }
1781 
1782 static int
1783 felix_mrp_add_ring_role(struct dsa_switch *ds, int port,
1784             const struct switchdev_obj_ring_role_mrp *mrp)
1785 {
1786     struct ocelot *ocelot = ds->priv;
1787 
1788     return ocelot_mrp_add_ring_role(ocelot, port, mrp);
1789 }
1790 
1791 static int
1792 felix_mrp_del_ring_role(struct dsa_switch *ds, int port,
1793             const struct switchdev_obj_ring_role_mrp *mrp)
1794 {
1795     struct ocelot *ocelot = ds->priv;
1796 
1797     return ocelot_mrp_del_ring_role(ocelot, port, mrp);
1798 }
1799 
1800 static int felix_port_get_default_prio(struct dsa_switch *ds, int port)
1801 {
1802     struct ocelot *ocelot = ds->priv;
1803 
1804     return ocelot_port_get_default_prio(ocelot, port);
1805 }
1806 
1807 static int felix_port_set_default_prio(struct dsa_switch *ds, int port,
1808                        u8 prio)
1809 {
1810     struct ocelot *ocelot = ds->priv;
1811 
1812     return ocelot_port_set_default_prio(ocelot, port, prio);
1813 }
1814 
1815 static int felix_port_get_dscp_prio(struct dsa_switch *ds, int port, u8 dscp)
1816 {
1817     struct ocelot *ocelot = ds->priv;
1818 
1819     return ocelot_port_get_dscp_prio(ocelot, port, dscp);
1820 }
1821 
1822 static int felix_port_add_dscp_prio(struct dsa_switch *ds, int port, u8 dscp,
1823                     u8 prio)
1824 {
1825     struct ocelot *ocelot = ds->priv;
1826 
1827     return ocelot_port_add_dscp_prio(ocelot, port, dscp, prio);
1828 }
1829 
1830 static int felix_port_del_dscp_prio(struct dsa_switch *ds, int port, u8 dscp,
1831                     u8 prio)
1832 {
1833     struct ocelot *ocelot = ds->priv;
1834 
1835     return ocelot_port_del_dscp_prio(ocelot, port, dscp, prio);
1836 }
1837 
1838 const struct dsa_switch_ops felix_switch_ops = {
1839     .get_tag_protocol       = felix_get_tag_protocol,
1840     .change_tag_protocol        = felix_change_tag_protocol,
1841     .connect_tag_protocol       = felix_connect_tag_protocol,
1842     .setup              = felix_setup,
1843     .teardown           = felix_teardown,
1844     .set_ageing_time        = felix_set_ageing_time,
1845     .get_strings            = felix_get_strings,
1846     .get_ethtool_stats      = felix_get_ethtool_stats,
1847     .get_sset_count         = felix_get_sset_count,
1848     .get_ts_info            = felix_get_ts_info,
1849     .phylink_get_caps       = felix_phylink_get_caps,
1850     .phylink_validate       = felix_phylink_validate,
1851     .phylink_mac_select_pcs     = felix_phylink_mac_select_pcs,
1852     .phylink_mac_link_down      = felix_phylink_mac_link_down,
1853     .phylink_mac_link_up        = felix_phylink_mac_link_up,
1854     .port_fast_age          = felix_port_fast_age,
1855     .port_fdb_dump          = felix_fdb_dump,
1856     .port_fdb_add           = felix_fdb_add,
1857     .port_fdb_del           = felix_fdb_del,
1858     .lag_fdb_add            = felix_lag_fdb_add,
1859     .lag_fdb_del            = felix_lag_fdb_del,
1860     .port_mdb_add           = felix_mdb_add,
1861     .port_mdb_del           = felix_mdb_del,
1862     .port_pre_bridge_flags      = felix_pre_bridge_flags,
1863     .port_bridge_flags      = felix_bridge_flags,
1864     .port_bridge_join       = felix_bridge_join,
1865     .port_bridge_leave      = felix_bridge_leave,
1866     .port_lag_join          = felix_lag_join,
1867     .port_lag_leave         = felix_lag_leave,
1868     .port_lag_change        = felix_lag_change,
1869     .port_stp_state_set     = felix_bridge_stp_state_set,
1870     .port_vlan_filtering        = felix_vlan_filtering,
1871     .port_vlan_add          = felix_vlan_add,
1872     .port_vlan_del          = felix_vlan_del,
1873     .port_hwtstamp_get      = felix_hwtstamp_get,
1874     .port_hwtstamp_set      = felix_hwtstamp_set,
1875     .port_rxtstamp          = felix_rxtstamp,
1876     .port_txtstamp          = felix_txtstamp,
1877     .port_change_mtu        = felix_change_mtu,
1878     .port_max_mtu           = felix_get_max_mtu,
1879     .port_policer_add       = felix_port_policer_add,
1880     .port_policer_del       = felix_port_policer_del,
1881     .port_mirror_add        = felix_port_mirror_add,
1882     .port_mirror_del        = felix_port_mirror_del,
1883     .cls_flower_add         = felix_cls_flower_add,
1884     .cls_flower_del         = felix_cls_flower_del,
1885     .cls_flower_stats       = felix_cls_flower_stats,
1886     .port_setup_tc          = felix_port_setup_tc,
1887     .devlink_sb_pool_get        = felix_sb_pool_get,
1888     .devlink_sb_pool_set        = felix_sb_pool_set,
1889     .devlink_sb_port_pool_get   = felix_sb_port_pool_get,
1890     .devlink_sb_port_pool_set   = felix_sb_port_pool_set,
1891     .devlink_sb_tc_pool_bind_get    = felix_sb_tc_pool_bind_get,
1892     .devlink_sb_tc_pool_bind_set    = felix_sb_tc_pool_bind_set,
1893     .devlink_sb_occ_snapshot    = felix_sb_occ_snapshot,
1894     .devlink_sb_occ_max_clear   = felix_sb_occ_max_clear,
1895     .devlink_sb_occ_port_pool_get   = felix_sb_occ_port_pool_get,
1896     .devlink_sb_occ_tc_port_bind_get= felix_sb_occ_tc_port_bind_get,
1897     .port_mrp_add           = felix_mrp_add,
1898     .port_mrp_del           = felix_mrp_del,
1899     .port_mrp_add_ring_role     = felix_mrp_add_ring_role,
1900     .port_mrp_del_ring_role     = felix_mrp_del_ring_role,
1901     .tag_8021q_vlan_add     = felix_tag_8021q_vlan_add,
1902     .tag_8021q_vlan_del     = felix_tag_8021q_vlan_del,
1903     .port_get_default_prio      = felix_port_get_default_prio,
1904     .port_set_default_prio      = felix_port_set_default_prio,
1905     .port_get_dscp_prio     = felix_port_get_dscp_prio,
1906     .port_add_dscp_prio     = felix_port_add_dscp_prio,
1907     .port_del_dscp_prio     = felix_port_del_dscp_prio,
1908     .port_set_host_flood        = felix_port_set_host_flood,
1909 };
1910 
1911 struct net_device *felix_port_to_netdev(struct ocelot *ocelot, int port)
1912 {
1913     struct felix *felix = ocelot_to_felix(ocelot);
1914     struct dsa_switch *ds = felix->ds;
1915 
1916     if (!dsa_is_user_port(ds, port))
1917         return NULL;
1918 
1919     return dsa_to_port(ds, port)->slave;
1920 }
1921 
1922 int felix_netdev_to_port(struct net_device *dev)
1923 {
1924     struct dsa_port *dp;
1925 
1926     dp = dsa_port_from_netdev(dev);
1927     if (IS_ERR(dp))
1928         return -EINVAL;
1929 
1930     return dp->index;
1931 }
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