dsa/mv88e6xxx/hwtstamp.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * Marvell 88E6xxx Switch hardware timestamping support
0004  *
0005  * Copyright (c) 2008 Marvell Semiconductor
0006  *
0007  * Copyright (c) 2017 National Instruments
0008  *      Erik Hons <erik.hons@ni.com>
0009  *      Brandon Streiff <brandon.streiff@ni.com>
0010  *      Dane Wagner <dane.wagner@ni.com>
0011  */
0012
0013 #ifndef _MV88E6XXX_HWTSTAMP_H
0014 #define _MV88E6XXX_HWTSTAMP_H
0015
0016 #include "chip.h"
0017
0018 /* Global 6352 PTP registers */
0019 /* Offset 0x00: PTP EtherType */
0020 #define MV88E6XXX_PTP_ETHERTYPE 0x00
0021
0022 /* Offset 0x01: Message Type Timestamp Enables */
0023 #define MV88E6XXX_PTP_MSGTYPE           0x01
0024 #define MV88E6XXX_PTP_MSGTYPE_SYNC      0x0001
0025 #define MV88E6XXX_PTP_MSGTYPE_DELAY_REQ     0x0002
0026 #define MV88E6XXX_PTP_MSGTYPE_PDLAY_REQ     0x0004
0027 #define MV88E6XXX_PTP_MSGTYPE_PDLAY_RES     0x0008
0028 #define MV88E6XXX_PTP_MSGTYPE_ALL_EVENT     0x000f
0029
0030 /* Offset 0x02: Timestamp Arrival Capture Pointers */
0031 #define MV88E6XXX_PTP_TS_ARRIVAL_PTR    0x02
0032
0033 /* Offset 0x05: PTP Global Configuration */
0034 #define MV88E6165_PTP_CFG           0x05
0035 #define MV88E6165_PTP_CFG_TSPEC_MASK        0xf000
0036 #define MV88E6165_PTP_CFG_DISABLE_TS_OVERWRITE  BIT(1)
0037 #define MV88E6165_PTP_CFG_DISABLE_PTP       BIT(0)
0038
0039 /* Offset 0x07: PTP Global Configuration */
0040 #define MV88E6341_PTP_CFG           0x07
0041 #define MV88E6341_PTP_CFG_UPDATE        0x8000
0042 #define MV88E6341_PTP_CFG_IDX_MASK      0x7f00
0043 #define MV88E6341_PTP_CFG_DATA_MASK     0x00ff
0044 #define MV88E6341_PTP_CFG_MODE_IDX      0x0
0045 #define MV88E6341_PTP_CFG_MODE_TS_AT_PHY    0x00
0046 #define MV88E6341_PTP_CFG_MODE_TS_AT_MAC    0x80
0047
0048 /* Offset 0x08: PTP Interrupt Status */
0049 #define MV88E6XXX_PTP_IRQ_STATUS    0x08
0050
0051 /* Per-Port 6352 PTP Registers */
0052 /* Offset 0x00: PTP Configuration 0 */
0053 #define MV88E6XXX_PORT_PTP_CFG0             0x00
0054 #define MV88E6XXX_PORT_PTP_CFG0_TSPEC_SHIFT     12
0055 #define MV88E6XXX_PORT_PTP_CFG0_TSPEC_MASK      0xf000
0056 #define MV88E6XXX_PORT_PTP_CFG0_TSPEC_1588      0x0000
0057 #define MV88E6XXX_PORT_PTP_CFG0_TSPEC_8021AS        0x1000
0058 #define MV88E6XXX_PORT_PTP_CFG0_DISABLE_TSPEC_MATCH 0x0800
0059 #define MV88E6XXX_PORT_PTP_CFG0_DISABLE_OVERWRITE   0x0002
0060 #define MV88E6XXX_PORT_PTP_CFG0_DISABLE_PTP     0x0001
0061
0062 /* Offset 0x01: PTP Configuration 1 */
0063 #define MV88E6XXX_PORT_PTP_CFG1 0x01
0064
0065 /* Offset 0x02: PTP Configuration 2 */
0066 #define MV88E6XXX_PORT_PTP_CFG2             0x02
0067 #define MV88E6XXX_PORT_PTP_CFG2_EMBED_ARRIVAL       0x1000
0068 #define MV88E6XXX_PORT_PTP_CFG2_DEP_IRQ_EN      0x0002
0069 #define MV88E6XXX_PORT_PTP_CFG2_ARR_IRQ_EN      0x0001
0070
0071 /* Offset 0x03: PTP LED Configuration */
0072 #define MV88E6XXX_PORT_PTP_LED_CFG  0x03
0073
0074 /* Offset 0x08: PTP Arrival 0 Status */
0075 #define MV88E6XXX_PORT_PTP_ARR0_STS 0x08
0076
0077 /* Offset 0x09/0x0A: PTP Arrival 0 Time */
0078 #define MV88E6XXX_PORT_PTP_ARR0_TIME_LO 0x09
0079 #define MV88E6XXX_PORT_PTP_ARR0_TIME_HI 0x0a
0080
0081 /* Offset 0x0B: PTP Arrival 0 Sequence ID */
0082 #define MV88E6XXX_PORT_PTP_ARR0_SEQID   0x0b
0083
0084 /* Offset 0x0C: PTP Arrival 1 Status */
0085 #define MV88E6XXX_PORT_PTP_ARR1_STS 0x0c
0086
0087 /* Offset 0x0D/0x0E: PTP Arrival 1 Time */
0088 #define MV88E6XXX_PORT_PTP_ARR1_TIME_LO 0x0d
0089 #define MV88E6XXX_PORT_PTP_ARR1_TIME_HI 0x0e
0090
0091 /* Offset 0x0F: PTP Arrival 1 Sequence ID */
0092 #define MV88E6XXX_PORT_PTP_ARR1_SEQID   0x0f
0093
0094 /* Offset 0x10: PTP Departure Status */
0095 #define MV88E6XXX_PORT_PTP_DEP_STS  0x10
0096
0097 /* Offset 0x11/0x12: PTP Deperture Time */
0098 #define MV88E6XXX_PORT_PTP_DEP_TIME_LO  0x11
0099 #define MV88E6XXX_PORT_PTP_DEP_TIME_HI  0x12
0100
0101 /* Offset 0x13: PTP Departure Sequence ID */
0102 #define MV88E6XXX_PORT_PTP_DEP_SEQID    0x13
0103
0104 /* Status fields for arrival and depature timestamp status registers */
0105 #define MV88E6XXX_PTP_TS_STATUS_MASK        0x0006
0106 #define MV88E6XXX_PTP_TS_STATUS_NORMAL      0x0000
0107 #define MV88E6XXX_PTP_TS_STATUS_OVERWITTEN  0x0002
0108 #define MV88E6XXX_PTP_TS_STATUS_DISCARDED   0x0004
0109 #define MV88E6XXX_PTP_TS_VALID          0x0001
0110
0111 #ifdef CONFIG_NET_DSA_MV88E6XXX_PTP
0112
0113 int mv88e6xxx_port_hwtstamp_set(struct dsa_switch *ds, int port,
0114                 struct ifreq *ifr);
0115 int mv88e6xxx_port_hwtstamp_get(struct dsa_switch *ds, int port,
0116                 struct ifreq *ifr);
0117
0118 bool mv88e6xxx_port_rxtstamp(struct dsa_switch *ds, int port,
0119                  struct sk_buff *clone, unsigned int type);
0120 void mv88e6xxx_port_txtstamp(struct dsa_switch *ds, int port,
0121                  struct sk_buff *skb);
0122
0123 int mv88e6xxx_get_ts_info(struct dsa_switch *ds, int port,
0124               struct ethtool_ts_info *info);
0125
0126 int mv88e6xxx_hwtstamp_setup(struct mv88e6xxx_chip *chip);
0127 void mv88e6xxx_hwtstamp_free(struct mv88e6xxx_chip *chip);
0128 int mv88e6352_hwtstamp_port_enable(struct mv88e6xxx_chip *chip, int port);
0129 int mv88e6352_hwtstamp_port_disable(struct mv88e6xxx_chip *chip, int port);
0130 int mv88e6165_global_enable(struct mv88e6xxx_chip *chip);
0131 int mv88e6165_global_disable(struct mv88e6xxx_chip *chip);
0132
0133 #else /* !CONFIG_NET_DSA_MV88E6XXX_PTP */
0134
0135 static inline int mv88e6xxx_port_hwtstamp_set(struct dsa_switch *ds,
0136                           int port, struct ifreq *ifr)
0137 {
0138     return -EOPNOTSUPP;
0139 }
0140
0141 static inline int mv88e6xxx_port_hwtstamp_get(struct dsa_switch *ds,
0142                           int port, struct ifreq *ifr)
0143 {
0144     return -EOPNOTSUPP;
0145 }
0146
0147 static inline bool mv88e6xxx_port_rxtstamp(struct dsa_switch *ds, int port,
0148                        struct sk_buff *clone,
0149                        unsigned int type)
0150 {
0151     return false;
0152 }
0153
0154 static inline void mv88e6xxx_port_txtstamp(struct dsa_switch *ds, int port,
0155                        struct sk_buff *skb)
0156 {
0157 }
0158
0159 static inline int mv88e6xxx_get_ts_info(struct dsa_switch *ds, int port,
0160                     struct ethtool_ts_info *info)
0161 {
0162     return -EOPNOTSUPP;
0163 }
0164
0165 static inline int mv88e6xxx_hwtstamp_setup(struct mv88e6xxx_chip *chip)
0166 {
0167     return 0;
0168 }
0169
0170 static inline void mv88e6xxx_hwtstamp_free(struct mv88e6xxx_chip *chip)
0171 {
0172 }
0173
0174 #endif /* CONFIG_NET_DSA_MV88E6XXX_PTP */
0175
0176 #endif /* _MV88E6XXX_HWTSTAMP_H */