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0008 #include <linux/list.h>
0009 #include <linux/ethtool.h>
0010 #include <linux/if_ether.h>
0011 #include <linux/in.h>
0012 #include <linux/netdevice.h>
0013 #include <net/dsa.h>
0014 #include <linux/bitmap.h>
0015 #include <net/flow_offload.h>
0016 #include <net/switchdev.h>
0017 #include <uapi/linux/if_bridge.h>
0018
0019 #include "bcm_sf2.h"
0020 #include "bcm_sf2_regs.h"
0021
0022 struct cfp_rule {
0023 int port;
0024 struct ethtool_rx_flow_spec fs;
0025 struct list_head next;
0026 };
0027
0028 struct cfp_udf_slice_layout {
0029 u8 slices[UDFS_PER_SLICE];
0030 u32 mask_value;
0031 u32 base_offset;
0032 };
0033
0034 struct cfp_udf_layout {
0035 struct cfp_udf_slice_layout udfs[UDF_NUM_SLICES];
0036 };
0037
0038 static const u8 zero_slice[UDFS_PER_SLICE] = { };
0039
0040
0041 static const struct cfp_udf_layout udf_tcpip4_layout = {
0042 .udfs = {
0043 [1] = {
0044 .slices = {
0045
0046 CFG_UDF_EOL2 | 6,
0047
0048 CFG_UDF_EOL2 | 7,
0049
0050 CFG_UDF_EOL2 | 8,
0051
0052 CFG_UDF_EOL2 | 9,
0053
0054 CFG_UDF_EOL3 | 0,
0055
0056 CFG_UDF_EOL3 | 1,
0057 0, 0, 0
0058 },
0059 .mask_value = L3_FRAMING_MASK | IPPROTO_MASK | IP_FRAG,
0060 .base_offset = CORE_UDF_0_A_0_8_PORT_0 + UDF_SLICE_OFFSET,
0061 },
0062 },
0063 };
0064
0065
0066 static const struct cfp_udf_layout udf_tcpip6_layout = {
0067 .udfs = {
0068 [0] = {
0069 .slices = {
0070
0071 CFG_UDF_EOL2 | 4,
0072
0073 CFG_UDF_EOL2 | 5,
0074
0075 CFG_UDF_EOL2 | 6,
0076
0077 CFG_UDF_EOL2 | 7,
0078
0079 CFG_UDF_EOL2 | 8,
0080
0081 CFG_UDF_EOL2 | 9,
0082
0083 CFG_UDF_EOL2 | 10,
0084
0085 CFG_UDF_EOL2 | 11,
0086
0087 CFG_UDF_EOL3 | 0,
0088 },
0089 .mask_value = L3_FRAMING_MASK | IPPROTO_MASK | IP_FRAG,
0090 .base_offset = CORE_UDF_0_B_0_8_PORT_0,
0091 },
0092 [3] = {
0093 .slices = {
0094
0095 CFG_UDF_EOL2 | 12,
0096
0097 CFG_UDF_EOL2 | 13,
0098
0099 CFG_UDF_EOL2 | 14,
0100
0101 CFG_UDF_EOL2 | 15,
0102
0103 CFG_UDF_EOL2 | 16,
0104
0105 CFG_UDF_EOL2 | 17,
0106
0107 CFG_UDF_EOL2 | 18,
0108
0109 CFG_UDF_EOL2 | 19,
0110
0111 CFG_UDF_EOL3 | 1,
0112 },
0113 .mask_value = L3_FRAMING_MASK | IPPROTO_MASK | IP_FRAG,
0114 .base_offset = CORE_UDF_0_D_0_11_PORT_0,
0115 },
0116 },
0117 };
0118
0119 static inline unsigned int bcm_sf2_get_num_udf_slices(const u8 *layout)
0120 {
0121 unsigned int i, count = 0;
0122
0123 for (i = 0; i < UDFS_PER_SLICE; i++) {
0124 if (layout[i] != 0)
0125 count++;
0126 }
0127
0128 return count;
0129 }
0130
0131 static inline u32 udf_upper_bits(int num_udf)
0132 {
0133 return GENMASK(num_udf - 1, 0) >> (UDFS_PER_SLICE - 1);
0134 }
0135
0136 static inline u32 udf_lower_bits(int num_udf)
0137 {
0138 return (u8)GENMASK(num_udf - 1, 0);
0139 }
0140
0141 static unsigned int bcm_sf2_get_slice_number(const struct cfp_udf_layout *l,
0142 unsigned int start)
0143 {
0144 const struct cfp_udf_slice_layout *slice_layout;
0145 unsigned int slice_idx;
0146
0147 for (slice_idx = start; slice_idx < UDF_NUM_SLICES; slice_idx++) {
0148 slice_layout = &l->udfs[slice_idx];
0149 if (memcmp(slice_layout->slices, zero_slice,
0150 sizeof(zero_slice)))
0151 break;
0152 }
0153
0154 return slice_idx;
0155 }
0156
0157 static void bcm_sf2_cfp_udf_set(struct bcm_sf2_priv *priv,
0158 const struct cfp_udf_layout *layout,
0159 unsigned int slice_num)
0160 {
0161 u32 offset = layout->udfs[slice_num].base_offset;
0162 unsigned int i;
0163
0164 for (i = 0; i < UDFS_PER_SLICE; i++)
0165 core_writel(priv, layout->udfs[slice_num].slices[i],
0166 offset + i * 4);
0167 }
0168
0169 static int bcm_sf2_cfp_op(struct bcm_sf2_priv *priv, unsigned int op)
0170 {
0171 unsigned int timeout = 1000;
0172 u32 reg;
0173
0174 reg = core_readl(priv, CORE_CFP_ACC);
0175 reg &= ~(OP_SEL_MASK | RAM_SEL_MASK);
0176 reg |= OP_STR_DONE | op;
0177 core_writel(priv, reg, CORE_CFP_ACC);
0178
0179 do {
0180 reg = core_readl(priv, CORE_CFP_ACC);
0181 if (!(reg & OP_STR_DONE))
0182 break;
0183
0184 cpu_relax();
0185 } while (timeout--);
0186
0187 if (!timeout)
0188 return -ETIMEDOUT;
0189
0190 return 0;
0191 }
0192
0193 static inline void bcm_sf2_cfp_rule_addr_set(struct bcm_sf2_priv *priv,
0194 unsigned int addr)
0195 {
0196 u32 reg;
0197
0198 WARN_ON(addr >= priv->num_cfp_rules);
0199
0200 reg = core_readl(priv, CORE_CFP_ACC);
0201 reg &= ~(XCESS_ADDR_MASK << XCESS_ADDR_SHIFT);
0202 reg |= addr << XCESS_ADDR_SHIFT;
0203 core_writel(priv, reg, CORE_CFP_ACC);
0204 }
0205
0206 static inline unsigned int bcm_sf2_cfp_rule_size(struct bcm_sf2_priv *priv)
0207 {
0208
0209 return priv->num_cfp_rules - 1;
0210 }
0211
0212 static int bcm_sf2_cfp_act_pol_set(struct bcm_sf2_priv *priv,
0213 unsigned int rule_index,
0214 int src_port,
0215 unsigned int port_num,
0216 unsigned int queue_num,
0217 bool fwd_map_change)
0218 {
0219 int ret;
0220 u32 reg;
0221
0222
0223
0224
0225 if (fwd_map_change)
0226 reg = CHANGE_FWRD_MAP_IB_REP_ARL |
0227 BIT(port_num + DST_MAP_IB_SHIFT) |
0228 CHANGE_TC | queue_num << NEW_TC_SHIFT;
0229 else
0230 reg = 0;
0231
0232
0233 if (src_port == port_num)
0234 reg |= LOOP_BK_EN;
0235
0236 core_writel(priv, reg, CORE_ACT_POL_DATA0);
0237
0238
0239 core_writel(priv, rule_index << CHAIN_ID_SHIFT, CORE_ACT_POL_DATA1);
0240
0241 core_writel(priv, 0, CORE_ACT_POL_DATA2);
0242
0243
0244 ret = bcm_sf2_cfp_op(priv, OP_SEL_WRITE | ACT_POL_RAM);
0245 if (ret) {
0246 pr_err("Policer entry at %d failed\n", rule_index);
0247 return ret;
0248 }
0249
0250
0251 core_writel(priv, POLICER_MODE_DISABLE, CORE_RATE_METER0);
0252
0253
0254 ret = bcm_sf2_cfp_op(priv, OP_SEL_WRITE | RATE_METER_RAM);
0255 if (ret) {
0256 pr_err("Meter entry at %d failed\n", rule_index);
0257 return ret;
0258 }
0259
0260 return 0;
0261 }
0262
0263 static void bcm_sf2_cfp_slice_ipv4(struct bcm_sf2_priv *priv,
0264 struct flow_dissector_key_ipv4_addrs *addrs,
0265 struct flow_dissector_key_ports *ports,
0266 const __be16 vlan_tci,
0267 unsigned int slice_num, u8 num_udf,
0268 bool mask)
0269 {
0270 u32 reg, offset;
0271
0272
0273
0274
0275
0276 reg = udf_lower_bits(num_udf) << 24 | be16_to_cpu(vlan_tci) >> 8;
0277 if (mask)
0278 core_writel(priv, reg, CORE_CFP_MASK_PORT(5));
0279 else
0280 core_writel(priv, reg, CORE_CFP_DATA_PORT(5));
0281
0282
0283
0284
0285
0286 reg = (u32)(be16_to_cpu(vlan_tci) & 0xff) << 24;
0287 if (mask)
0288 offset = CORE_CFP_MASK_PORT(4);
0289 else
0290 offset = CORE_CFP_DATA_PORT(4);
0291 core_writel(priv, reg, offset);
0292
0293
0294
0295
0296
0297 reg = be16_to_cpu(ports->dst) >> 8;
0298 if (mask)
0299 offset = CORE_CFP_MASK_PORT(3);
0300 else
0301 offset = CORE_CFP_DATA_PORT(3);
0302 core_writel(priv, reg, offset);
0303
0304
0305
0306
0307
0308 reg = (be16_to_cpu(ports->dst) & 0xff) << 24 |
0309 (u32)be16_to_cpu(ports->src) << 8 |
0310 (be32_to_cpu(addrs->dst) & 0x0000ff00) >> 8;
0311 if (mask)
0312 offset = CORE_CFP_MASK_PORT(2);
0313 else
0314 offset = CORE_CFP_DATA_PORT(2);
0315 core_writel(priv, reg, offset);
0316
0317
0318
0319
0320
0321 reg = (u32)(be32_to_cpu(addrs->dst) & 0xff) << 24 |
0322 (u32)(be32_to_cpu(addrs->dst) >> 16) << 8 |
0323 (be32_to_cpu(addrs->src) & 0x0000ff00) >> 8;
0324 if (mask)
0325 offset = CORE_CFP_MASK_PORT(1);
0326 else
0327 offset = CORE_CFP_DATA_PORT(1);
0328 core_writel(priv, reg, offset);
0329
0330
0331
0332
0333
0334
0335
0336 reg = (u32)(be32_to_cpu(addrs->src) & 0xff) << 24 |
0337 (u32)(be32_to_cpu(addrs->src) >> 16) << 8 |
0338 SLICE_NUM(slice_num) | SLICE_VALID;
0339 if (mask)
0340 offset = CORE_CFP_MASK_PORT(0);
0341 else
0342 offset = CORE_CFP_DATA_PORT(0);
0343 core_writel(priv, reg, offset);
0344 }
0345
0346 static int bcm_sf2_cfp_ipv4_rule_set(struct bcm_sf2_priv *priv, int port,
0347 unsigned int port_num,
0348 unsigned int queue_num,
0349 struct ethtool_rx_flow_spec *fs)
0350 {
0351 __be16 vlan_tci = 0, vlan_m_tci = htons(0xffff);
0352 struct ethtool_rx_flow_spec_input input = {};
0353 const struct cfp_udf_layout *layout;
0354 unsigned int slice_num, rule_index;
0355 struct ethtool_rx_flow_rule *flow;
0356 struct flow_match_ipv4_addrs ipv4;
0357 struct flow_match_ports ports;
0358 struct flow_match_ip ip;
0359 u8 ip_proto, ip_frag;
0360 u8 num_udf;
0361 u32 reg;
0362 int ret;
0363
0364 switch (fs->flow_type & ~FLOW_EXT) {
0365 case TCP_V4_FLOW:
0366 ip_proto = IPPROTO_TCP;
0367 break;
0368 case UDP_V4_FLOW:
0369 ip_proto = IPPROTO_UDP;
0370 break;
0371 default:
0372 return -EINVAL;
0373 }
0374
0375 ip_frag = !!(be32_to_cpu(fs->h_ext.data[0]) & 1);
0376
0377
0378 if (fs->flow_type & FLOW_EXT) {
0379 vlan_tci = fs->h_ext.vlan_tci;
0380 vlan_m_tci = fs->m_ext.vlan_tci;
0381 }
0382
0383
0384 if (fs->location == RX_CLS_LOC_ANY)
0385 rule_index = find_first_zero_bit(priv->cfp.used,
0386 priv->num_cfp_rules);
0387 else
0388 rule_index = fs->location;
0389
0390 if (rule_index > bcm_sf2_cfp_rule_size(priv))
0391 return -ENOSPC;
0392
0393 input.fs = fs;
0394 flow = ethtool_rx_flow_rule_create(&input);
0395 if (IS_ERR(flow))
0396 return PTR_ERR(flow);
0397
0398 flow_rule_match_ipv4_addrs(flow->rule, &ipv4);
0399 flow_rule_match_ports(flow->rule, &ports);
0400 flow_rule_match_ip(flow->rule, &ip);
0401
0402 layout = &udf_tcpip4_layout;
0403
0404 slice_num = bcm_sf2_get_slice_number(layout, 0);
0405 if (slice_num == UDF_NUM_SLICES) {
0406 ret = -EINVAL;
0407 goto out_err_flow_rule;
0408 }
0409
0410 num_udf = bcm_sf2_get_num_udf_slices(layout->udfs[slice_num].slices);
0411
0412
0413 bcm_sf2_cfp_udf_set(priv, layout, slice_num);
0414
0415
0416 core_writel(priv, BIT(port), CORE_CFP_DATA_PORT(7));
0417
0418
0419 core_writel(priv, 0xff, CORE_CFP_MASK_PORT(7));
0420
0421
0422
0423
0424
0425
0426
0427
0428
0429
0430
0431
0432
0433
0434
0435 core_writel(priv, ip.key->tos << IPTOS_SHIFT |
0436 ip_proto << IPPROTO_SHIFT | ip_frag << IP_FRAG_SHIFT |
0437 udf_upper_bits(num_udf),
0438 CORE_CFP_DATA_PORT(6));
0439
0440
0441 core_writel(priv, layout->udfs[slice_num].mask_value |
0442 udf_upper_bits(num_udf), CORE_CFP_MASK_PORT(6));
0443
0444
0445 bcm_sf2_cfp_slice_ipv4(priv, ipv4.key, ports.key, vlan_tci,
0446 slice_num, num_udf, false);
0447 bcm_sf2_cfp_slice_ipv4(priv, ipv4.mask, ports.mask, vlan_m_tci,
0448 SLICE_NUM_MASK, num_udf, true);
0449
0450
0451 bcm_sf2_cfp_rule_addr_set(priv, rule_index);
0452
0453 ret = bcm_sf2_cfp_op(priv, OP_SEL_WRITE | TCAM_SEL);
0454 if (ret) {
0455 pr_err("TCAM entry at addr %d failed\n", rule_index);
0456 goto out_err_flow_rule;
0457 }
0458
0459
0460 ret = bcm_sf2_cfp_act_pol_set(priv, rule_index, port, port_num,
0461 queue_num, true);
0462 if (ret)
0463 goto out_err_flow_rule;
0464
0465
0466 reg = core_readl(priv, CORE_CFP_CTL_REG);
0467 reg |= BIT(port);
0468 core_writel(priv, reg, CORE_CFP_CTL_REG);
0469
0470
0471 set_bit(rule_index, priv->cfp.used);
0472 set_bit(rule_index, priv->cfp.unique);
0473 fs->location = rule_index;
0474
0475 return 0;
0476
0477 out_err_flow_rule:
0478 ethtool_rx_flow_rule_destroy(flow);
0479 return ret;
0480 }
0481
0482 static void bcm_sf2_cfp_slice_ipv6(struct bcm_sf2_priv *priv,
0483 const __be32 *ip6_addr, const __be16 port,
0484 const __be16 vlan_tci,
0485 unsigned int slice_num, u32 udf_bits,
0486 bool mask)
0487 {
0488 u32 reg, tmp, val, offset;
0489
0490
0491
0492
0493
0494 reg = udf_bits << 24 | be16_to_cpu(vlan_tci) >> 8;
0495 if (mask)
0496 core_writel(priv, reg, CORE_CFP_MASK_PORT(5));
0497 else
0498 core_writel(priv, reg, CORE_CFP_DATA_PORT(5));
0499
0500
0501
0502
0503
0504 reg = be32_to_cpu(ip6_addr[3]);
0505 val = (u32)be16_to_cpu(port) << 8 | ((reg >> 8) & 0xff);
0506 val |= (u32)(be16_to_cpu(vlan_tci) & 0xff) << 24;
0507 if (mask)
0508 offset = CORE_CFP_MASK_PORT(4);
0509 else
0510 offset = CORE_CFP_DATA_PORT(4);
0511 core_writel(priv, val, offset);
0512
0513
0514
0515
0516
0517 tmp = be32_to_cpu(ip6_addr[2]);
0518 val = (u32)(reg & 0xff) << 24 | (u32)(reg >> 16) << 8 |
0519 ((tmp >> 8) & 0xff);
0520 if (mask)
0521 offset = CORE_CFP_MASK_PORT(3);
0522 else
0523 offset = CORE_CFP_DATA_PORT(3);
0524 core_writel(priv, val, offset);
0525
0526
0527
0528
0529
0530 reg = be32_to_cpu(ip6_addr[1]);
0531 val = (u32)(tmp & 0xff) << 24 | (u32)(tmp >> 16) << 8 |
0532 ((reg >> 8) & 0xff);
0533 if (mask)
0534 offset = CORE_CFP_MASK_PORT(2);
0535 else
0536 offset = CORE_CFP_DATA_PORT(2);
0537 core_writel(priv, val, offset);
0538
0539
0540
0541
0542
0543 tmp = be32_to_cpu(ip6_addr[0]);
0544 val = (u32)(reg & 0xff) << 24 | (u32)(reg >> 16) << 8 |
0545 ((tmp >> 8) & 0xff);
0546 if (mask)
0547 offset = CORE_CFP_MASK_PORT(1);
0548 else
0549 offset = CORE_CFP_DATA_PORT(1);
0550 core_writel(priv, val, offset);
0551
0552
0553
0554
0555
0556
0557
0558 reg = (u32)(tmp & 0xff) << 24 | (u32)(tmp >> 16) << 8 |
0559 SLICE_NUM(slice_num) | SLICE_VALID;
0560 if (mask)
0561 offset = CORE_CFP_MASK_PORT(0);
0562 else
0563 offset = CORE_CFP_DATA_PORT(0);
0564 core_writel(priv, reg, offset);
0565 }
0566
0567 static struct cfp_rule *bcm_sf2_cfp_rule_find(struct bcm_sf2_priv *priv,
0568 int port, u32 location)
0569 {
0570 struct cfp_rule *rule;
0571
0572 list_for_each_entry(rule, &priv->cfp.rules_list, next) {
0573 if (rule->port == port && rule->fs.location == location)
0574 return rule;
0575 }
0576
0577 return NULL;
0578 }
0579
0580 static int bcm_sf2_cfp_rule_cmp(struct bcm_sf2_priv *priv, int port,
0581 struct ethtool_rx_flow_spec *fs)
0582 {
0583 struct cfp_rule *rule = NULL;
0584 size_t fs_size = 0;
0585 int ret = 1;
0586
0587 if (list_empty(&priv->cfp.rules_list))
0588 return ret;
0589
0590 list_for_each_entry(rule, &priv->cfp.rules_list, next) {
0591 ret = 1;
0592 if (rule->port != port)
0593 continue;
0594
0595 if (rule->fs.flow_type != fs->flow_type ||
0596 rule->fs.ring_cookie != fs->ring_cookie ||
0597 rule->fs.h_ext.data[0] != fs->h_ext.data[0])
0598 continue;
0599
0600 switch (fs->flow_type & ~FLOW_EXT) {
0601 case TCP_V6_FLOW:
0602 case UDP_V6_FLOW:
0603 fs_size = sizeof(struct ethtool_tcpip6_spec);
0604 break;
0605 case TCP_V4_FLOW:
0606 case UDP_V4_FLOW:
0607 fs_size = sizeof(struct ethtool_tcpip4_spec);
0608 break;
0609 default:
0610 continue;
0611 }
0612
0613 ret = memcmp(&rule->fs.h_u, &fs->h_u, fs_size);
0614 ret |= memcmp(&rule->fs.m_u, &fs->m_u, fs_size);
0615
0616 if (rule->fs.flow_type & FLOW_EXT) {
0617 ret |= rule->fs.h_ext.vlan_tci != fs->h_ext.vlan_tci;
0618 ret |= rule->fs.m_ext.vlan_tci != fs->m_ext.vlan_tci;
0619 }
0620 if (ret == 0)
0621 break;
0622 }
0623
0624 return ret;
0625 }
0626
0627 static int bcm_sf2_cfp_ipv6_rule_set(struct bcm_sf2_priv *priv, int port,
0628 unsigned int port_num,
0629 unsigned int queue_num,
0630 struct ethtool_rx_flow_spec *fs)
0631 {
0632 __be16 vlan_tci = 0, vlan_m_tci = htons(0xffff);
0633 struct ethtool_rx_flow_spec_input input = {};
0634 unsigned int slice_num, rule_index[2];
0635 const struct cfp_udf_layout *layout;
0636 struct ethtool_rx_flow_rule *flow;
0637 struct flow_match_ipv6_addrs ipv6;
0638 struct flow_match_ports ports;
0639 u8 ip_proto, ip_frag;
0640 int ret = 0;
0641 u8 num_udf;
0642 u32 reg;
0643
0644 switch (fs->flow_type & ~FLOW_EXT) {
0645 case TCP_V6_FLOW:
0646 ip_proto = IPPROTO_TCP;
0647 break;
0648 case UDP_V6_FLOW:
0649 ip_proto = IPPROTO_UDP;
0650 break;
0651 default:
0652 return -EINVAL;
0653 }
0654
0655 ip_frag = !!(be32_to_cpu(fs->h_ext.data[0]) & 1);
0656
0657
0658 if (fs->flow_type & FLOW_EXT) {
0659 vlan_tci = fs->h_ext.vlan_tci;
0660 vlan_m_tci = fs->m_ext.vlan_tci;
0661 }
0662
0663 layout = &udf_tcpip6_layout;
0664 slice_num = bcm_sf2_get_slice_number(layout, 0);
0665 if (slice_num == UDF_NUM_SLICES)
0666 return -EINVAL;
0667
0668 num_udf = bcm_sf2_get_num_udf_slices(layout->udfs[slice_num].slices);
0669
0670
0671
0672
0673
0674
0675
0676
0677
0678
0679
0680
0681
0682 if (fs->location == RX_CLS_LOC_ANY)
0683 rule_index[1] = find_first_zero_bit(priv->cfp.used,
0684 priv->num_cfp_rules);
0685 else
0686 rule_index[1] = fs->location;
0687 if (rule_index[1] > bcm_sf2_cfp_rule_size(priv))
0688 return -ENOSPC;
0689
0690
0691
0692
0693 set_bit(rule_index[1], priv->cfp.used);
0694
0695 rule_index[0] = find_first_zero_bit(priv->cfp.used,
0696 priv->num_cfp_rules);
0697 if (rule_index[0] > bcm_sf2_cfp_rule_size(priv)) {
0698 ret = -ENOSPC;
0699 goto out_err;
0700 }
0701
0702 input.fs = fs;
0703 flow = ethtool_rx_flow_rule_create(&input);
0704 if (IS_ERR(flow)) {
0705 ret = PTR_ERR(flow);
0706 goto out_err;
0707 }
0708 flow_rule_match_ipv6_addrs(flow->rule, &ipv6);
0709 flow_rule_match_ports(flow->rule, &ports);
0710
0711
0712 bcm_sf2_cfp_udf_set(priv, layout, slice_num);
0713
0714
0715 core_writel(priv, BIT(port), CORE_CFP_DATA_PORT(7));
0716
0717
0718 core_writel(priv, 0xff, CORE_CFP_MASK_PORT(7));
0719
0720
0721
0722
0723
0724
0725
0726
0727
0728
0729
0730
0731
0732
0733
0734 reg = 1 << L3_FRAMING_SHIFT | ip_proto << IPPROTO_SHIFT |
0735 ip_frag << IP_FRAG_SHIFT | udf_upper_bits(num_udf);
0736 core_writel(priv, reg, CORE_CFP_DATA_PORT(6));
0737
0738
0739
0740
0741 reg = layout->udfs[slice_num].mask_value | udf_upper_bits(num_udf);
0742 core_writel(priv, reg, CORE_CFP_MASK_PORT(6));
0743
0744
0745 bcm_sf2_cfp_slice_ipv6(priv, ipv6.key->src.in6_u.u6_addr32,
0746 ports.key->src, vlan_tci, slice_num,
0747 udf_lower_bits(num_udf), false);
0748 bcm_sf2_cfp_slice_ipv6(priv, ipv6.mask->src.in6_u.u6_addr32,
0749 ports.mask->src, vlan_m_tci, SLICE_NUM_MASK,
0750 udf_lower_bits(num_udf), true);
0751
0752
0753 bcm_sf2_cfp_rule_addr_set(priv, rule_index[0]);
0754
0755 ret = bcm_sf2_cfp_op(priv, OP_SEL_WRITE | TCAM_SEL);
0756 if (ret) {
0757 pr_err("TCAM entry at addr %d failed\n", rule_index[0]);
0758 goto out_err_flow_rule;
0759 }
0760
0761
0762 ret = bcm_sf2_cfp_act_pol_set(priv, rule_index[0], port, port_num,
0763 queue_num, false);
0764 if (ret)
0765 goto out_err_flow_rule;
0766
0767
0768 slice_num = bcm_sf2_get_slice_number(layout, slice_num + 1);
0769 if (slice_num == UDF_NUM_SLICES) {
0770 ret = -EINVAL;
0771 goto out_err_flow_rule;
0772 }
0773
0774 num_udf = bcm_sf2_get_num_udf_slices(layout->udfs[slice_num].slices);
0775
0776
0777 bcm_sf2_cfp_udf_set(priv, layout, slice_num);
0778
0779
0780
0781
0782 core_writel(priv, 0, CORE_CFP_DATA_PORT(7));
0783 core_writel(priv, 0, CORE_CFP_MASK_PORT(7));
0784
0785
0786
0787
0788
0789
0790
0791
0792 reg = rule_index[0] << 24 | udf_upper_bits(num_udf) << 16 |
0793 udf_lower_bits(num_udf) << 8;
0794 core_writel(priv, reg, CORE_CFP_DATA_PORT(6));
0795
0796
0797 reg = XCESS_ADDR_MASK << 24 | udf_upper_bits(num_udf) << 16 |
0798 udf_lower_bits(num_udf) << 8;
0799 core_writel(priv, reg, CORE_CFP_MASK_PORT(6));
0800
0801 bcm_sf2_cfp_slice_ipv6(priv, ipv6.key->dst.in6_u.u6_addr32,
0802 ports.key->dst, 0, slice_num,
0803 0, false);
0804 bcm_sf2_cfp_slice_ipv6(priv, ipv6.mask->dst.in6_u.u6_addr32,
0805 ports.key->dst, 0, SLICE_NUM_MASK,
0806 0, true);
0807
0808
0809 bcm_sf2_cfp_rule_addr_set(priv, rule_index[1]);
0810
0811 ret = bcm_sf2_cfp_op(priv, OP_SEL_WRITE | TCAM_SEL);
0812 if (ret) {
0813 pr_err("TCAM entry at addr %d failed\n", rule_index[1]);
0814 goto out_err_flow_rule;
0815 }
0816
0817
0818
0819
0820 ret = bcm_sf2_cfp_act_pol_set(priv, rule_index[1], port, port_num,
0821 queue_num, true);
0822 if (ret)
0823 goto out_err_flow_rule;
0824
0825
0826 reg = core_readl(priv, CORE_CFP_CTL_REG);
0827 reg |= BIT(port);
0828 core_writel(priv, reg, CORE_CFP_CTL_REG);
0829
0830
0831
0832
0833 set_bit(rule_index[0], priv->cfp.used);
0834 set_bit(rule_index[1], priv->cfp.unique);
0835 fs->location = rule_index[1];
0836
0837 return ret;
0838
0839 out_err_flow_rule:
0840 ethtool_rx_flow_rule_destroy(flow);
0841 out_err:
0842 clear_bit(rule_index[1], priv->cfp.used);
0843 return ret;
0844 }
0845
0846 static int bcm_sf2_cfp_rule_insert(struct dsa_switch *ds, int port,
0847 struct ethtool_rx_flow_spec *fs)
0848 {
0849 struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
0850 s8 cpu_port = dsa_to_port(ds, port)->cpu_dp->index;
0851 __u64 ring_cookie = fs->ring_cookie;
0852 struct switchdev_obj_port_vlan vlan;
0853 unsigned int queue_num, port_num;
0854 u16 vid;
0855 int ret;
0856
0857
0858
0859
0860 if (ring_cookie == RX_CLS_FLOW_WAKE)
0861 ring_cookie = cpu_port * SF2_NUM_EGRESS_QUEUES;
0862
0863
0864
0865
0866
0867 port_num = ring_cookie / SF2_NUM_EGRESS_QUEUES;
0868
0869 if (ring_cookie == RX_CLS_FLOW_DISC ||
0870 !(dsa_is_user_port(ds, port_num) ||
0871 dsa_is_cpu_port(ds, port_num)) ||
0872 port_num >= priv->hw_params.num_ports)
0873 return -EINVAL;
0874
0875
0876
0877
0878
0879
0880
0881 if (fs->flow_type & FLOW_EXT) {
0882
0883 if ((be16_to_cpu(fs->m_ext.vlan_tci) & VLAN_VID_MASK) !=
0884 VLAN_VID_MASK)
0885 return -EINVAL;
0886
0887 vid = be16_to_cpu(fs->h_ext.vlan_tci) & VLAN_VID_MASK;
0888 vlan.vid = vid;
0889 if (be32_to_cpu(fs->h_ext.data[1]) & 1)
0890 vlan.flags = BRIDGE_VLAN_INFO_UNTAGGED;
0891 else
0892 vlan.flags = 0;
0893
0894 ret = ds->ops->port_vlan_add(ds, port_num, &vlan, NULL);
0895 if (ret)
0896 return ret;
0897 }
0898
0899
0900
0901
0902
0903 queue_num = ring_cookie % SF2_NUM_EGRESS_QUEUES;
0904 if (port_num >= 7)
0905 port_num -= 1;
0906
0907 switch (fs->flow_type & ~FLOW_EXT) {
0908 case TCP_V4_FLOW:
0909 case UDP_V4_FLOW:
0910 ret = bcm_sf2_cfp_ipv4_rule_set(priv, port, port_num,
0911 queue_num, fs);
0912 break;
0913 case TCP_V6_FLOW:
0914 case UDP_V6_FLOW:
0915 ret = bcm_sf2_cfp_ipv6_rule_set(priv, port, port_num,
0916 queue_num, fs);
0917 break;
0918 default:
0919 ret = -EINVAL;
0920 break;
0921 }
0922
0923 return ret;
0924 }
0925
0926 static int bcm_sf2_cfp_rule_set(struct dsa_switch *ds, int port,
0927 struct ethtool_rx_flow_spec *fs)
0928 {
0929 struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
0930 struct cfp_rule *rule = NULL;
0931 int ret = -EINVAL;
0932
0933
0934 if (fs->flow_type & FLOW_MAC_EXT)
0935 return -EINVAL;
0936
0937 if (fs->location != RX_CLS_LOC_ANY &&
0938 fs->location > bcm_sf2_cfp_rule_size(priv))
0939 return -EINVAL;
0940
0941 if ((fs->flow_type & FLOW_EXT) &&
0942 !(ds->ops->port_vlan_add || ds->ops->port_vlan_del))
0943 return -EOPNOTSUPP;
0944
0945 if (fs->location != RX_CLS_LOC_ANY &&
0946 test_bit(fs->location, priv->cfp.used))
0947 return -EBUSY;
0948
0949 ret = bcm_sf2_cfp_rule_cmp(priv, port, fs);
0950 if (ret == 0)
0951 return -EEXIST;
0952
0953 rule = kzalloc(sizeof(*rule), GFP_KERNEL);
0954 if (!rule)
0955 return -ENOMEM;
0956
0957 ret = bcm_sf2_cfp_rule_insert(ds, port, fs);
0958 if (ret) {
0959 kfree(rule);
0960 return ret;
0961 }
0962
0963 rule->port = port;
0964 memcpy(&rule->fs, fs, sizeof(*fs));
0965 list_add_tail(&rule->next, &priv->cfp.rules_list);
0966
0967 return ret;
0968 }
0969
0970 static int bcm_sf2_cfp_rule_del_one(struct bcm_sf2_priv *priv, int port,
0971 u32 loc, u32 *next_loc)
0972 {
0973 int ret;
0974 u32 reg;
0975
0976
0977 bcm_sf2_cfp_rule_addr_set(priv, loc);
0978
0979 ret = bcm_sf2_cfp_op(priv, OP_SEL_READ | TCAM_SEL);
0980 if (ret)
0981 return ret;
0982
0983
0984
0985
0986
0987 reg = core_readl(priv, CORE_CFP_DATA_PORT(6));
0988 if (next_loc)
0989 *next_loc = (reg >> 24) & CHAIN_ID_MASK;
0990
0991
0992 reg = core_readl(priv, CORE_CFP_DATA_PORT(0));
0993 reg &= ~SLICE_VALID;
0994 core_writel(priv, reg, CORE_CFP_DATA_PORT(0));
0995
0996
0997 ret = bcm_sf2_cfp_op(priv, OP_SEL_WRITE | TCAM_SEL);
0998 if (ret)
0999 return ret;
1000
1001 clear_bit(loc, priv->cfp.used);
1002 clear_bit(loc, priv->cfp.unique);
1003
1004 return 0;
1005 }
1006
1007 static int bcm_sf2_cfp_rule_remove(struct bcm_sf2_priv *priv, int port,
1008 u32 loc)
1009 {
1010 u32 next_loc = 0;
1011 int ret;
1012
1013 ret = bcm_sf2_cfp_rule_del_one(priv, port, loc, &next_loc);
1014 if (ret)
1015 return ret;
1016
1017
1018 if (next_loc)
1019 ret = bcm_sf2_cfp_rule_del_one(priv, port, next_loc, NULL);
1020
1021 return ret;
1022 }
1023
1024 static int bcm_sf2_cfp_rule_del(struct bcm_sf2_priv *priv, int port, u32 loc)
1025 {
1026 struct cfp_rule *rule;
1027 int ret;
1028
1029 if (loc > bcm_sf2_cfp_rule_size(priv))
1030 return -EINVAL;
1031
1032
1033
1034
1035
1036 if (!test_bit(loc, priv->cfp.unique) || loc == 0)
1037 return -EINVAL;
1038
1039 rule = bcm_sf2_cfp_rule_find(priv, port, loc);
1040 if (!rule)
1041 return -EINVAL;
1042
1043 ret = bcm_sf2_cfp_rule_remove(priv, port, loc);
1044
1045 list_del(&rule->next);
1046 kfree(rule);
1047
1048 return ret;
1049 }
1050
1051 static void bcm_sf2_invert_masks(struct ethtool_rx_flow_spec *flow)
1052 {
1053 unsigned int i;
1054
1055 for (i = 0; i < sizeof(flow->m_u); i++)
1056 flow->m_u.hdata[i] ^= 0xff;
1057
1058 flow->m_ext.vlan_etype ^= cpu_to_be16(~0);
1059 flow->m_ext.vlan_tci ^= cpu_to_be16(~0);
1060 flow->m_ext.data[0] ^= cpu_to_be32(~0);
1061 flow->m_ext.data[1] ^= cpu_to_be32(~0);
1062 }
1063
1064 static int bcm_sf2_cfp_rule_get(struct bcm_sf2_priv *priv, int port,
1065 struct ethtool_rxnfc *nfc)
1066 {
1067 struct cfp_rule *rule;
1068
1069 rule = bcm_sf2_cfp_rule_find(priv, port, nfc->fs.location);
1070 if (!rule)
1071 return -EINVAL;
1072
1073 memcpy(&nfc->fs, &rule->fs, sizeof(rule->fs));
1074
1075 bcm_sf2_invert_masks(&nfc->fs);
1076
1077
1078 nfc->data = bcm_sf2_cfp_rule_size(priv);
1079
1080 return 0;
1081 }
1082
1083
1084 static int bcm_sf2_cfp_rule_get_all(struct bcm_sf2_priv *priv,
1085 int port, struct ethtool_rxnfc *nfc,
1086 u32 *rule_locs)
1087 {
1088 unsigned int index = 1, rules_cnt = 0;
1089
1090 for_each_set_bit_from(index, priv->cfp.unique, priv->num_cfp_rules) {
1091 rule_locs[rules_cnt] = index;
1092 rules_cnt++;
1093 }
1094
1095
1096 nfc->data = bcm_sf2_cfp_rule_size(priv);
1097 nfc->rule_cnt = rules_cnt;
1098
1099 return 0;
1100 }
1101
1102 int bcm_sf2_get_rxnfc(struct dsa_switch *ds, int port,
1103 struct ethtool_rxnfc *nfc, u32 *rule_locs)
1104 {
1105 struct net_device *p = dsa_to_port(ds, port)->cpu_dp->master;
1106 struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
1107 int ret = 0;
1108
1109 mutex_lock(&priv->cfp.lock);
1110
1111 switch (nfc->cmd) {
1112 case ETHTOOL_GRXCLSRLCNT:
1113
1114 nfc->rule_cnt = bitmap_weight(priv->cfp.unique,
1115 priv->num_cfp_rules) - 1;
1116
1117 nfc->data |= RX_CLS_LOC_SPECIAL;
1118 break;
1119 case ETHTOOL_GRXCLSRULE:
1120 ret = bcm_sf2_cfp_rule_get(priv, port, nfc);
1121 break;
1122 case ETHTOOL_GRXCLSRLALL:
1123 ret = bcm_sf2_cfp_rule_get_all(priv, port, nfc, rule_locs);
1124 break;
1125 default:
1126 ret = -EOPNOTSUPP;
1127 break;
1128 }
1129
1130 mutex_unlock(&priv->cfp.lock);
1131
1132 if (ret)
1133 return ret;
1134
1135
1136 if (p->ethtool_ops->get_rxnfc) {
1137 ret = p->ethtool_ops->get_rxnfc(p, nfc, rule_locs);
1138 if (ret == -EOPNOTSUPP)
1139 ret = 0;
1140 }
1141
1142 return ret;
1143 }
1144
1145 int bcm_sf2_set_rxnfc(struct dsa_switch *ds, int port,
1146 struct ethtool_rxnfc *nfc)
1147 {
1148 struct net_device *p = dsa_to_port(ds, port)->cpu_dp->master;
1149 struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
1150 int ret = 0;
1151
1152 mutex_lock(&priv->cfp.lock);
1153
1154 switch (nfc->cmd) {
1155 case ETHTOOL_SRXCLSRLINS:
1156 ret = bcm_sf2_cfp_rule_set(ds, port, &nfc->fs);
1157 break;
1158
1159 case ETHTOOL_SRXCLSRLDEL:
1160 ret = bcm_sf2_cfp_rule_del(priv, port, nfc->fs.location);
1161 break;
1162 default:
1163 ret = -EOPNOTSUPP;
1164 break;
1165 }
1166
1167 mutex_unlock(&priv->cfp.lock);
1168
1169 if (ret)
1170 return ret;
1171
1172
1173
1174
1175 if (p->ethtool_ops->set_rxnfc) {
1176 ret = p->ethtool_ops->set_rxnfc(p, nfc);
1177 if (ret && ret != -EOPNOTSUPP) {
1178 mutex_lock(&priv->cfp.lock);
1179 bcm_sf2_cfp_rule_del(priv, port, nfc->fs.location);
1180 mutex_unlock(&priv->cfp.lock);
1181 } else {
1182 ret = 0;
1183 }
1184 }
1185
1186 return ret;
1187 }
1188
1189 int bcm_sf2_cfp_rst(struct bcm_sf2_priv *priv)
1190 {
1191 unsigned int timeout = 1000;
1192 u32 reg;
1193
1194 reg = core_readl(priv, CORE_CFP_ACC);
1195 reg |= TCAM_RESET;
1196 core_writel(priv, reg, CORE_CFP_ACC);
1197
1198 do {
1199 reg = core_readl(priv, CORE_CFP_ACC);
1200 if (!(reg & TCAM_RESET))
1201 break;
1202
1203 cpu_relax();
1204 } while (timeout--);
1205
1206 if (!timeout)
1207 return -ETIMEDOUT;
1208
1209 return 0;
1210 }
1211
1212 void bcm_sf2_cfp_exit(struct dsa_switch *ds)
1213 {
1214 struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
1215 struct cfp_rule *rule, *n;
1216
1217 if (list_empty(&priv->cfp.rules_list))
1218 return;
1219
1220 list_for_each_entry_safe_reverse(rule, n, &priv->cfp.rules_list, next)
1221 bcm_sf2_cfp_rule_del(priv, rule->port, rule->fs.location);
1222 }
1223
1224 int bcm_sf2_cfp_resume(struct dsa_switch *ds)
1225 {
1226 struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
1227 struct cfp_rule *rule;
1228 int ret = 0;
1229 u32 reg;
1230
1231 if (list_empty(&priv->cfp.rules_list))
1232 return ret;
1233
1234 reg = core_readl(priv, CORE_CFP_CTL_REG);
1235 reg &= ~CFP_EN_MAP_MASK;
1236 core_writel(priv, reg, CORE_CFP_CTL_REG);
1237
1238 ret = bcm_sf2_cfp_rst(priv);
1239 if (ret)
1240 return ret;
1241
1242 list_for_each_entry(rule, &priv->cfp.rules_list, next) {
1243 ret = bcm_sf2_cfp_rule_remove(priv, rule->port,
1244 rule->fs.location);
1245 if (ret) {
1246 dev_err(ds->dev, "failed to remove rule\n");
1247 return ret;
1248 }
1249
1250 ret = bcm_sf2_cfp_rule_insert(ds, rule->port, &rule->fs);
1251 if (ret) {
1252 dev_err(ds->dev, "failed to restore rule\n");
1253 return ret;
1254 }
1255 }
1256
1257 return ret;
1258 }
1259
1260 static const struct bcm_sf2_cfp_stat {
1261 unsigned int offset;
1262 unsigned int ram_loc;
1263 const char *name;
1264 } bcm_sf2_cfp_stats[] = {
1265 {
1266 .offset = CORE_STAT_GREEN_CNTR,
1267 .ram_loc = GREEN_STAT_RAM,
1268 .name = "Green"
1269 },
1270 {
1271 .offset = CORE_STAT_YELLOW_CNTR,
1272 .ram_loc = YELLOW_STAT_RAM,
1273 .name = "Yellow"
1274 },
1275 {
1276 .offset = CORE_STAT_RED_CNTR,
1277 .ram_loc = RED_STAT_RAM,
1278 .name = "Red"
1279 },
1280 };
1281
1282 void bcm_sf2_cfp_get_strings(struct dsa_switch *ds, int port,
1283 u32 stringset, uint8_t *data)
1284 {
1285 struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
1286 unsigned int s = ARRAY_SIZE(bcm_sf2_cfp_stats);
1287 char buf[ETH_GSTRING_LEN];
1288 unsigned int i, j, iter;
1289
1290 if (stringset != ETH_SS_STATS)
1291 return;
1292
1293 for (i = 1; i < priv->num_cfp_rules; i++) {
1294 for (j = 0; j < s; j++) {
1295 snprintf(buf, sizeof(buf),
1296 "CFP%03d_%sCntr",
1297 i, bcm_sf2_cfp_stats[j].name);
1298 iter = (i - 1) * s + j;
1299 strlcpy(data + iter * ETH_GSTRING_LEN,
1300 buf, ETH_GSTRING_LEN);
1301 }
1302 }
1303 }
1304
1305 void bcm_sf2_cfp_get_ethtool_stats(struct dsa_switch *ds, int port,
1306 uint64_t *data)
1307 {
1308 struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
1309 unsigned int s = ARRAY_SIZE(bcm_sf2_cfp_stats);
1310 const struct bcm_sf2_cfp_stat *stat;
1311 unsigned int i, j, iter;
1312 struct cfp_rule *rule;
1313 int ret;
1314
1315 mutex_lock(&priv->cfp.lock);
1316 for (i = 1; i < priv->num_cfp_rules; i++) {
1317 rule = bcm_sf2_cfp_rule_find(priv, port, i);
1318 if (!rule)
1319 continue;
1320
1321 for (j = 0; j < s; j++) {
1322 stat = &bcm_sf2_cfp_stats[j];
1323
1324 bcm_sf2_cfp_rule_addr_set(priv, i);
1325 ret = bcm_sf2_cfp_op(priv, stat->ram_loc | OP_SEL_READ);
1326 if (ret)
1327 continue;
1328
1329 iter = (i - 1) * s + j;
1330 data[iter] = core_readl(priv, stat->offset);
1331 }
1332
1333 }
1334 mutex_unlock(&priv->cfp.lock);
1335 }
1336
1337 int bcm_sf2_cfp_get_sset_count(struct dsa_switch *ds, int port, int sset)
1338 {
1339 struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
1340
1341 if (sset != ETH_SS_STATS)
1342 return 0;
1343
1344
1345 return (priv->num_cfp_rules - 1) * ARRAY_SIZE(bcm_sf2_cfp_stats);
1346 }