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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * CAN bus driver for the alone generic (as possible as) MSCAN controller.
0004  *
0005  * Copyright (C) 2005-2006 Andrey Volkov <avolkov@varma-el.com>,
0006  *                         Varma Electronics Oy
0007  * Copyright (C) 2008-2009 Wolfgang Grandegger <wg@grandegger.com>
0008  * Copyright (C) 2008-2009 Pengutronix <kernel@pengutronix.de>
0009  */
0010 
0011 #include <linux/kernel.h>
0012 #include <linux/module.h>
0013 #include <linux/interrupt.h>
0014 #include <linux/delay.h>
0015 #include <linux/netdevice.h>
0016 #include <linux/if_arp.h>
0017 #include <linux/if_ether.h>
0018 #include <linux/list.h>
0019 #include <linux/can/dev.h>
0020 #include <linux/can/error.h>
0021 #include <linux/io.h>
0022 
0023 #include "mscan.h"
0024 
0025 static const struct can_bittiming_const mscan_bittiming_const = {
0026     .name = "mscan",
0027     .tseg1_min = 4,
0028     .tseg1_max = 16,
0029     .tseg2_min = 2,
0030     .tseg2_max = 8,
0031     .sjw_max = 4,
0032     .brp_min = 1,
0033     .brp_max = 64,
0034     .brp_inc = 1,
0035 };
0036 
0037 struct mscan_state {
0038     u8 mode;
0039     u8 canrier;
0040     u8 cantier;
0041 };
0042 
0043 static enum can_state state_map[] = {
0044     CAN_STATE_ERROR_ACTIVE,
0045     CAN_STATE_ERROR_WARNING,
0046     CAN_STATE_ERROR_PASSIVE,
0047     CAN_STATE_BUS_OFF
0048 };
0049 
0050 static int mscan_set_mode(struct net_device *dev, u8 mode)
0051 {
0052     struct mscan_priv *priv = netdev_priv(dev);
0053     struct mscan_regs __iomem *regs = priv->reg_base;
0054     int ret = 0;
0055     int i;
0056     u8 canctl1;
0057 
0058     if (mode != MSCAN_NORMAL_MODE) {
0059         if (priv->tx_active) {
0060             /* Abort transfers before going to sleep */#
0061             out_8(&regs->cantarq, priv->tx_active);
0062             /* Suppress TX done interrupts */
0063             out_8(&regs->cantier, 0);
0064         }
0065 
0066         canctl1 = in_8(&regs->canctl1);
0067         if ((mode & MSCAN_SLPRQ) && !(canctl1 & MSCAN_SLPAK)) {
0068             setbits8(&regs->canctl0, MSCAN_SLPRQ);
0069             for (i = 0; i < MSCAN_SET_MODE_RETRIES; i++) {
0070                 if (in_8(&regs->canctl1) & MSCAN_SLPAK)
0071                     break;
0072                 udelay(100);
0073             }
0074             /*
0075              * The mscan controller will fail to enter sleep mode,
0076              * while there are irregular activities on bus, like
0077              * somebody keeps retransmitting. This behavior is
0078              * undocumented and seems to differ between mscan built
0079              * in mpc5200b and mpc5200. We proceed in that case,
0080              * since otherwise the slprq will be kept set and the
0081              * controller will get stuck. NOTE: INITRQ or CSWAI
0082              * will abort all active transmit actions, if still
0083              * any, at once.
0084              */
0085             if (i >= MSCAN_SET_MODE_RETRIES)
0086                 netdev_dbg(dev,
0087                        "device failed to enter sleep mode. "
0088                        "We proceed anyhow.\n");
0089             else
0090                 priv->can.state = CAN_STATE_SLEEPING;
0091         }
0092 
0093         if ((mode & MSCAN_INITRQ) && !(canctl1 & MSCAN_INITAK)) {
0094             setbits8(&regs->canctl0, MSCAN_INITRQ);
0095             for (i = 0; i < MSCAN_SET_MODE_RETRIES; i++) {
0096                 if (in_8(&regs->canctl1) & MSCAN_INITAK)
0097                     break;
0098             }
0099             if (i >= MSCAN_SET_MODE_RETRIES)
0100                 ret = -ENODEV;
0101         }
0102         if (!ret)
0103             priv->can.state = CAN_STATE_STOPPED;
0104 
0105         if (mode & MSCAN_CSWAI)
0106             setbits8(&regs->canctl0, MSCAN_CSWAI);
0107 
0108     } else {
0109         canctl1 = in_8(&regs->canctl1);
0110         if (canctl1 & (MSCAN_SLPAK | MSCAN_INITAK)) {
0111             clrbits8(&regs->canctl0, MSCAN_SLPRQ | MSCAN_INITRQ);
0112             for (i = 0; i < MSCAN_SET_MODE_RETRIES; i++) {
0113                 canctl1 = in_8(&regs->canctl1);
0114                 if (!(canctl1 & (MSCAN_INITAK | MSCAN_SLPAK)))
0115                     break;
0116             }
0117             if (i >= MSCAN_SET_MODE_RETRIES)
0118                 ret = -ENODEV;
0119             else
0120                 priv->can.state = CAN_STATE_ERROR_ACTIVE;
0121         }
0122     }
0123     return ret;
0124 }
0125 
0126 static int mscan_start(struct net_device *dev)
0127 {
0128     struct mscan_priv *priv = netdev_priv(dev);
0129     struct mscan_regs __iomem *regs = priv->reg_base;
0130     u8 canrflg;
0131     int err;
0132 
0133     out_8(&regs->canrier, 0);
0134 
0135     INIT_LIST_HEAD(&priv->tx_head);
0136     priv->prev_buf_id = 0;
0137     priv->cur_pri = 0;
0138     priv->tx_active = 0;
0139     priv->shadow_canrier = 0;
0140     priv->flags = 0;
0141 
0142     if (priv->type == MSCAN_TYPE_MPC5121) {
0143         /* Clear pending bus-off condition */
0144         if (in_8(&regs->canmisc) & MSCAN_BOHOLD)
0145             out_8(&regs->canmisc, MSCAN_BOHOLD);
0146     }
0147 
0148     err = mscan_set_mode(dev, MSCAN_NORMAL_MODE);
0149     if (err)
0150         return err;
0151 
0152     canrflg = in_8(&regs->canrflg);
0153     priv->shadow_statflg = canrflg & MSCAN_STAT_MSK;
0154     priv->can.state = state_map[max(MSCAN_STATE_RX(canrflg),
0155                     MSCAN_STATE_TX(canrflg))];
0156     out_8(&regs->cantier, 0);
0157 
0158     /* Enable receive interrupts. */
0159     out_8(&regs->canrier, MSCAN_RX_INTS_ENABLE);
0160 
0161     return 0;
0162 }
0163 
0164 static int mscan_restart(struct net_device *dev)
0165 {
0166     struct mscan_priv *priv = netdev_priv(dev);
0167 
0168     if (priv->type == MSCAN_TYPE_MPC5121) {
0169         struct mscan_regs __iomem *regs = priv->reg_base;
0170 
0171         priv->can.state = CAN_STATE_ERROR_ACTIVE;
0172         WARN(!(in_8(&regs->canmisc) & MSCAN_BOHOLD),
0173              "bus-off state expected\n");
0174         out_8(&regs->canmisc, MSCAN_BOHOLD);
0175         /* Re-enable receive interrupts. */
0176         out_8(&regs->canrier, MSCAN_RX_INTS_ENABLE);
0177     } else {
0178         if (priv->can.state <= CAN_STATE_BUS_OFF)
0179             mscan_set_mode(dev, MSCAN_INIT_MODE);
0180         return mscan_start(dev);
0181     }
0182 
0183     return 0;
0184 }
0185 
0186 static netdev_tx_t mscan_start_xmit(struct sk_buff *skb, struct net_device *dev)
0187 {
0188     struct can_frame *frame = (struct can_frame *)skb->data;
0189     struct mscan_priv *priv = netdev_priv(dev);
0190     struct mscan_regs __iomem *regs = priv->reg_base;
0191     int i, rtr, buf_id;
0192     u32 can_id;
0193 
0194     if (can_dropped_invalid_skb(dev, skb))
0195         return NETDEV_TX_OK;
0196 
0197     out_8(&regs->cantier, 0);
0198 
0199     i = ~priv->tx_active & MSCAN_TXE;
0200     buf_id = ffs(i) - 1;
0201     switch (hweight8(i)) {
0202     case 0:
0203         netif_stop_queue(dev);
0204         netdev_err(dev, "Tx Ring full when queue awake!\n");
0205         return NETDEV_TX_BUSY;
0206     case 1:
0207         /*
0208          * if buf_id < 3, then current frame will be send out of order,
0209          * since buffer with lower id have higher priority (hell..)
0210          */
0211         netif_stop_queue(dev);
0212         fallthrough;
0213     case 2:
0214         if (buf_id < priv->prev_buf_id) {
0215             priv->cur_pri++;
0216             if (priv->cur_pri == 0xff) {
0217                 set_bit(F_TX_WAIT_ALL, &priv->flags);
0218                 netif_stop_queue(dev);
0219             }
0220         }
0221         set_bit(F_TX_PROGRESS, &priv->flags);
0222         break;
0223     }
0224     priv->prev_buf_id = buf_id;
0225     out_8(&regs->cantbsel, i);
0226 
0227     rtr = frame->can_id & CAN_RTR_FLAG;
0228 
0229     /* RTR is always the lowest bit of interest, then IDs follow */
0230     if (frame->can_id & CAN_EFF_FLAG) {
0231         can_id = (frame->can_id & CAN_EFF_MASK)
0232              << (MSCAN_EFF_RTR_SHIFT + 1);
0233         if (rtr)
0234             can_id |= 1 << MSCAN_EFF_RTR_SHIFT;
0235         out_be16(&regs->tx.idr3_2, can_id);
0236 
0237         can_id >>= 16;
0238         /* EFF_FLAGS are between the IDs :( */
0239         can_id = (can_id & 0x7) | ((can_id << 2) & 0xffe0)
0240              | MSCAN_EFF_FLAGS;
0241     } else {
0242         can_id = (frame->can_id & CAN_SFF_MASK)
0243              << (MSCAN_SFF_RTR_SHIFT + 1);
0244         if (rtr)
0245             can_id |= 1 << MSCAN_SFF_RTR_SHIFT;
0246     }
0247     out_be16(&regs->tx.idr1_0, can_id);
0248 
0249     if (!rtr) {
0250         void __iomem *data = &regs->tx.dsr1_0;
0251         u16 *payload = (u16 *)frame->data;
0252 
0253         for (i = 0; i < frame->len / 2; i++) {
0254             out_be16(data, *payload++);
0255             data += 2 + _MSCAN_RESERVED_DSR_SIZE;
0256         }
0257         /* write remaining byte if necessary */
0258         if (frame->len & 1)
0259             out_8(data, frame->data[frame->len - 1]);
0260     }
0261 
0262     out_8(&regs->tx.dlr, frame->len);
0263     out_8(&regs->tx.tbpr, priv->cur_pri);
0264 
0265     /* Start transmission. */
0266     out_8(&regs->cantflg, 1 << buf_id);
0267 
0268     if (!test_bit(F_TX_PROGRESS, &priv->flags))
0269         netif_trans_update(dev);
0270 
0271     list_add_tail(&priv->tx_queue[buf_id].list, &priv->tx_head);
0272 
0273     can_put_echo_skb(skb, dev, buf_id, 0);
0274 
0275     /* Enable interrupt. */
0276     priv->tx_active |= 1 << buf_id;
0277     out_8(&regs->cantier, priv->tx_active);
0278 
0279     return NETDEV_TX_OK;
0280 }
0281 
0282 static enum can_state get_new_state(struct net_device *dev, u8 canrflg)
0283 {
0284     struct mscan_priv *priv = netdev_priv(dev);
0285 
0286     if (unlikely(canrflg & MSCAN_CSCIF))
0287         return state_map[max(MSCAN_STATE_RX(canrflg),
0288                  MSCAN_STATE_TX(canrflg))];
0289 
0290     return priv->can.state;
0291 }
0292 
0293 static void mscan_get_rx_frame(struct net_device *dev, struct can_frame *frame)
0294 {
0295     struct mscan_priv *priv = netdev_priv(dev);
0296     struct mscan_regs __iomem *regs = priv->reg_base;
0297     u32 can_id;
0298     int i;
0299 
0300     can_id = in_be16(&regs->rx.idr1_0);
0301     if (can_id & (1 << 3)) {
0302         frame->can_id = CAN_EFF_FLAG;
0303         can_id = ((can_id << 16) | in_be16(&regs->rx.idr3_2));
0304         can_id = ((can_id & 0xffe00000) |
0305               ((can_id & 0x7ffff) << 2)) >> 2;
0306     } else {
0307         can_id >>= 4;
0308         frame->can_id = 0;
0309     }
0310 
0311     frame->can_id |= can_id >> 1;
0312     if (can_id & 1)
0313         frame->can_id |= CAN_RTR_FLAG;
0314 
0315     frame->len = can_cc_dlc2len(in_8(&regs->rx.dlr) & 0xf);
0316 
0317     if (!(frame->can_id & CAN_RTR_FLAG)) {
0318         void __iomem *data = &regs->rx.dsr1_0;
0319         u16 *payload = (u16 *)frame->data;
0320 
0321         for (i = 0; i < frame->len / 2; i++) {
0322             *payload++ = in_be16(data);
0323             data += 2 + _MSCAN_RESERVED_DSR_SIZE;
0324         }
0325         /* read remaining byte if necessary */
0326         if (frame->len & 1)
0327             frame->data[frame->len - 1] = in_8(data);
0328     }
0329 
0330     out_8(&regs->canrflg, MSCAN_RXF);
0331 }
0332 
0333 static void mscan_get_err_frame(struct net_device *dev, struct can_frame *frame,
0334                 u8 canrflg)
0335 {
0336     struct mscan_priv *priv = netdev_priv(dev);
0337     struct mscan_regs __iomem *regs = priv->reg_base;
0338     struct net_device_stats *stats = &dev->stats;
0339     enum can_state new_state;
0340 
0341     netdev_dbg(dev, "error interrupt (canrflg=%#x)\n", canrflg);
0342     frame->can_id = CAN_ERR_FLAG;
0343 
0344     if (canrflg & MSCAN_OVRIF) {
0345         frame->can_id |= CAN_ERR_CRTL;
0346         frame->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
0347         stats->rx_over_errors++;
0348         stats->rx_errors++;
0349     } else {
0350         frame->data[1] = 0;
0351     }
0352 
0353     new_state = get_new_state(dev, canrflg);
0354     if (new_state != priv->can.state) {
0355         can_change_state(dev, frame,
0356                  state_map[MSCAN_STATE_TX(canrflg)],
0357                  state_map[MSCAN_STATE_RX(canrflg)]);
0358 
0359         if (priv->can.state == CAN_STATE_BUS_OFF) {
0360             /*
0361              * The MSCAN on the MPC5200 does recover from bus-off
0362              * automatically. To avoid that we stop the chip doing
0363              * a light-weight stop (we are in irq-context).
0364              */
0365             if (priv->type != MSCAN_TYPE_MPC5121) {
0366                 out_8(&regs->cantier, 0);
0367                 out_8(&regs->canrier, 0);
0368                 setbits8(&regs->canctl0,
0369                      MSCAN_SLPRQ | MSCAN_INITRQ);
0370             }
0371             can_bus_off(dev);
0372         }
0373     }
0374     priv->shadow_statflg = canrflg & MSCAN_STAT_MSK;
0375     frame->len = CAN_ERR_DLC;
0376     out_8(&regs->canrflg, MSCAN_ERR_IF);
0377 }
0378 
0379 static int mscan_rx_poll(struct napi_struct *napi, int quota)
0380 {
0381     struct mscan_priv *priv = container_of(napi, struct mscan_priv, napi);
0382     struct net_device *dev = napi->dev;
0383     struct mscan_regs __iomem *regs = priv->reg_base;
0384     struct net_device_stats *stats = &dev->stats;
0385     int work_done = 0;
0386     struct sk_buff *skb;
0387     struct can_frame *frame;
0388     u8 canrflg;
0389 
0390     while (work_done < quota) {
0391         canrflg = in_8(&regs->canrflg);
0392         if (!(canrflg & (MSCAN_RXF | MSCAN_ERR_IF)))
0393             break;
0394 
0395         skb = alloc_can_skb(dev, &frame);
0396         if (!skb) {
0397             if (printk_ratelimit())
0398                 netdev_notice(dev, "packet dropped\n");
0399             stats->rx_dropped++;
0400             out_8(&regs->canrflg, canrflg);
0401             continue;
0402         }
0403 
0404         if (canrflg & MSCAN_RXF) {
0405             mscan_get_rx_frame(dev, frame);
0406             stats->rx_packets++;
0407             if (!(frame->can_id & CAN_RTR_FLAG))
0408                 stats->rx_bytes += frame->len;
0409         } else if (canrflg & MSCAN_ERR_IF) {
0410             mscan_get_err_frame(dev, frame, canrflg);
0411         }
0412 
0413         work_done++;
0414         netif_receive_skb(skb);
0415     }
0416 
0417     if (work_done < quota) {
0418         if (likely(napi_complete_done(&priv->napi, work_done))) {
0419             clear_bit(F_RX_PROGRESS, &priv->flags);
0420             if (priv->can.state < CAN_STATE_BUS_OFF)
0421                 out_8(&regs->canrier, priv->shadow_canrier);
0422         }
0423     }
0424     return work_done;
0425 }
0426 
0427 static irqreturn_t mscan_isr(int irq, void *dev_id)
0428 {
0429     struct net_device *dev = (struct net_device *)dev_id;
0430     struct mscan_priv *priv = netdev_priv(dev);
0431     struct mscan_regs __iomem *regs = priv->reg_base;
0432     struct net_device_stats *stats = &dev->stats;
0433     u8 cantier, cantflg, canrflg;
0434     irqreturn_t ret = IRQ_NONE;
0435 
0436     cantier = in_8(&regs->cantier) & MSCAN_TXE;
0437     cantflg = in_8(&regs->cantflg) & cantier;
0438 
0439     if (cantier && cantflg) {
0440         struct list_head *tmp, *pos;
0441 
0442         list_for_each_safe(pos, tmp, &priv->tx_head) {
0443             struct tx_queue_entry *entry =
0444                 list_entry(pos, struct tx_queue_entry, list);
0445             u8 mask = entry->mask;
0446 
0447             if (!(cantflg & mask))
0448                 continue;
0449 
0450             out_8(&regs->cantbsel, mask);
0451             stats->tx_bytes += can_get_echo_skb(dev, entry->id,
0452                                 NULL);
0453             stats->tx_packets++;
0454             priv->tx_active &= ~mask;
0455             list_del(pos);
0456         }
0457 
0458         if (list_empty(&priv->tx_head)) {
0459             clear_bit(F_TX_WAIT_ALL, &priv->flags);
0460             clear_bit(F_TX_PROGRESS, &priv->flags);
0461             priv->cur_pri = 0;
0462         } else {
0463             netif_trans_update(dev);
0464         }
0465 
0466         if (!test_bit(F_TX_WAIT_ALL, &priv->flags))
0467             netif_wake_queue(dev);
0468 
0469         out_8(&regs->cantier, priv->tx_active);
0470         ret = IRQ_HANDLED;
0471     }
0472 
0473     canrflg = in_8(&regs->canrflg);
0474     if ((canrflg & ~MSCAN_STAT_MSK) &&
0475         !test_and_set_bit(F_RX_PROGRESS, &priv->flags)) {
0476         if (canrflg & ~MSCAN_STAT_MSK) {
0477             priv->shadow_canrier = in_8(&regs->canrier);
0478             out_8(&regs->canrier, 0);
0479             napi_schedule(&priv->napi);
0480             ret = IRQ_HANDLED;
0481         } else {
0482             clear_bit(F_RX_PROGRESS, &priv->flags);
0483         }
0484     }
0485     return ret;
0486 }
0487 
0488 static int mscan_do_set_mode(struct net_device *dev, enum can_mode mode)
0489 {
0490     int ret = 0;
0491 
0492     switch (mode) {
0493     case CAN_MODE_START:
0494         ret = mscan_restart(dev);
0495         if (ret)
0496             break;
0497         if (netif_queue_stopped(dev))
0498             netif_wake_queue(dev);
0499         break;
0500 
0501     default:
0502         ret = -EOPNOTSUPP;
0503         break;
0504     }
0505     return ret;
0506 }
0507 
0508 static int mscan_do_set_bittiming(struct net_device *dev)
0509 {
0510     struct mscan_priv *priv = netdev_priv(dev);
0511     struct mscan_regs __iomem *regs = priv->reg_base;
0512     struct can_bittiming *bt = &priv->can.bittiming;
0513     u8 btr0, btr1;
0514 
0515     btr0 = BTR0_SET_BRP(bt->brp) | BTR0_SET_SJW(bt->sjw);
0516     btr1 = (BTR1_SET_TSEG1(bt->prop_seg + bt->phase_seg1) |
0517         BTR1_SET_TSEG2(bt->phase_seg2) |
0518         BTR1_SET_SAM(priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES));
0519 
0520     netdev_info(dev, "setting BTR0=0x%02x BTR1=0x%02x\n", btr0, btr1);
0521 
0522     out_8(&regs->canbtr0, btr0);
0523     out_8(&regs->canbtr1, btr1);
0524 
0525     return 0;
0526 }
0527 
0528 static int mscan_get_berr_counter(const struct net_device *dev,
0529                   struct can_berr_counter *bec)
0530 {
0531     struct mscan_priv *priv = netdev_priv(dev);
0532     struct mscan_regs __iomem *regs = priv->reg_base;
0533 
0534     bec->txerr = in_8(&regs->cantxerr);
0535     bec->rxerr = in_8(&regs->canrxerr);
0536 
0537     return 0;
0538 }
0539 
0540 static int mscan_open(struct net_device *dev)
0541 {
0542     int ret;
0543     struct mscan_priv *priv = netdev_priv(dev);
0544     struct mscan_regs __iomem *regs = priv->reg_base;
0545 
0546     ret = clk_prepare_enable(priv->clk_ipg);
0547     if (ret)
0548         goto exit_retcode;
0549     ret = clk_prepare_enable(priv->clk_can);
0550     if (ret)
0551         goto exit_dis_ipg_clock;
0552 
0553     /* common open */
0554     ret = open_candev(dev);
0555     if (ret)
0556         goto exit_dis_can_clock;
0557 
0558     napi_enable(&priv->napi);
0559 
0560     ret = request_irq(dev->irq, mscan_isr, 0, dev->name, dev);
0561     if (ret < 0) {
0562         netdev_err(dev, "failed to attach interrupt\n");
0563         goto exit_napi_disable;
0564     }
0565 
0566     if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY)
0567         setbits8(&regs->canctl1, MSCAN_LISTEN);
0568     else
0569         clrbits8(&regs->canctl1, MSCAN_LISTEN);
0570 
0571     ret = mscan_start(dev);
0572     if (ret)
0573         goto exit_free_irq;
0574 
0575     netif_start_queue(dev);
0576 
0577     return 0;
0578 
0579 exit_free_irq:
0580     free_irq(dev->irq, dev);
0581 exit_napi_disable:
0582     napi_disable(&priv->napi);
0583     close_candev(dev);
0584 exit_dis_can_clock:
0585     clk_disable_unprepare(priv->clk_can);
0586 exit_dis_ipg_clock:
0587     clk_disable_unprepare(priv->clk_ipg);
0588 exit_retcode:
0589     return ret;
0590 }
0591 
0592 static int mscan_close(struct net_device *dev)
0593 {
0594     struct mscan_priv *priv = netdev_priv(dev);
0595     struct mscan_regs __iomem *regs = priv->reg_base;
0596 
0597     netif_stop_queue(dev);
0598     napi_disable(&priv->napi);
0599 
0600     out_8(&regs->cantier, 0);
0601     out_8(&regs->canrier, 0);
0602     mscan_set_mode(dev, MSCAN_INIT_MODE);
0603     close_candev(dev);
0604     free_irq(dev->irq, dev);
0605 
0606     clk_disable_unprepare(priv->clk_can);
0607     clk_disable_unprepare(priv->clk_ipg);
0608 
0609     return 0;
0610 }
0611 
0612 static const struct net_device_ops mscan_netdev_ops = {
0613     .ndo_open   = mscan_open,
0614     .ndo_stop   = mscan_close,
0615     .ndo_start_xmit = mscan_start_xmit,
0616     .ndo_change_mtu = can_change_mtu,
0617 };
0618 
0619 static const struct ethtool_ops mscan_ethtool_ops = {
0620     .get_ts_info = ethtool_op_get_ts_info,
0621 };
0622 
0623 int register_mscandev(struct net_device *dev, int mscan_clksrc)
0624 {
0625     struct mscan_priv *priv = netdev_priv(dev);
0626     struct mscan_regs __iomem *regs = priv->reg_base;
0627     u8 ctl1;
0628 
0629     ctl1 = in_8(&regs->canctl1);
0630     if (mscan_clksrc)
0631         ctl1 |= MSCAN_CLKSRC;
0632     else
0633         ctl1 &= ~MSCAN_CLKSRC;
0634 
0635     if (priv->type == MSCAN_TYPE_MPC5121) {
0636         priv->can.do_get_berr_counter = mscan_get_berr_counter;
0637         ctl1 |= MSCAN_BORM; /* bus-off recovery upon request */
0638     }
0639 
0640     ctl1 |= MSCAN_CANE;
0641     out_8(&regs->canctl1, ctl1);
0642     udelay(100);
0643 
0644     /* acceptance mask/acceptance code (accept everything) */
0645     out_be16(&regs->canidar1_0, 0);
0646     out_be16(&regs->canidar3_2, 0);
0647     out_be16(&regs->canidar5_4, 0);
0648     out_be16(&regs->canidar7_6, 0);
0649 
0650     out_be16(&regs->canidmr1_0, 0xffff);
0651     out_be16(&regs->canidmr3_2, 0xffff);
0652     out_be16(&regs->canidmr5_4, 0xffff);
0653     out_be16(&regs->canidmr7_6, 0xffff);
0654     /* Two 32 bit Acceptance Filters */
0655     out_8(&regs->canidac, MSCAN_AF_32BIT);
0656 
0657     mscan_set_mode(dev, MSCAN_INIT_MODE);
0658 
0659     return register_candev(dev);
0660 }
0661 
0662 void unregister_mscandev(struct net_device *dev)
0663 {
0664     struct mscan_priv *priv = netdev_priv(dev);
0665     struct mscan_regs __iomem *regs = priv->reg_base;
0666     mscan_set_mode(dev, MSCAN_INIT_MODE);
0667     clrbits8(&regs->canctl1, MSCAN_CANE);
0668     unregister_candev(dev);
0669 }
0670 
0671 struct net_device *alloc_mscandev(void)
0672 {
0673     struct net_device *dev;
0674     struct mscan_priv *priv;
0675     int i;
0676 
0677     dev = alloc_candev(sizeof(struct mscan_priv), MSCAN_ECHO_SKB_MAX);
0678     if (!dev)
0679         return NULL;
0680     priv = netdev_priv(dev);
0681 
0682     dev->netdev_ops = &mscan_netdev_ops;
0683     dev->ethtool_ops = &mscan_ethtool_ops;
0684 
0685     dev->flags |= IFF_ECHO; /* we support local echo */
0686 
0687     netif_napi_add_weight(dev, &priv->napi, mscan_rx_poll, 8);
0688 
0689     priv->can.bittiming_const = &mscan_bittiming_const;
0690     priv->can.do_set_bittiming = mscan_do_set_bittiming;
0691     priv->can.do_set_mode = mscan_do_set_mode;
0692     priv->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES |
0693         CAN_CTRLMODE_LISTENONLY;
0694 
0695     for (i = 0; i < TX_QUEUE_SIZE; i++) {
0696         priv->tx_queue[i].id = i;
0697         priv->tx_queue[i].mask = 1 << i;
0698     }
0699 
0700     return dev;
0701 }
0702 
0703 MODULE_AUTHOR("Andrey Volkov <avolkov@varma-el.com>");
0704 MODULE_LICENSE("GPL v2");
0705 MODULE_DESCRIPTION("CAN port driver for a MSCAN based chips");
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